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M27W512 512 Kbit (64Kb x 8) Low Voltage OTP EPROM LOW VOLTAGE READ OPERATION: 2.7V to 3.6V FAST READ ACCESS TIME: - 90ns at VCC = 3.0V to 3.6V - 100ns at VCC = 2.7V to 3.6V PIN COMPATIBLE with M27C512 LOW POWER CONSUMPTION: - 15A max Standby Current - 15mA max Active Current at 5MHz PROGRAMMING TIME 100s/byte (typical) HIGH RELIABILITY CMOS TECHNOLOGY - 2,000V ESD Protection - 200mA Latchup Protection Immunity ELECTRONIC SIGNATURE - Manufacturer Code: 20h - Device Code: 3Dh DESCRIPTION The M27W512 is a low voltage 512 Kbit EPROM offered in the OTP range (one time programmable). It is ideally suited for microprocessor systems and is organized as 65,536 by 8 bits. The M27W512 operates in the read mode with a supply voltage as low as 2.7V at -40 to 85C temperature range. The decrease in operating power allows either a reduction of the size of the battery or an increase in the time between battery recharges. The M27W512 is offered in PLCC32 and TSOP28 (8 x 13.4 mm) packages. Table 1. Signal Names A0-A15 Q0-Q7 E GVPP VCC VSS Address Inputs Data Outputs Chip Enable Output Enable / Program Supply Supply Voltage Ground PLCC32 (K) TSOP28 (N) 8 x 13.4mm Figure 1. Logic Diagram VCC 16 A0-A15 8 Q0-Q7 E GVPP M27W512 VSS AI01584 September 1998 1/13 M27W512 Figure 2A. LCC Pin Connections Figure 2B. TSOP Pin Connections A7 A12 A15 DU VCC A14 A13 1 32 A6 A5 A4 A3 A2 A1 A0 NC Q0 A8 A9 A11 NC GVPP A10 E Q7 Q6 9 M27W512 25 17 VSS DU Q3 Q4 Q5 GVPP A11 A9 A8 A13 A14 VCC A15 A12 A7 A6 A5 A4 A3 22 21 28 1 M27W512 15 14 7 8 AI01586 A10 E Q7 Q6 Q5 Q4 Q3 VSS Q2 Q1 Q0 A0 A1 A2 Q1 Q2 AI01585 Warning: NC = Not Connected, DU = Don't Use Table 2. Absolute Maximum Ratings (1) Symbol TA TBIAS TSTG VIO (2) Parameter Ambient Operating Temperature Temperature Under Bias Storage Temperature Input or Output Voltages (except A9) Supply Voltage A9 Voltage Program Supply Voltage (3) Value -40 to 125 -50 to 125 -65 to 150 -2 to 7 -2 to 7 -2 to 13.5 -2 to 14 Unit C C C V V V V VCC VA9 (2) VPP Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum DC voltage on Input or Output is -0.5V with possible undershoot to -2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. 3. Depends on range. 2/13 M27W512 Table 3. Operating Modes Mode Read Output Disable Program Program Inhibit Standby Electronic Signature Note: X = VIH or VIL, VID = 12V 0.5V E VIL VIL VIL Pulse VIH VIH VIL GVPP VIL VIH VPP VPP X VIL A9 X X X X X VID Q0 - Q7 Data Out Hi-Z Data In Hi-Z Hi-Z Codes Table 4. Electronic Signature Identifier Manufacturer's Code Device Code A0 VIL VIH Q7 0 0 Q6 0 0 Q5 1 1 Q4 0 1 Q3 0 1 Q2 0 1 Q1 0 0 Q0 0 1 Hex Data 20h 3Dh DEVICE OPERATION The modes of operations of the M27W512 are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL levels except for GVPP and 12V on A9 for Electronic Signature. Read Mode The M27W512 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M27W512 has a standby mode which reduces the supply current from 15mA to 15A with low voltage operation VCC 3.6V, see Read Mode DC Characteristics table for details. The M27W512 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the GVPP input. Two Line Output Control Because EPROMs are usually used in larger memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. 3/13 M27W512 Table 5. AC Measurement Conditions High Speed Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages 10ns 0 to 3V 1.5V Standard 20ns 0.4V to 2.4V 0.8V and 2V Figure 3. AC Testing Input Output Waveform Figure 4. AC Testing Load Circuit 1.3V High Speed 3V 1.5V 0V DEVICE UNDER TEST 3.3k 1N914 Standard 2.4V 2.0V 0.8V AI01822 OUT CL 0.4V CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance AI01823B Table 6. Capacitance (1) (TA = 25 C, f = 1 MHz ) Symbol CIN COUT Parameter Input Capacitance Output Capacitance Test Condition VIN = 0V VOUT = 0V Min Max 6 12 Unit pF pF Note. 1. Sampled only, not 100% tested. System Considerations The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output 4/13 control and by properly selected decoupling capacitors. It is recommended that a 0.1F ceramic capacitor be used on every device between VCC and VSS. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7F bulk electrolytic capacitor should be used between VCC and VSS for every eight devices. The bulk capacitor should be located near the power supplyconnection point.The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces. M27W512 Table 7. Read Mode DC Characteristics (1) (TA = -40 to 85C; VCC = 2.7V to 3.6V; VPP = VCC) Symbol ILI ILO ICC Parameter Input Leakage Current Output Leakage Current Supply Current Supply Current (Standby) TTL Supply Current (Standby) CMOS Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL IOL = 2.1mA IOH = -1mA 2.4 Test Condition 0V VIN VCC 0V VOUT VCC E = VIL, G = VIL, IOUT = 0mA, f = 5MHz, VCC 3.6V E = VIH E > VCC - 0.2V, VCC 3.6V VPP = VCC -0.6 0.7 VCC Min Max 10 10 15 Unit A A mA ICC1 ICC2 IPP VIL VIH (2) 1 15 10 0.2 VCC VCC + 0.5 0.4 mA A A V V V V VOL VOH Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Maximum DC voltage on Output is VCC +0.5V. Table 8. Read Mode AC Characteristics (1) (TA = -40 to 85C; VCC = 2.7V to 3.6V; VPP = VCC) M27W512 Symbol Alt Parameter Test Condition -100 (3) -120 (-150/-200) Unit VCC = 3.0V to 3.6V VCC = 2.7V to 3.6V VCC = 2.7V to 3.6V Min tAVQV tELQV tGLQV tEHQZ (2) tGHQZ (2) tAXQX tACC tCE tOE tDF tDF tOH Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition E = VIL, G = VIL G = VIL E = VIL G = VIL E = VIL E = VIL, G = VIL 0 0 0 Max 90 90 50 50 50 0 0 0 Min Max 100 100 60 60 60 0 0 0 Min Max 120 120 70 70 70 ns ns ns ns ns ns Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested. 3. Speed obtained with High Speed AC measurement conditions. 5/13 M27W512 Figure 5. Read Mode AC Waveforms A0-A15 VALID tAVQV tAXQX VALID E tGLQV G tELQV Q0-Q7 tGHQZ Hi-Z tEHQZ AI00735B Table 9. Programming Mode DC Characteristics (1) (TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.75V 0.25V) Symbol ILI ICC IPP VIL VIH VOL VOH VID Parameter Input Leakage Current Supply Current Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL A9 Voltage IOL = 2.1mA IOH = -1mA 3.6 11.5 12.5 E = VIL -0.3 2 Test Condition VIL VIN VIH Min Max 10 50 50 0.8 VCC + 0.5 0.4 Unit A mA mA V V V V V Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 6/13 M27W512 Table 10. MARGIN MODE AC Characteristics (1) (TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.75V 0.25V) Symbol tA9HVPH tVPHEL tA10HEH tA10LEH tEXA10X tEXVPX tVPXA9X Alt tAS9 tVPS tAS10 tAS10 tAH10 tVPH tAH9 Parameter VA9 High to VPP High VPP High to Chip Enable Low VA10 High to Chip Enable High (Set) VA10 Low to Chip Enable High (Reset) Chip Enable Transition to VA10 Transition Chip Enable Transition to VPP Transition VPP Transition to VA9 Transition Test Condition Min 2 2 1 1 1 2 2 Max Unit s s s s s s s Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Figure 6. MARGIN MODE AC Waveforms VCC A8 A9 tA9HVPH GVPP tVPHEL E tA10HEH A10 Set tEXA10X tEXVPX tVPXA9X A10 Reset tA10LEH AI00736B Note: A8 High level = 5V; A9 High level = 12V. 7/13 M27W512 Table 11. Programming Mode AC Characteristics (1) (TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.75V 0.25V) Symbol tAVEL tQVEL tVCHEL tVPHEL tVPLVPH tELEH tEHQX tEHVPX tVPLEL tELQV tEHQZ (2) Alt tAS tDS tVCS tOES tPRT tPW tDH tOEH tVR tDV tDFP tAH Parameter Address Valid to Chip Enable Low Input Valid to Chip Enable Low VCC High to Chip Enable Low VPP High to Chip Enable Low VPP Rise Time Chip Enable Program Pulse Width (Initial) Chip Enable High to Input Transition Chip Enable High to VPP Transition VPP Low to Chip Enable Low Chip Enable Low to Output Valid Chip Enable High to Output Hi-Z Chip Enable High to Address Transition Test Condition Min 2 2 2 2 50 95 2 2 2 Max Unit s s s s ns 105 s s s s 1 0 0 130 s ns ns tEHAX Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested. Figure 7. Programming and Verify Modes AC Waveforms A0-A15 tAVEL Q0-Q7 tQVEL VCC tVCHEL GVPP tVPHEL E tELEH PROGRAM DATA IN VALID tEHAX DATA OUT tEHQX tELQV tEHVPX tEHQZ tVPLEL VERIFY AI00737 8/13 M27W512 Programming The M27W512 has been designed to be fully compatible with the M27C512 and has the same electronic signature. As a result the M27W512 can be programmed as the M27C512 on the same programming equipment applying 12.75V on VPP and 6.25V on VCC. The M27W512 can use PRESTO IIB Programming Algorithm that drastically reduces the programming time. Nevertheless to achieve compatibility with all programming equipments, PRESTO II Programming Algorithm can be used as well. When delivered, all bits of the M27W512 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The M27W512 is in the programming mode when VPP input is at 12.75V and E is pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25V 0.25V. PRESTO IIB Programming Algorithm PRESTO IIB Programming Algorithm allows the whole array to be programmed with a guaranteed margin, in a typical time of 6.5 seconds. This can be achieved with STMicroelectronics M27W512 due to several design innovations described in the M27W512 datasheet to improve programming efficiency and to provide adequate margin for reliability. Before starting the programming the internal MARGIN MODE circuit is set in order to guarantee that each cell is programmed with enough margin. Then a sequence of 100s program pulses is applied to each byte until a correct verify occurs. No overprogram pulses are applied since the verify in MARGIN MODE at VCC much higher than 3.6V, provides the necessary margin. Program Inhibit Programming of multiple M27W512s in parallel with different data is also easily accomplished. Except for E, all like inputs including GVPP of the parallel M27W512 may be common. A TTL low level pulse applied to a M27W512's E input, with VPP at 12.75V, will program that M27W512. A high level E input inhibits the other M27W512s from being programmed. Program Verify A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with G at VIL. Data should be verified with tELQV after the falling edge of E. Figure 8. Programming Flowchart VCC = 6.25V, VPP = 12.75V SET MARGIN MODE n=0 E = 100s Pulse NO ++n = 25 YES NO VERIFY YES Last Addr NO ++ Addr FAIL YES RESET MARGIN MODE CHECK ALL BYTES 1st: VCC = 6V 2nd: VCC = 4.2V AI00738B On-Board Programming The M27W512 can be directly programmed in the application circuit. See the relevant Application Note AN620. Electronic Signature The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25C 5C ambient temperature range that is required when programming the M27W512. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M27W512. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0=VIL) represents the manufacturer code and byte 1 (A0=VIH) the device identifier code. For the STMicroelectronics M27W512, these two identifier bytes are given in Table 4 and can be read-out on outputs Q0 to Q7. Note that the M27W512 and M27C512 have the same identifier byte. 9/13 M27W512 ORDERING INFORMATION SCHEME Example: M27W512 -100 K 6 TR Speed -100 (1,2) -120 100 ns 120 ns K N Package PLCC32 TSOP28 8 x 13.4mm Temperature Range 6 -40 to 85 C TR Option Tape & Reel Packing NOT FOR NEW DESIGN (3) -150 -200 150 ns 200 ns Notes: 1. High Speed, see AC Characteristics section for further information. 2. This speed also guarantees 90ns access time at VCC = 3.0V to 3.6V. 3. These speeds are replaced by the 120ns. For a list of available options (Speed, Package etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. 10/13 M27W512 PLCC32 - 32 lead Plastic Leaded Chip Carrier, rectangular Symb Typ A A1 A2 B B1 D D1 D2 E E1 E2 e F R N Nd Ne CP 0.89 1.27 mm Min 2.54 1.52 - 0.33 0.66 12.32 11.35 9.91 14.86 13.89 12.45 - 0.00 - 32 7 9 0.10 Max 3.56 2.41 0.38 0.53 0.81 12.57 11.56 10.92 15.11 14.10 13.46 - 0.25 - 0.035 0.050 Typ inches Min 0.100 0.060 - 0.013 0.026 0.485 0.447 0.390 0.585 0.547 0.490 - 0.000 - 32 7 9 0.004 Max 0.140 0.095 0.015 0.021 0.032 0.495 0.455 0.430 0.595 0.555 0.530 - 0.010 - D D1 1N A1 A2 B1 Ne E1 E F 0.51 (.020) D2/E2 B e 1.14 (.045) Nd A R CP PLCC Drawing is not to scale 11/13 M27W512 TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4mm Symb Typ A A1 A2 B C D D1 E e L N CP 0.55 0.95 0.17 0.10 13.20 11.70 7.90 - 0.50 0 28 0.10 mm Min Max 1.25 0.20 1.15 0.27 0.21 13.60 11.90 8.10 - 0.70 5 0.022 0.037 0.007 0.004 0.520 0.461 0.311 - 0.020 0 28 0.004 Typ inches Min Max 0.049 0.008 0.045 0.011 0.008 0.535 0.469 0.319 - 0.028 5 A2 22 21 e 28 1 E B 7 8 D1 D A CP DIE C TSOP-c Drawing is not to scale A1 L 12/13 M27W512 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 13/13 |
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