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256 Kilobit (32K x 8) SuperFlash MTP SST27SF256 Preliminary Specifications FEATURES: * 5.0V Read Operation (4.5V to 5.5V) * Superior Reliability - Endurance: At least 1000 Cycles - Greater than 100 years Data Retention * Low Power Consumption - Active Current: 20 mA (typical) - Standby Current: 10 A (typical) * Fast Access Time - 70 and 90 ns * Fast Programming Operation - 20 s per byte - 0.7 second for the entire chip * Features Electrical Erase - Does Not Require UV Source - Chip Erase Time: 100 ms * TTL I/O Compatibility * JEDEC Standard Byte-wide EPROM Pinouts * 12V Power Supply for Programming/Erase * Packages Available - 28-Pin PDIP - 32-Pin PLCC - 32-Pin TSOP (8mm x 14mm) 1 2 3 4 5 PRODUCT DESCRIPTION The SST27SF256 is a 32K x 8 CMOS, many-time programmable (MTP) low cost flash, manufactured with SST's proprietary, high performance SuperFlash technology. The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST27SF256 can be electrically erased and programmed at least 1000 times using an external programmer with a 12 volt supply. The SST27SF256 has to be erased prior to programming. The SST27SF256 conforms to JEDEC standard pinouts for byte-wide memories. Featuring high performance byte programming, the SST27SF256 provides a byte program time of 20 s. The entire memory can be programmed byte-by-byte in 0.7 seconds. Designed, manufactured, and tested for a wide spectrum of applications, the SST27SF256 is offered with an endurance of at least 1000 cycles. Data retention is rated at greater than 100 years. The SST27SF256 is suited for applications that require infrequent writes and low power nonvolatile storage. The SST27SF256 will improve flexibility, efficiency, and performance while matching the low cost in nonvolatile applications that currently use UV-EPROMs, OTPs, and mask ROMs. To meet surface mount and conventional through hole requirements, the SST27SF256 is offered in 28-pin PDIP, 32-pin PLCC and 32-pin TSOP packages. See Figures 1 and 2 for pinouts. Device Operation The SST27SF256 is a low cost flash solution that can be used to replace existing UV-EPROM, OTP, and mask ROM sockets. This device is functionally (read and program) and pin compatible with industry standard EPROM products. In addition to EPROM functionality, the device also supports electrical erase operation via an external programmer. The SST27SF256 does not require a UV source to erase, and therefore the packages do not have a window. Read The Read operation of the SST27SF256 is controlled by CE# and OE#. Both CE# and OE# have to be low for the system to obtain data from the outputs. Once the address is stable, the address access time is equal to the delay from CE# to output (TCE). Data is available at the output after a delay of TOE from the falling edge of OE#, assuming that CE# pin has been low and the addresses have been stable for at least TCE - TOE. When the CE# pin is high, the chip is deselected and a typical standby current of 10 A is consumed. OE# is the output control and is used to gate data from the output pins. The data bus is in high impedance state when either CE# or OE# is high. Programming operation The SST27SF256 is programmed by using an external programmer. The programming mode is activated by asserting 12V (5%) on VPP pin, Vcc = 5V5%, VIL on CE# pin, and VIH on OE# pin. The device is programmed byte by byte with the desired data at the desired address using a single pulse (CE# pin low) of 20 s. Using the 6 7 8 9 10 11 12 13 14 15 16 (c) 1999 Silicon Storage Technology, Inc.The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MTP is a trademark of Silicon Storage Technology, Inc. 1 321-07 1/99 These specifications are subject to change without notice. 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications MTP programming algorithm, the byte programming process continues byte by byte until the entire chip (32 KByte) has been programmed. Chip Erase Operation The only way to change a data from a "0" to "1" is by electrical erase that changes every bit in the device to "1". Unlike traditional EPROMs, which use UV light to do the chip erase, the SST27SF256 uses an electrical chip erase operation. This saves a significant amount of time (about 30 minutes for each erase operation). The entire chip can be erased in a single pulse of 100 ms (CE# pin low). In order to activate the erase mode, the 12V (5%) is applied to VPP and A9 pins, Vcc = 5V5%, VIL on CE# pin, and VIH on OE# pin. All other address and data pins are "don't care". The falling edge of CE# will start the Chip Erase operation. Once the chip has been erased, all bytes must be verified for FF. Refer to figure 8 for the flow chart. Product Identification Mode The product identification mode identifies the device as the SST27SF256 and manufacturer as SST. This mode may be accessed by the hardware method. To activate this mode, the programming equipment must force VH (12V5%) on address A9 with VPP pin at VCC (5V10%) or VSS. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0. For details, see Table 3 for hardware operation. TABLE 1: PRODUCT IDENTIFICATION TABLE Byte Manufacturer's Code 0000 H Device Code 0001 H Data BF H A3 H 321 PGM T1.0 FUNCTIONAL BLOCK DIAGRAM OF THE SST27SF256 262,144 Bit EEPROM Cell Array X-Decoder A14 - A0 Address Buffer Y-Decoder CE# OE# VPP A9 Control Logic I/O Buffers DQ7 - DQ0 321 ILL B1.0 (c) 1999 Silicon Storage Technology, Inc. 2 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications A11 A9 A8 A13 A14 NC NC VCC VPP NC NC A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE# A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0 A0 A1 A2 A3 321 ILL F01.1 1 2 3 4 5 Standard Pinout Top View Die Up FIGURE 1: PIN ASSIGNMENTS FOR 32-PIN TSOP PACKAGES VCC VPP A12 A14 A13 NC A7 VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28-Pin PDIP Top View 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 OE# A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 6 A8 A9 A11 NC OE# A10 CE# DQ7 DQ6 A6 A5 A4 A3 A2 A1 A0 NC DQ0 5 6 7 8 9 10 11 12 13 4 3 2 1 32 31 30 29 28 27 26 25 24 23 22 7 8 9 10 32-Lead PLCC Top View 21 14 15 16 17 18 19 20 VSS DQ1 DQ2 NC DQ3 DQ4 DQ5 321 ILL F02.0 FIGURE 2: PIN ASSIGNMENTS FOR 28-PIN PLASTIC DIPS AND 32-LEAD PLCCS TABLE 2: PIN DESCRIPTION Symbol Pin Name A14-A0 Address Inputs DQ7-DQ0 Data Input/Output CE# OE# VCC VPP VSS NC Chip Enable Output Enable Power Supply Power Supply for Program or Erase Ground No Connection 11 12 13 14 15 16 321 PGM T2.1 Functions To provide memory addresses To output data during read cycles and receive input data during program cycle, the outputs are in tri-state when OE# or CE# is high To activate the device when CE# is low To gate the data output buffers during read operation and high voltage pin during chip erase and programming operation To provide 5-volt supply (10%) High voltage pin during chip erase and programming operation 12-volt (5%) Unconnected pins (c) 1999 Silicon Storage Technology, Inc. 3 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications TABLE 3: OPERATION MODES SELECTION Mode CE# OE# Read VIL VIL Output Disable Program Standby Chip Erase Program/Erase Inhibit Product Identification Note: VIL VIL VIH VIL VIH VIL VIH VIH X VIH X VIL VPP VCC or VSS VCC or VSS VPPH VCC or VSS VPPH VPPH VCC or VSS A9 AIN X AIN X VH X VH DQ DOUT High Z DIN High Z High Z High Z Manufacturer Code (BF) Device Code (A3) Address AIN X AIN X X X A14-A1 = VIL, A0 = VIL A14-A1 = VIL, A0 = VIH 321 PGM T3.0 X = VIL or VIH VPPH = 12V5%, VH = 12V5% Absolute Maximum Stress Ratings (Applied conditions greater than those listed under "Absolute Maximum Stress Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Temperature Under Bias ................................................................................................................. -55C to +125C Storage Temperature ...................................................................................................................... -65C to +150C D. C. Voltage on Any Pin to Ground Potential ............................................................................. -0.5V to VCC+ 0.5V Transient Voltage (<20 ns) on Any Pin to Ground Potential ......................................................... -1.0V to VCC+ 1.0V Voltage on A9 and VPP Pin to Ground Potential .................................................................................. -0.5V to 14.0V Package Power Dissipation Capability (TA = 25C) ........................................................................................... 1.0W Through Hole Lead Soldering Temperature (10 Seconds) .............................................................................. 300C Surface Mount Lead Soldering Temperature (3 Seconds) ............................................................................... 240C Output Short Circuit Current(1) ............................................................................................................................................................... 100 mA Note: (1) Outputs shorted for no more than one second. No more than one output shorted at a time. OPERATING RANGE Range Ambient Temp Commercial 0C to +70C Industrial -40C to +85C AC CONDITIONS OF TEST VCC 5V10% 5V10% VPP 12V5% 12V5% Input Rise/Fall Time ......... 10 ns Output Load ..................... CL = 100 pF, for 90 ns Output Load ..................... CL = 30 pF, for 70 ns See Figures 6 and 7 (c) 1999 Silicon Storage Technology, Inc. 4 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications TABLE 4: READ MODE DC OPERATING CHARACTERISTICS VCC = 5 V10%, VPP = VCC or VSS, TA = 0C to 70C (Commercial) or -40C to +85C (Industrial) Limits Symbol Parameter Min Max Units Test Conditions ICC VCC Read Current 30 mA CE# = OE# = VIL all I/Os open, Address Input = VIL/VIH at f = 1/TRC Min, VCC = VCC Max IPPR VPP Read Current 100 A CE# = OE# = VIL, all I/Os open, Address Input = VIL/VIH at f = 1/TRC Min, VCC = VCC Max, VPP = Vcc ISB1 Standby VCC Current 3 mA CE# = VIH, VCC = VCC Max (TTL input) ISB2 Standby VCC Current 50 A CE#=VCC -0.3V (CMOS input) VCC = VCC Max. ILI Input Leakage Current 1 A VIN = GND to VCC, VCC = VCC Max ILO Output Leakage Current 1 A VOUT = GND to VCC, VCC = VCC Max VIL Input Low Voltage 0.8 V VCC = VCC Min VIH Input High Voltage 2.0 Vcc+0.5 V VCC = VCC Max VOL Output Low Voltage 0.4 V IOL = 2.1 mA, VCC = VCC Min VOH Output High Voltage 2.4 V IOH = -400A, VCC = VCC Min IH Supervoltage Current 100 A CE# = OE# = VIL, A9 = VH Max. for A9 321 PGM T4.4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (c) 1999 Silicon Storage Technology, Inc. 5 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications TABLE 5: PROGRAM/ERASE DC OPERATING CHARACTERISTICS Vcc = 5 V10%, VPP = VPPH,TA = 25C5C Limits Symbol Parameter Min Max Units ICP VCC Erase or Program 30 mA Current IPP VPP Erase or Program 1 mA Current ILI Input Leakage Current 1 A ILO Output Leakage Current 1 A VH Supervoltage for A9 11.4 12.6 V IH Supervoltage Current 100 A for A9 VPPH High Voltage for VPP Pin 11.4 12.6 V Test Conditions CE# = VIL, OE# = VIH, VPP = 12V5%, VCC = VCC Max CE# = VIL, OE# = VIH, VPP = 12V5%, VCC = VCC Max VIN = GND to VCC, VCC = VCC Max VOUT = GND to VCC, VCC = VCC Max CE# = OE# = VIL CE# = OE# = VIL, A9 = VH Max 321 PGM T5.2 TABLE 6: RECOMMENDED SYSTEM POWER-UP TIMINGS Symbol Parameter TPU-READ Power-up to Read Operation TPU-WRITE Power-up to Write Operation Minimum 100 100 Units s s 321 PGM T6.2 TABLE 7: CAPACITANCE (TA = 25 C, f=1 MHz, other pins open) Parameter Description Test Condition (1) CI/O I/O Pin Capacitance VI/O = 0V CIN(1) Input Capacitance VIN = 0V Maximum 12 pF 6 pF 321 PGM T7.0 Note: (1)This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. TABLE 8: RELIABILITY CHARACTERISTICS Symbol Parameter NEND Endurance TDR(1) Data Retention (1) VZAP_HBM ESD Susceptibility Human Body Model (1) VZAP_MM ESD Susceptibility Machine Model (1) ILTH Latch Up Note: (1) Minimum Specification 1000 100 1000 200 100 Units Cycles Years Volts Volts mA Test Method JEDEC Standard A117 JEDEC Standard A103 JEDEC Standard A114 JEDEC Standard A115 JEDEC Standard 78 321 PGM T8.3 This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. (c) 1999 Silicon Storage Technology, Inc. 6 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications AC CHARACTERISTICS TABLE 9: READ CYCLE TIMING PARAMETERS Symbol TRC TCE TAA TOE TCLZ TOLZ TCHZ TOHZ TOH Parameter Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time CE# Low to Active Output OE# Low to Active Output CE# High to High-Z Output OE# High to High-Z Output Output Hold from Address Change SST27SF256-70 Min Max 70 70 70 35 0 0 25 25 0 SST27SF256-90 Min Max 90 90 90 45 0 0 30 30 0 Units ns ns ns ns ns ns ns ns ns 321 PGM T9.2 1 2 3 4 5 6 7 Note: CL = 100 pF for 90ns, 30 pF for 70 ns TABLE 10: PROGRAMMING/ERASE CYCLE TIMING PARAMETERS Symbol Parameter Min TPRT VPP Pulse Rise Time 50 TAS Address Setup Time 1 TAH Address Hold Time 1 TVPS VPP Setup Time 1 TVPH VPP Hold Time 1 TPW CE# Program Pulse Width 20 TEW CE# Erase Pulse Width 100 TDS Data Setup Time 1 TDH Data Hold Time 1 TVR VPP and A9 Recovery Time 1 TART A9 Rise Time to 12V during Erase 50 TA9S A9 Setup Time during Erase 1 A9 Hold Time during Erase 1 TA9H Max 30 500 Units ns s s s s s ms s s s ns s s 321 PGM T10.2 8 9 10 11 12 13 14 15 16 (c) 1999 Silicon Storage Technology, Inc. 7 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications TRC TAA ADDRESS CE# TCE OE# TOE TOLZ TOHZ TOH DATA VALID TCHZ DATA VALID DQ7-0 HIGH-Z TCLZ 321 ILL F03.1 FIGURE 3: READ CYCLE TIMING DIAGRAM ADDRESS (EXCEPT A9) CE# TEW OE# VIH DQ7-0 VPPH VCC VPP VSS VPPH A9 VIH VIL TART TA9H 321 ILL F04.0 TVPS TVPH TPRT TVR TA9S TVR FIGURE 4: ERASE TIMING DIAGRAM (c) 1999 Silicon Storage Technology, Inc. 8 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications 1 ADDRESS ADDRESS VALID TAS TAH 2 TPW CE# 3 TDH OE# VIH TDS 4 5 TVR DQ7-0 HIGH-Z VPPH VCC DATA VALID TVPS 6 TPRT VPP VSS TVPH 321 ILL F05.0 7 8 FIGURE 5: PROGRAM TIMING DIAGRAM 9 10 VIHT VHT INPUT REFERENCE POINTS VHT OUTPUT VLT VILT VLT 321 ILL F06.1 11 12 13 14 15 16 AC test inputs are driven at VIHT (2.4 V) for a logic "1" and VILT (0.4 V) for a logic "0". Measurement reference points for inputs and outputs are VHT (2.0 V) and VLT (0.8 V). Inputs rise and fall times (10% 90%) are <10 ns. Note: VHT-VHIGH Test VLT-VLOW Test VIHT-VINPUT HIGH Test VILT-VINPUT LOW Test FIGURE 6: AC INPUT/OUTPUT REFERENCE WAVEFORMS (c) 1999 Silicon Storage Technology, Inc. 9 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications VCC TO TESTER RL HIGH TO DUT CL RL LOW 321 ILL F07.1 FIGURE 7: A TEST LOAD EXAMPLE (c) 1999 Silicon Storage Technology, Inc. 10 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications 1 Start 2 VPP = VPPH, A9 = VH 3 Erase 100ms pulse (CE# = VIL) 4 VPP = VCC or VSS A9 = VIL or VIH 5 6 7 No Wait for VPP and A9 Recovery Time Read Device (CE# = OE# = VIL) Compare All bytes to FF Yes 8 9 Device Passed Device Failed 10 321 ILL F08.0 11 12 FIGURE 8: ERASE ALGORITHM 13 14 15 16 (c) 1999 Silicon Storage Technology, Inc. 11 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications Start Erase See Figure 8 VPP = VPPH Address = First Location Program 20s pulse (CE# = VIL) Increment Address No Last Address? Yes VPP = VCC or VSS Wait for VPP Recovery Time Read Device (CE# = OE# = VIL ) Compare all bytes to original data Yes No Device Passed Device Failed 321 ILL F09.0 FIGURE 9: PROGRAMMING ALGORITHM (c) 1999 Silicon Storage Technology, Inc. 12 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications PRODUCT ORDERING INFORMATION Device SST27SF256 Speed - XXX - Suffix1 XX - Suffix2 XX Package Modifier G = 28 leads H = 32 leads Numeric = Die modifier Package Type P = PDIP N = PLCC W = TSOP (die up) (8mm x 14mm) U = Unencapsulated die Operating Temperature C = Commercial = 0 to 70C I = Industrial = -40 to 85C Minimum Endurance 3 = 1000 cycles Read Access Speed 70 = 70 ns, 90 = 90 ns 1 2 3 4 5 6 7 8 9 10 Valid combinations SST27SF256- 70-3C-WH SST27SF256- 90-3C-WH SST27SF256- 70-3I-WH SST27SF256- 90-3I-WH SST27SF256- 70-3C-NH SST27SF256- 90-3C-NH SST27SF256- 70-3I-NH SST27SF256- 90-3I-NH SST27SF256- 70-3C-PG SST27SF256- 90-3C-PG 11 12 SST27SF256- 90-3C-U1 13 Example:Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. 14 15 16 (c) 1999 Silicon Storage Technology, Inc. 13 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications PACKAGING DIAGRAMS 1.05 0.95 .50 BSC PIN # 1 IDENTIFIER 8.10 7.90 .270 .170 12.50 12.30 0.15 0.05 0.70 0.50 14.20 13.80 Note: 1. Complies with JEDEC publication 95 MO-142 BA dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in metric (min/max). 3. Coplanarity: 0.1 (.05) mm. 32.TSOP-WH-ILL.2 32-LEAD THIN SMALL OUTLINE PACKAGE (TSOP) SST PACKAGE CODE: WH pin 1 index 1 C L 28 .600 .625 .530 .550 .065 .075 1.445 1.455 7 4 PLCS. Base Plane Seating Plane .015 .050 .120 .150 .170 .200 .008 .012 .600 BSC 0 15 .070 .080 .045 .065 .016 .022 .100 BSC Note: 1. Complies with JEDEC publication 95 MO-015 AH dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in inches (min/max). 3. Dimensions do not include mold flash. Maximum allowable mold flash is .010 inches. 28.pdipPG-ILL.1 28-LEAD PLASTIC DUAL-IN-LINE PACKAGE (PDIP) SST PACKAGE CODE: PG (c) 1999 Silicon Storage Technology, Inc. 14 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 Preliminary Specifications TOP VIEW SIDE VIEW BOTTOM VIEW 1 Optional Pin #1 Identifier .485 .495 .447 .453 .042 .048 2 1 32 .106 .112 .020 R. MAX. .023 x 30 .029 .030 R. .040 2 3 .042 .048 .585 .595 .547 .553 .026 .032 .013 .021 .400 BSC .490 .530 4 5 .026 .032 .050 BSC. .015 Min. .050 BSC. .125 .140 .075 .095 6 32.PLCC.NH-ILL.1 Note: 1. Complies with JEDEC publication 95 MS-016 AE dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in inches (min/max). 3. Dimensions do not include mold flash. Maximum allowable mold flash is .008 inches. 7 8 9 10 11 12 13 14 15 16 32-LEAD PLASTIC LEAD CHIP CARRIER (PLCC) SST PACKAGE CODE: NH (c) 1999 Silicon Storage Technology, Inc. 15 321-07 1/99 256 Kilobit SuperFlash MTP SST27SF256 SALES OFFICES Preliminary Specifications SST Area Offices Customer Service Northwest USA, Rocky Mtns. & West Canada Central & Southwest USA East USA & East Canada North America - Distribution Asia Pacific East Asia Europe (408) 523-7754 (408) 523-7661 (727) 771-8819 (978) 356-3845 (941) 505-8893 (408) 523-7762 (81) 45-471-1851 (44) 1932-230555 International Sales Representatives & Distributors Australia ACD Belgium Memec Benelux China/Hong Kong Actron Technology Co., Ltd. (HQ) Hong Kong Actron Technology Co., Ltd. - Shanghai Actron Technology Co., Ltd. - Shenzhen Actron Technology Co., Ltd. - Chengdu Actron Technology Co., Ltd. - Beijing Actron Technology Co., Ltd. - Wuhan Actron Technology Co., Ltd. - Xian MetaTech Limited (HQ) - Hong Kong MetaTech Limited - Beijing MetaTech Limited - Shanghai MetaTech Limited - Chengdu MetaTech Limited - Fuzhou MetaTech Limited - Shenzhen Serial System Ltd. - Hong Kong Serial System Ltd. - Chengdu Serial System Ltd. - Shanghai Serial System Ltd. - Shenzhen (61) 3-762 7644 (32) 1540-0080 (852) 2727-3978 (86) 21-6482-8021 (86) 755-376-2763 (86) 28-553-2896 (86) 10-6261-0042 (86) 27-8788-7226 (86) 29-831-4585 (852) 2421-2379 (86) 10-6858-2188 (86) 21-6485-7530 (86) 28-5577-415 (86) 591-378-1033 (86) 755-321-9726 (852) 2950-0820 (86) 28-524-0208 (86) 21-6473-2080 (86) 755-212-9076 (33) 4 72 37 0414 (33) 1 46 23 7900 North American Sales Representatives Alabama M-Squared, Inc. - Huntsville Arizona QuadRep, Inc. California Costar - Northern Falcon Sales & Technology - San Marcos Westar Rep Company, Inc. - Calabasas Westar Rep Company, Inc. - Irvine Colorado Lange Sales, Inc. Florida M-Squared, Inc. - Clearwater M-Squared, Inc. - Coral Springs M-Squared, Inc. - Longwood Georgia M-Squared, Inc. - Atlanta Illinois Oasis Sales Corporation - Northern Rush & West Associates - Southern Indiana Applied Data Management Iowa Rush & West Associates Kansas Rush & West Associates Maryland Nexus Technology Sales Massachusetts A/D Sales Michigan Applied Data Management Minnesota Cahill, Schmitz & Cahill Missouri Rush & West Associates North Carolina M-Squared, Inc. - Charlotte M-Squared, Inc. - Raleigh New Jersey Nexus Technology Sales New Mexico QuadRep, Inc. New York Nexus Technology Sales Reagan/Compar - Endwell Reagan/Compar - E. Rochester Ohio Applied Data Management - Cincinnati Applied Data Management - Cleveland Oregon Thorson Pacific, Inc. Pennsylvania Nexus Technology Sales Texas Technical Marketing, Inc. - Carrollton Technical Marketing, Inc. - Houston Technical Marketing, Inc. - Austin Utah Lange Sales, Inc. Washington Thorson Pacific, Inc. Wisconsin Oasis Sales Corporation Canada Electronics Sales Professionals - Ottawa Electronics Sales Professionals - Toronto Electronics Sales Professionals - Montreal Thorson Pacific, Inc. - B.C. (205) 830-0498 (602) 839-2102 (408) 946-9339 (760) 591-0504 (818) 880-0594 (949) 453-7900 (303) 795-3600 (727) 669-2408 (954) 753-5314 (407) 682-6662 (770) 447-6124 (847) 640-1850 (314) 965-3322 (317) 257-8949 (319) 398-9679 (913) 764-2700 (301) 663-4159 (978) 851-5400 (734) 741-9292 (612) 699-0200 (314) 965-3322 (704) 522-1150 (919) 848-4300 (201) 947-0151 (505) 332-2417 (516) 843-0100 (607) 754-2171 (716) 218-4370 (513) 579-8108 (440) 946-6812 (503) 293-9001 (215) 675-9600 (972) 387-3601 (713) 783-4497 (512) 343-6976 (801) 487-0843 (425) 603-9393 (414) 782-6660 France A2M - Bron A2M - Sevres Germany Endrich Bauelemente Vertriebs GMBH - Bramstedt Endrich Bauelemente Vertriebs GMBH - Nagold (49) 4192-897910 (49) 7452-60070 (91) 80-526-1102 (91) 40-231130 (91) 11-220-5624 (353) 61 316116 (972) 3-6498404 (39) 2-424-1471 (81) 3-3350-5418 (81) 93-511-6471 (81) 6-6263-5080 (81) 3-5300-5515 (81) 6-6399-3443 (81) 3-5396-6218 (81) 3-3795-6461 (82) 2-832-8881 (60)4-658-4276 (60) 4-657-0204 (60) 3-737-1243 (31) 40-265-9399 (65) 748-4844 (65) 280-0200 (27) 11 845-5011 (34) 91 371-7768 (41) 27-721-7440/43 (886) 2-2555-0880 (886) 2-2698-0098 (886) 2-2651-0011 (44) 1296-397396 Revised 3-11-99 India Team Technology - Bangalore Team Technology - Hyderabad Team Technology - New Delhi Ireland Curragh Technology Israel Spectec Electronics Italy Carlo Gavazzi Cefra SpA Japan Asahi Electronics Co., Ltd. - Tokyo Asahi Electronics Co., Ltd. - Kitakyushu Microtek, Inc. - Osaka Microtek, Inc. - Tokyo Ryoden Trading Co., Ltd. - Osaka Ryoden Trading Co., Ltd. - Tokyo Silicon Technology Co., Ltd. Korea Bigshine Korea Co., Ltd. Malaysia MetaTech (M) SDN BHD Serial System SDN BHD Serial System - Kuala Lumpur Netherlands Memec Benelux Singapore MetaTech (S) Pte Ltd. Serial System Ltd. (HQ) South Africa KH Distributors Spain Tekelec Espana S.A. Switzerland Leading Technologies Taiwan, R.O.C. GCH-Sun Systems Co., Ltd. (GSS) PCT Limited Tonsam Corporation (613) 828-6881 (905) 856-8448 (514) 388-6596 (604) 294-3999 United Kingdom Ambar Components, Ltd. Silicon Storage Technology, Inc. * 1171 Sonora Court * Sunnyvale, CA 94086 * Telephone 408-735-9110 * Fax 408-735-9036 www.SuperFlash.com or www.ssti.com * Literature FaxBack 888-221-1178, International 732-544-2873 (c) 1999 Silicon Storage Technology, Inc. 16 321-07 1/99 |
Price & Availability of 27SF256
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