 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA PM5351 S/UN I- (R) 155-TETRA S/UNI-TETRA SATURN USER NETWORK INTERFACE (155-TETRA) ERRATA ISSUE 8: JUNE 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA REVISION HISTORY Issue No. 8 Issue Date Details of Change June 2000 This document contains errata information corresponding to the issue 7 datasheet and device revision G. Corrected datasheet document errors in Register 0x91. Added a section on interfacing the S/UNI-TETRA to ODLs with internal termination. Added a section stating that the S/UNI-TETRA needs to reset their receive FIFO when a receive FIFO overrun occurs. 7 6 5 4 3 2 1 November 1999 July 1999 June 1999 May 1999 Feb 1999 Jan 1999 Nov 1998 This document contains errata information corresponding to the issue 5 datasheet and device revision G. This document contains errata information corresponding to the issue 5 datasheet and device revision E. This document contains errata information corresponding to the issue 5 datasheet and device revision E. This document contains errata information corresponding to the issue 5 datasheet and device revision E. This document contains errata information corresponding to the issue 5 datasheet and device revision C. This document contains errata information corresponding to the issue 5 datasheet and device revision C. This document contains errata information corresponding to the issue 4 datasheet and device revision C. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA CONTENTS 1 ISSUE 8 ERRATA ........................................................................................................................... 1 1.1 2 DEVICE IDENTIFICATION ............................................................................................... 1 S/UNI-TETRA DATASHEET DISCREPANCIES .............................................................................. 2 2.1 PAGE 225: S/UNI-TETRA CHANNEL AUTO PATH RDI CONTROL REGISTER DISCREPANCIES............................................................................................................. 2 INTERFACING S/UNI-TETRA TO ODLS WITH INTERNAL TERMINATION .................... 4 2.2 3 S/UNI-TETRA FUNCTIONAL DISCREPANCIES ............................................................................ 5 3.1 RECEIVE FIFO OVERRUN REQUIRES RESET WHEN OPERATING IN PACKET OVER SONET (POS) MODE....................................................................................................... 5 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE i PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA 1 ISSUE 8 ERRATA This issue 8 contains errata applied to the PMC-971240 S/UNI-TETRA Issue 7 datasheet. The issue 7 datasheet and issue 8 errata supersede all prior editions and versions 1.1 Device Identification The information contains in this document applies to the PM5351 S/UNI-TETRA revision G device only. The device revision code is marked at the end of the Wafer Batch Code on the face of the device (as shown in Figure 1). The PM5351 S/UNI-TETRA revision G is packaged in a 304 pin Super BGA package. Figure 1: PM5351 S/UNI-TETRA Branding Format Pin A1 Index Mark PMC Logo SUNI-TETRA Logo S/UNIPM5351-BI C G Myyww TOP VIEW SCALE: 2:1 (APPROX) R Part Num ber 155-TETRA wafer Batch Code Assembly Date Code PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 1 PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA 2 Legend S/UNI-TETRA DATASHEET DISCREPANCIES 1. unaltered text is unchanged to add context to changes 2. new material is bold and Italicized 3. obsolete material is struck out 4. comments specific to this document are in italics 5. A vertical bar in left margin indicates that this is a new item which was not present in the previous issue of this document. 2.1 Page 225: S/UNI-TETRA Channel Auto Path RDI Control Register Discrepancies Register 0x91: S/UNI-TETRA Channel Auto Path RDI Control Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Type Function R/W LCDPRDI R/W ALRMPRDI R/W PAISPRDI R/W PSLMPRDI R/W LOPPRDI R/W LOPCONPRDI R/W PTIUPRDI R/W PTIMPRDI Default 0 0 1 1 1 1 1 1 This register controls the auto assertion of path RDI (G1 bit 5) in the local TPOP. Since the S/UNI-TETRA provides STS-3c (STM-1/AU4) mappings, this register controls the assertion of path RDI for the entire SONET/SDH stream. See also the S/UNI-TETRA Channel Auto Enhanced Path RDI register. RTIMPRDI: The Receive Trace Identifier Mismatch PRDI (RTIMPRDI) controls the insertion of a Path RDI in the transmit data stream upon detection of this alarm condition. When RTIMPRDI is set to logic one, the transmit line path RDI will be inserted. When RTIMPRDI is set to logic zero, no action is taken. This register bit has effect only if the AUTOPRDI register bit is also set to logic one. PTIUPRDI: The Path Trace Identifier Unstable PRDI (PTIUPRDI) controls the insertion of a Path RDI in the transmit data stream upon detection of this alarm condition. When PTIUPRDI is set to logic one, the transmit line path RDI will be inserted. When PTIUPRDI is set to logic zero, no action is taken. This register bit has effect only if the AUTOPRDI register bit is also set to logic one. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 2 PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA LOPCONPRDI: The Loss of Pointer Concatenation Indication PRDI (LOPCONPRDI) controls the insertion of a Path RDI in the transmit data stream upon detection of this alarm condition. When LOPCONPRDI is set to logic one, the transmit line path RDI will be inserted. When LOPCONPRDI is set to logic zero, no action is taken. This register bit has effect only if the AUTOPRDI register bit is also set to logic one. LOPPRDI: The Loss of Pointer PRDI (LOPPRDI) controls the insertion of a Path RDI in the transmit data stream upon detection of this alarm condition. When LOPPRDI is set to logic one, the transmit line path RDI will be inserted. When LOPPRDI is set to logic zero, no action is taken. This register bit has effect only if the AUTOPRDI register bit is also set to logic one. PSLMPRDI: The Path Signal Label Mismatch PRDI (PSLMPRDI) controls the insertion of a Path RDI in the transmit data stream upon detection of this alarm condition. When PSLMPRDI is set to logic one, the transmit line path RDI will be inserted. When PSLMPRDI is set to logic zero, no action is taken. This register bit has effect only if the AUTOPRDI register bit is also set to logic one. PAISPRDI: The Path Alarm Indication Signal PRDI (PAISPRDI) controls the insertion of a Path RDI in the transmit data stream upon detection of this alarm condition. When PAISPRDI is set to logic one, the transmit line path RDI will be inserted. When PAISPRDI is set to logic zero, no action is taken. This register bit has effect only if the AUTOPRDI register bit is also set to logic one. ALRMPRDI: The Line Alarm Indication Signal PRDI (ALRMPRDI) controls the insertion of a Path RDI in the transmit data stream upon detection of one of the following alarm conditions: Loss of Signal (LOS), Loss of Frame (LOF) and Line Alarm Indication Signal (LAIS). When ALRMPRDI is set to logic one, the transmit line path RDI will be inserted. When ALRMPRDI is set to logic zero, no action is taken. This register bit has effect only if the AUTOPRDI register bit is also set to logic one. LCDPRDI The Loss of ATM Cell Delineation Signal PRDI (LCDPRDI) controls the insertion of Path RDI in the transmit data stream upon detection of this alarm. When LCDPRDI is set to logic one, the transmit line path RDI will be inserted. When LCDPRDI is set to logic zero, no action is taken. This register bit is used only if the AUTOPRDI register bit is also set to logic one. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 3 PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA 2.2 Interfacing S/UNI-TETRA To ODLs With Internal Termination ODL to TETRA PECL INTERFACE Vcc 220ohms 0.1uF 330ohms Vcc=3.3V 49.9ohms TXDp 49.9ohms TXDn Zo=50ohm 0.1uF 180ohms Zo=50ohm 0.1uF 180ohms TXD+ CMOS level Totem pole outputs (GND to Vcc p-p) TXDSD 150 ohms RXDp 150 ohms RXDn 150 ohms Zo=50ohm Zo=50ohm 100 ohms RXDRXD+ ODL without Internal Termination SD ODL TETRA PM5351 Vcc 220ohms 0.1uF 330ohms Vcc=3.3V 2K TXDp 100ohms Rint TXDn SD ODL with internal Termination not self biased RXDp 150 ohms RXDn 150 ohms Zo=50ohm 2K Zo=50ohm 0.1uF 180ohms SD 150 ohms Zo=50ohm 100 ohms RXDRXD+ TETRA PM5351 Zo=50ohm 0.1uF 180ohms TXD+ CMOS level Totem pole outputs (GND to Vcc p-p) TXD- ODL with 100Ohms Internal Termination not self biased Vcc=3.3V Zo=50ohm bias circuit 100ohms Rint TXDn SD ODL with internal Termination with self biased RXDp 150 ohms RXDn 150 ohms Zo=50ohm Zo=50ohm 0.1uF 180ohms TXD+ CMOS level Totem pole outputs (GND to Vcc p-p) TXDSD ODL with 100Ohms Internal self biased Termination 0.1uF 180ohms 150 ohms Zo=50ohm 100 ohms RXDRXD+ TETRA PM5351 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 4 PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA 3 3.1 S/UNI-TETRA FUNCTIONAL DISCREPANCIES Receive FIFO Overrun Requires Reset When Operating In Packet Over SONET (POS) Mode In packet over sonet (POS) mode, the S/UNI-TETRA requires that the receive FIFO to be reset after a receive FIFO overrun occurs. The receive FIFO can be reset by setting bit 0 of Register 0x62 to logic 1 and back to logic 0. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE 5 PM5351 S/UNI-TETRA ERRATA PMC-1981004 ISSUE 8 S/UNI-TETRA DATASHEET ERRATA CONTACTING PMC-SIERRA, INC. PMC-Sierra, Inc. 105-8555 Baxter Place Burnaby, BC Canada V5A 4V7 Tel: Fax: (604) 415-6000 (604) 415-6200 Document Information: document@pmc-sierra.com Corporate Information: info@pmc-sierra.com Application Information: apps@pmc-sierra.com (604) 415-4533 Web Site: http://www.pmc-sierra.com None of the information contained in this document constitutes an express or implied warranty by PMC-Sierra, Inc. as to the sufficiency, fitness or suitability for a particular purpose of any such information or the fitness, or suitability for a particular purpose, merchantability, performance, compatibility with other parts or systems, of any of the products of PMC-Sierra, Inc., or any portion thereof, referred to in this document. PMC-Sierra, Inc. expressly disclaims all representations and warranties of any kind regarding the contents or use of the information, including, but not limited to, express and implied warranties of accuracy, completeness, merchantability, fitness for a particular use, or non-infringement. In no event will PMC-Sierra, Inc. be liable for any direct, indirect, special, incidental or consequential damages, including, but not limited to, lost profits, lost business or lost data resulting from any use of or reliance upon the information, whether or not PMC-Sierra, Inc. has been advised of the possibility of such damage. (c) 1998, 1999, 2000 PMC-Sierra, Inc. PMC-981004 (R8) ref PMC-971240 (R7) Issue date: June 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE |
Price & Availability of 1981004
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |