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Final Electrical Specifications
LT1640L/LT1640H Negative Voltage Hot Swap Controller
July 1998
FEATURES
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DESCRIPTION
The LT(R)1640L/LT1640H is an 8-pin, negative voltage Hot SwapTM controller that allows a board to be safely inserted and removed from a live backplane. Inrush current is limited to a programmable value by controlling the gate voltage of an external N-channel pass transistor. The pass transistor is turned off if the input voltage is less than the programmable undervoltage threshold or greater than the overvoltage threshold. A programmable electronic circuit breaker protects the system against shorts. The PWRGD or PWRGD signal can be used to directly enable a power module. The LT1640L is designed for modules with a low enable input and the LT1640H for modules with a high enable input. The LT1640L/LT1640H is available in 8-pin PDIP and SO packages.
, LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation.
Allows Safe Board Insertion and Removal from a Live - 48V Backplane Operates from -10V to - 80V Programmable Inrush Current Programmable Electronic Circuit Breaker Programmable Overvoltage Protection Programmable Undervoltage Lockout Power Good Control Output
APPLICATIONS
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Central Office Switching - 48V Distributed Power Systems
TYPICAL APPLICATION
GND R4 562k 1% UV = 37V R5 9.09k 1% R6 10k 1% 8 VDD 3 UV LT1640L 2 OV VEE 4 SENSE 5 C1 0.033F 24V GATE 6 R2 10 5% R3 C2 10k 5% 3.3nF 100V
1640 TA01
C3 0.1F 100V PWRGD 1
+
C4 100F 100V
OV = 71V
DRAIN 7
R1 0.02 5% - 48V
Q1 IRF530
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LUCENT JW050A1-E 1 2 4 VIN+ ON/OFF VIN
-
VOUT+ SENSE
+
9 8 7 6 5
5V
+
TRIM SENSE - VOUT
-
C5 100F 16V
1
LT1640L/LT1640H ABSOLUTE MAXIMUM RATINGS U WW U W
(Note 1), All Voltages Referred to VEE
Supply Voltage (VDD - VEE) .................... - 0.3V to 100V DRAIN, PWRGD, PWRGD Pins ............... - 0.3V to 100V SENSE, GATE Pins .................................... - 0.3V to 20V UV, OV Pins .............................................. - 0.3V to 60V Maximum Junction Temperature ......................... 125C
Operating Temperature Range LT1640HC/LT1640LC ............................. 0C to 70C LT1640HI/LT1640LI .......................... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
PACKAGE/ORDER I FOR ATIO
TOP VIEW PWRGD 1 OV 2 UV 3 VEE 4 N8 PACKAGE 8-LEAD PDIP 8 7 6 5 VDD DRAIN GATE SENSE
ORDER PART NUMBER LT1640HCN8 LT1640HCS8 LT1640HIN8 LT1640HIS8 S8 PART MARKING 1640H 1640HI
PWRGD 1 OV 2 UV 3 VEE 4 N8 PACKAGE 8-LEAD PDIP
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 125C, JA = 120C/W (N8) TJMAX = 125C, JA = 150C/W (S8)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL DC VDD IDD VCB IPU IPD VGATE VUVH VUVL VUVHY IINUV VOVH VOVL VOVHY IINOV VPG VPGHY VOL ROUT Supply Voltage Supply Current Circuit Breaker Trip Voltage GATE Pin Pull-Up Current GATE Pin Pull-Down Current External Gate Drive UV Pin High Threshold Voltage UV Pin Low Threshold Voltage UV Pin Hysteresis UV Pin Input Current OV Pin High Threshold Voltage OV Pin Low Threshold Voltage OV Pin Hysteresis OV Pin Input Current Power Good Threshold Power Good Threshold Hysteresis Output Low Voltage Power Good Output Impedance VOV = VEE VUV = VEE PARAMETER CONDITIONS
(Note 2), VDD = 48V, VEE = 0V, TA = 25C unless otherwise noted.
MIN
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UV = 3V, OV = VEE, SENSE = VEE VCB = (VSENSE - VEE) Gate Drive On, VGATE = VEE Any Fault Condition (VGATE - VEE), 15V VDD 80V (VGATE - VEE), 10V VDD < 15V UV Low to High Transition UV High to Low Transition
OV Low to High Transition OV High to Low Transition
VDRAIN - VEE, High to Low Transition PWRGD (LT1640L), IOUT = 1mA, (VDRAIN - VEE) < VPG PWRGD (LT1460H), (VDRAIN - VEE) < VPG
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TOP VIEW 8 7 6 5 VDD DRAIN GATE SENSE
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ORDER PART NUMBER LT1640LCN8 LT1640LCS8 LT1640LIN8 LT1640LIS8 S8 PART MARKING 1640L 1640LI
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 125C, JA = 120C/W (N8) TJMAX = 125C, JA = 150C/W (S8)
TYP
MAX 80
UNITS V mA mV A mA V V V V mV A V V mV A V V V k
10 2 40 - 30 24 10 6 1.213 1.198 50 - 45 50 13.5 8 1.243 1.223 20 - 0.02 1.198 1.165 1.223 1.203 20 - 0 .03 1.1 1.4 0.4 0.48 2 6.5
q q q
5 60 - 60 70 18 15 1.272 1.247 - 0.5 1.247 1.232 - 0.5 2.0 0.8
q q q q
q q q
q
LT1640L/LT1640H
ELECTRICAL CHARACTERISTICS
SYMBOL AC tPHLOV tPHLUV tPLHOV tPLHUV tPHLSENSE tPHLPG tPLHPG OV High to GATE Low UV Low to GATE Low OV Low to GATE High UV High to GATE High SENSE High to Gate Low DRAIN Low to PWRGD Low DRAIN Low to (PWRGD - DRAIN) High DRAIN High to PWRGD High DRAIN High to (PWRGD - DRAIN) Low Figures 1, 2 Figures 1, 3 Figures 1, 2 Figures 1, 3 Figures 1, 4 (LT1640L) Figures 1, 5 (LT1640H) Figures 1, 5 (LT1640L) Figures 1, 5 (LT1640H) Figures 1, 5 2 1.7 1.5 5.5 6.5 3 0.5 0.5 0.5 0.5 4 s s s s s s s s s PARAMETER
VDD = 48V, VEE = 0V, TA = 25C unless otherwise noted.
MIN TYP MAX UNITS
CONDITIONS
The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified.
PIN FUNCTIONS
PWRGD/PWRGD (Pin 1): Power Good Output Pin. This pin will toggle when VDRAIN is within VPG of VEE. This pin can be connected directly to the enable pin of a power module. When the DRAIN pin of the LT1640H is above VEE by more than VPG, the PWRGD pin will sink current to the DRAIN pin which pulls the module's enable pin low, forcing it off. When VDRAIN drops below VPG, the PWRGD sink current is turned off and a 5k resistor is connected between PWRGD and DRAIN, allowing the module's pull-up current to pull the enable pin high and turn on the module. When the DRAIN pin of the LT1640L is above VEE by more than VPG, the PWRGD pin will be high impedance, allowing the pull-up current of the module's enable pin to pull the pin high and turn the module off. When VDRAIN drops below VPG, the PWRGD pin sinks current to VEE, pulling the enable pin low and turning on the module. OV (Pin 2): Analog Overvoltage Input. When OV is pulled above the 1.223V low to high threshold, an overvoltage condition is detected and the GATE pin will be immediately pulled low. The GATE pin will remain low until OV drops below the 1.203V high to low threshold. UV (Pin 3): Analog Undervoltage Input. When UV is pulled below the 1.223V high to low threshold, an undervoltage condition is detected and the GATE pin will be immediately pulled low. The GATE pin will remain low until UV rises above the 1.243 low to high threshold. The UV pin is also used to reset the electronic circuit breaker. If the UV pin is cycled low and high following the trip of the circuit breaker, the circuit breaker is reset and a normal power-up sequence will occur. VEE (Pin 4): Negative Supply Voltage Input. Connect to the lower potential of the power supply. SENSE (Pin 5): Circuit Breaker Sense Pin. With a sense resistor placed in the supply path between VEE and SENSE, the circuit breaker will trip when the voltage across the resistor exceeds 50mV. Noise spikes of less than 2s are filtered out and will not trip the circuit breaker. If the circuit breaker trip current is set to twice the normal operating current, only 25mV is dropped across the sense resistor during normal operation. To disable the circuit breaker, VEE and SENSE can be shorted together.
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LT1640L/LT1640H
PIN FUNCTIONS
GATE (Pin 6): Gate Drive Output for the External N-Channel. The GATE pin is allowed to go high when the following start-up conditions are met: the UV pin is high, the OV pin is low and (VSENSE - VEE) < 50mV. The GATE pin is pulled high by a 45A current source and pulled low with a 50mA current source. DRAIN (Pin 7): Analog Drain Sense Input. Connect this pin to the drain of the external N-channel and the V - pin of the power module. When the DRAIN pin is below VPG, the PWRGD or PWRGD pin will toggle. VDD (Pin 8): Positive Supply Voltage Input. Connect this pin to the higher potential of the power supply inputs and the V + pin of the power module. The input supply voltage ranges from 10V to 80V.
TEST CIRCUIT
V+ 5V R 5k PWRGD/PWRGD VDD OV VOV DRAIN
TIMING DIAGRAMS
2V OV 0V
1.223V
tPHLOV GATE
1V
Figure 2. OV to GATE Timing
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+ -
VDRAIN
48V
LT1640L/LT1460H UV GATE SENSE
VUV VEE VSENSE
1640 F01
C 0.033F
Figure 1. Test Circuit
2V 1.203V UV 0V tPLHOV GATE 1V
1640 F02
1.223V
1.243V
tPHLUV
tPLHUV
1V
1V
1640 F03
Figure 3. UV to GATE Timing
LT1640L/LT1640H
TIMING DIAGRAMS
1.8V DRAIN VEE tPLHPG tPHLPG 1.4V
SENSE
50mV
tPHLSENSE
1.8V
GATE
1V
1640 F04
Figure 4. SENSE to GATE Timing
PWRGD VPWRGD - VDRAIN = 0V 1V 1V
1640 F05
APPLICATIONS INFORMATION
Hot Circuit Insertion When circuit boards are inserted into a live -48V backplane, the bypass capacitors at the input of the board's power module or switching power supply can draw huge transient currents as they charge up. The transient currents can cause permanent damage to the board's components and cause glitches on the system power supply. The LT1640 is designed to turn on a board's supply voltage in a controlled manner, allowing the board to be safely inserted or removed from a live backplane. The chip also provides undervoltage, overvoltage and overcurrent protection while keeping the power module off until its input voltage is stable and within tolerance. Power Supply Ramping The input to the power module on a board is controlled by placing an external N-channel pass transistor (Q1) in the power path (Figure 6a, all waveforms are with respect to the VEE pin of the LT1640). R1 provides current fault detection and R2 prevents high frequency oscillations. Resistors R4, R5 and R6 provide undervoltage and overvoltage sensing. By ramping the gate of Q1 up at a slow rate, the surge current charging load capacitors C3 and C4
AT&T JW050A1-E C4 100F 100V 1 2 4 SENSE 5 C1 0.033F 24V GATE 6 R2 10 5%
1640 F06a
GND R4 562k 1% UV = 37V R5 9.09k 1% R6 10k 1% 8 VDD 3 UV LT1640L 2 OV VEE 4 DRAIN 7 PWRGD 1 C3 0.1F 100V
OV = 71V
R1 0.02 5% - 48V
Q1 IRF530
Figure 6a. Simple Inrush Control Circuitry
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PWRGD VEE
1V
1V
DRAIN 0V tPLHPG
1.4V
tPHLPG
Figure 5. DRAIN to PWRGD/PWRGD Timing
+
VIN+ ON/OFF VIN-
VOUT+ SENSE + TRIM SENSE - VOUT
-
9 8 7 6 5
5V
+
C5 100F 16V
5
LT1640L/LT1640H
APPLICATIONS INFORMATION
can be limited to a safe value when the board makes connection. The waveforms are shown in Figure 6b. When the power pins make contact, they bounce several times. The DRAIN and UV pin voltages also bounce, ramping the GATE pin at a rate set by the 45A GATE current source and C1. When the GATE voltage reaches the threshold voltage of Q1, the DRAIN voltage ramps down and the input current spikes as C3 and C4 is charged. Because Q1 is acting as a common source amplifier, the inrush current is not well controlled but can be kept to a safe value. An improved inrush control circuit is shown in Figure 7a. Resistor R3 and capacitor C2 act as a feedback network to accurately control the inrush current. The inrush current can be calculated with the following equation: IINRUSH = (45A * CL)/C2 where CL is the total load capacitance. Resistor R3 helps keep Q1 off when the power pins first make contact. The waveforms are shown in Figure 7b. When the power pins make contact, they bounce several times. While the contacts are bouncing, the LT1640 senses an undervoltage condition and the GATE is immediately pulled low when the power pins are disconnected. Once the power pins stop bouncing, the GATE pin starts to ramp up. When Q1 turns on, the GATE voltage is held
Figure 6b. Simple Inrush Control Waveforms
GND R4 562k 1% UV = 37V R5 9.09k 1% R6 10k 1% 8 VDD 3 UV LT1640H 2 OV VEE 4 SENSE 5 C1 0.033F 24V GATE 6 R2 R3 10 10k C2 5% 5% 3.3nF 100V
1640 F07a
OV = 71V
R1 0.02 5% - 48V
Q1 IRF530
Figure 7a. Improved Inrush Control Circuitry
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1640 F06a
1640 F07b
Figure 7b. Improved Inrush Control Waveforms
C3 0.1F 100V PWRGD 1
+
VICOR VI-J3D-CY C4 100F 100V VIN+ GATE IN VIN- VOUT- VOUT+ 5V
+
C5 100F 16V
DRAIN 7
LT1640L/LT1640H
APPLICATIONS INFORMATION
constant by the feedback network of R3 and C2. When the DRAIN voltage has finished ramping, the GATE pin then ramps to its final value. Electronic Circuit Breaker The LT1640 features an electronic circuit breaker function that protects against short circuits or excessive supply currents. By placing a sense resistor between the VEE and SENSE pin, the circuit breaker will be tripped whenever the voltage across the sense resistor is greater than 50mV for more than 3s as shown in Figure 8. When the circuit breaker trips, the GATE pin is immediately pulled to VEE and the external N-channel turns off. The GATE pin will remain low until the circuit breaker is reset by pulling UV low, then high or cycling power to the part. If more than 3s deglitching time is needed to reject current noise, an external resistor and capacitor can be added to the sense circuit as shown in Figure 9. If the circuit breaker feature is not required, the SENSE pin should be shorted to VEE. A circuit that automatically resets the circuit breaker after a current fault is shown in Figure 10. Transistors Q2 and Q3 along with R7, R8, C4 and D1 form a programmable one-shot circuit. Before a short occurs, the GATE pin is pulled high and Q3 is turned on, pulling node 2 to VEE. Resistor R8 turns off Q2. When a short occurs, the GATE pin is pulled low and Q3 turns off. Node 2 starts to charge C4 and Q2 turns on, pulling the UV pin low and resetting the circuit breaker. As soon as C4 is fully charged, R8 turns off Q2, UV goes high and the GATE starts to ramp up. Q3 turns back on and quickly pulls node 2 back to VEE. Diode D1 clamps node 3 one diode drop below VEE. The duty cycle is set to 10% to prevent Q1 from overheating. Undervoltage and Overvoltage Detection The UV (Pin 3) and OV (Pin 2) pins can be used to detect undervoltage and overvoltage conditions at the power supply input. The UV and OV pins are internally connected to analog comparators with 20mV of hysteresis. When the UV pin falls below its threshold or the OV pin rises above its threshold, the GATE pin is immediately pulled low. The GATE pin will be held low until UV is high and OV is low.
8 VDD 3 UV LT1640L /LT1640H 2 OV VEE 4 C3 SENSE 5 C1 0.033F 24V GATE 6 R2 R3 10 10k C2 5% 5% 3.3nF 100V
1640 F09
Figure 8. Short-Circuit Protection Waveforms
GND R4 562k 1% UV = 37V R5 9.09k 1% R6 10k 1%
OV = 71V
R1 0.02 5% - 48V
Figure 9. Extending the Short-Circuit Protection Delay
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1640 F08
PWRGD
1
+
DRAIN 7
CL 100F 100V
R7
Q1 IRF530
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LT1640L/LT1640H
APPLICATIONS INFORMATION
GND R7 1M 5% C4 1F 100V R4 562k 1% R5 9.09k 1% R6 10k 1% 8 VDD 3 UV LT1640L 2 OV VEE 4 SENSE 5 C1 0.033F 24V GATE 6 R2 R3 10 10k C2 5% 5% 3.3nF 100V
1640 F10a
2
Q2 2N2222
3 Q3 ZVN3310 R8 510k 5%
D1 1N4148 - 48V
Figure 10. Automatic Restart After Current Fault
The undervoltage and overvoltage trip voltages can be programmed using a three resistor divider as shown in Figure 11. With R4 = 562k, R5 = 9.09k and R6 = 10K, the undervoltage threshold is set to 37V and the overvoltage threshold is set to 71V. PWRGD/PWRGD Output The PWRGD/PWRGD output can be used to directly enable a power module when the input voltage to the module is within tolerance. The LT1640H has a PWRGD output for modules with an active high enable input, and the LT1640L has a PWRGD output for modules with an active low enable input.
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PWRGD
1
+
DRAIN 7
C3 100F 100V
R1 0.02 5%
Q1 IRF530
1640 F10b
GND 8
VUV = 1.223
VOV = 1.223
( (
R4 + R5+ R6 R5 + R6 R4 + R5+ R6 R6
) )
R4 3 R5 2 R6 OV UV
VDD LT1640H LT1640L VEE 4
- 48V
1640 F11
Figure 11. Undervoltage and Overvoltage Sensing
LT1640L/LT1640H
APPLICATIONS INFORMATION
When the DRAIN voltage of the LT1640H is high with respect to VEE (Figure 12), the internal transistor Q3 is turned off and R7 and Q2 clamp the PWRGD pin one diode drop ( 0.7V) above the DRAIN pin. Transistor Q2 sinks the module's pull-up current and the module turns off. When the DRAIN voltage drops below VPG, Q3 will turn on, shorting the bottom of R7 to VEE and turning Q2 off. The pull-up current in the module then flows through R7, pulling the PWRGD pin high and enabling the module. When the DRAIN voltage of the LT1640L is high with respect to VEE, the internal pull-down transistor Q2 is off and the PWRGD pin is in a high impedance state (Figure 13). The PWRGD pin will be pulled high by the module's internal pull-up current source, turning the module off. When the DRAIN voltage drops below VPG, Q2 will turn on and the PWRGD pin will pull low, enabling the module. The PWRGD signal can also be used to turn on an LED or optoisolator to indicate that the power is good as shown in Figure 14.
ACTIVE HIGH ENABLE MODULE GND 8 R4 3 R5 2 R6 VEE SENSE 4 5 C1 R1 - 48V
1640 F12
LT1640H UV
+ -
OV
VPG
Figure 12. Active High Enable Module
GND 8 R4 3 R5 LT1640L UV VDD VPG PWRGD Q2 VEE DRAIN GATE 6 C1 R1 - 48V
1640 F13
2
OV
R6 VEE 4 SENSE 5
Figure 13. Active Low Enable Module
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VIN+ PWRGD R7 5k Q3 VEE GATE 6 R2 R3 C2 DRAIN 7 1
VOUT+
VDD
+
Q2 C3
ON/OFF VIN- VOUT-
Q1
ACTIVE LOW ENABLE MODULE VIN+ 1 VOUT+
+
C3
ON/OFF VIN- VOUT-
+ -
+-
7
R2
R3
C2
Q1
9
LT1640L/LT1640H
APPLICATIONS INFORMATION
GND R7 51k 5% PWRGD 8 VDD 3 UV LT1640L 2 OV VEE 4 SENSE 5 C1 0.033F 24V GATE 6 R2 R3 10 10k C2 5% 5% 3.3nF 100V
1640 F14
R4 562k 1% R5 9.09k 1% R6 10k 1%
R1 0.02 5% - 48V
Figure 14. Using PWRGD to Drive an Optoisolator
GND R4 562k 1% R5 9.09k 1% R6 10k 1% 8 VDD 3 UV 1 PWRGD DRAIN LT1640L 2 OV VEE 4 GATE SENSE 5 C1 0.033F 24V 6 7 C2 3.3nF 100V R3 10k 5% R2 10 5% C3 0.1F 100V VIN+ VOUT+ C4 0.1F 100V 2 1
R1 0.02 5% - 48V
Q1 IRF530
Figure 15. Typical Application Using a Filter Module
Using an EMI Filter Module Many applications place an EMI filter module in the power path to prevent switching noise of the module from being injected back onto the power supply. A typical application using the Lucent FLTR100V10 filter module is shown in Figure 15. When using a filter, a capacitor (C6) is required across the enable pin and VIN- pin of the module to prevent noise from momentarily disabling the module.
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PWRGD 1 4N25
C3 100F 100V
DRAIN 7
Q1 IRF530
LUCENT JW050A1-E VIN+ ON/OFF VOUT+ SENSE + TRIM SENSE - VIN- 3
1640 F15
9 8 7 6
5V
+
LUCENT FLTR100V10 VIN- VOUT-
+
C5 100F 100V
C6 0.1F 100V
C7 100F 16V
4
VOUT- CASE
5
CASE
Gate Pin Voltage Regulation When the supply voltage to the chip is more than 15.5V, the GATE pin voltage is regulated at 13.5V above VEE. If the supply voltage is less than 15.5V, the GATE voltage will be about 2V below the supply voltage. At the minimum 10V supply voltage, the gate voltage is guaranteed to be greater than 6V. The gate voltage will be no greater than 18V for supply voltages up to 80V.
LT1640L/LT1640H
PACKAGE DESCRIPTION
0.300 - 0.325 (7.620 - 8.255)
0.009 - 0.015 (0.229 - 0.381)
(
+0.035 0.325 -0.015 8.255 +0.889 -0.381
)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
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Dimensions in inches (millimeters) unless otherwise noted.
N8 Package 8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400* (10.160) MAX 8 7 6 5
0.255 0.015* (6.477 0.381)
1
2
3
4 0.130 0.005 (3.302 0.127)
0.045 - 0.065 (1.143 - 1.651)
0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 0.003 (0.457 0.076) N8 1197
0.100 0.010 (2.540 0.254)
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LT1640L/LT1640H
PACKAGE DESCRIPTION
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.016 - 0.050 0.406 - 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER LTC 1421 LTC1422
(R)
DESCRIPTION Two Channels, Hot Swap Controller High Side Drive, Hot Swap Controller in SO-8
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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Dimensions in inches (millimeters) unless otherwise noted.
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 8 7 6 5
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.053 - 0.069 (1.346 - 1.752)
2
3
4
0.004 - 0.010 (0.101 - 0.254)
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
SO8 0996
COMMENTS Operates from 3V to 12V System Reset Output with Programmable Delay
1640LHI LT/TP 0798 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1998

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