 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| Contents Features........................................................... 1 Pin Assignment ................................................ 1 Block Diagram.................................................. 1 Instruction Set .................................................. 2 Absolute Maximum Ratings ............................. 2 Recommended Operating Conditions.............. 2 Rewriting Times ............................................... 2 Pin Capacitance............................................... 3 DC Electrical Characteristics ........................... 3 AC Electrical Characteristics............................ 4 Operation ......................................................... 5 Three-wire Interface *DI-DO Direct Connecting ...................... 8 Dimensions ...................................................... 8 Ordering Information ........................................ 9 Characteristics ............................................... 10 Frequently Asked Questions..........................14 CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A 2 The S-29255A (2K-bit) and S-29355A (4K-bit) are E PROMs characterized by a wide operating voltage range and low power consumption. The organization is 128-wordx16-bit and 256-wordx16bit, respectively. They are easily interfaced with a serial port because the instruction is composed of eight-bit units. Also, through the RESET pin, erroneous writing at power on/off can be avoided. Features * S-29255A : S-29355A : 2K-bit, instruction code conforming to M6M80021 4K-bit, instruction code conforming to M6M80041 * * * * * * Easy interface with serial port Memory protection by RESET pin Rewritings: 105 times/word Data retention: 10 years Operating temperature: -40 C to+85 C Package: 8-pin DIP/SOP, bare chip * Low power consumption Operating: 2.0 mA max. Standby: 1.0 A max. * Wide operating voltage range Write: 2.7 to 6.5 V Read: 1.8 to 6.5 V Pin Assignment 8-pin DIP Top view CS SK DI DO VCC RDY/BUSY RESET GND RDY/BUSY VCC CS SK 8-pin SOP Top view RESET GND DO DI CS SK DI DO VCC GND RDY/BUSY RESET Chip select Serial clock Serial data input Serial data output Power supply voltage Ground Ready output/Busy output Reset input L : Stable Status H : Reset write circuit (Memory protection) Figure 1 Block Diagram RESET Write protection Memory array Address decoder DI CS Clock generator Data register Output buffer DO Mode decode logic RDY/BUSY Figure 2 VCC GND SK Seiko Instruments Inc. 1 CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A Instruction Set Table 1 Instruction Op code Address S-29255A READ (Read data) PROGRAM (Program) WRAL (Write all )* ERAL (Erase all )* EWEN (Program enable) EWDS (Program disable) Status output Busy flag Write permission ECC flag 10101000 10100100 10100001 10100010 10100011 10100000 10101001 A0 to A6 0 A0 to A6 0 A0 to A6 0 xxxxxxxx xxxxxxxx xxxxxxxx 00xxxxxx 10xxxxxx 01xxxxxx S-29355A A0 to A7 A0 to A7 A0 to A7 xxxxxxxx xxxxxxxx xxxxxxxx 00xxxxxx 10xxxxxx 01xxxxxx D0 to D15 D0 to D15 D0 to D15 0 : BUSY 1 : READY 0 : Permission 1 : Inhibit "0" is always output** Data x : Doesn't matter * : ERAL and WRAL are options. Normally these can not be used. ** : S-29255A/29355A doesn't have redundant memory. Absolute Maximum Ratings Table 2 Parameter Power supply voltage Input voltage Output voltage Storage temperature under bias Storage temperature Symbol VCC VIN VOUT T bias T stg Ratings -0.3 to +7.0 -0.3 to VCC+0.3 -0.3 to VCC -50 to+95 -65 to+150 Unit V V V C C Recommended Operating Conditions Parameter Power supply voltage High level input voltage Symbol VCC VIH Read Write VCC=2.7 to 6.5V Table 3 Conditions Min. 1.8 2.7 0.8xVCC 0.7xVCC 0.8xVCC 0.0 0.0 0.0 -40 Typ. Max. 6.5 6.5 VCC VCC VCC 0.2xVCC 0.3xVCC 0.2xVCC +85 Unit V V V V V V V V C Low level input voltage VIL CS, SK DI, RESET VCC=1.8 to 2.7V VCC=2.7 CS, SK to 6.5V DI, RESET VCC=1.8 to 2.7V Operating temperature Topr Rewriting Times Table 4 (Ta=-40C to 85C) Parameter Rewriting times Symbol NW Min. 10 5 Typ. Max. Unit times/word 2 Seiko Instruments Inc. CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A Pin Capacitance Table 5 (Ta=25C, f=1.0 MHz, VCC=5 V) Parameter Input capacitance Output capacitance Symbol CIN COUT Conditions VIN=0 V VOUT=0 V Min. Typ. Max. 8 10 Unit pF pF DC Electrical Characteristics Table 6 (Ta=-40C to 85C) Parameter Smbl Conditions Read/write operations VCC=5.0 V10 % Min. Typ. Max. 2.0 5.0 VCC=3.0 V10 % Min. Typ. Max. 1.0 2.0 Read operation VCC=1.8 to 2.7 V Min. Typ. Max. 0.5 Unit Current consumption (READ) Current consumption (PROGRAM) ICC1 ICC2 DO unloaded DO unloaded mA mA Table 7 (Ta=-40C to 85C) Parameter Smbl Conditions Read/write operations VCC=5.0 V10 % Standby current consumption Input leakage current Output leakage current Low level output voltage High level output voltage ISB ILI ILO VOL Input: VCC or GND VIN=GND to VCC VOUT=GND to VCC CMOS IOL=100 A TTL IOL=2.1 mA CMOS VCC=2.7 to 6.5 V: IOH=-100 A VCC=1.8 to 2.7 V: IOH=-10 A TTL IOH=-400 A Min. VCC-0.7 Typ. 0.1 0.1 Max. 1.0 1.0 1.0 0.1 VCC=2.7 to 6.5 V Min. Typ. 0.1 0.1 Max. 1.0 1.0 1.0 0.1 - Read operation VCC=1.8 to 2.7 V Min. VCC-0.3 Typ. 0.1 0.1 Max. 1.0 1.0 1.0 0.1 A A A V V V Unit VOH 0.45 VCC-0.7 Write enable latch data hold voltage Schmitt width VDH VWD CS, SK 2.4 1.5 VCCx0.1 1.5 VCCx0.1 1.5 0.05 V V V Seiko Instruments Inc. 3 CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A AC Electrical Characteristics Table 8 Measuring conditions Input pulse voltage 0.1xVCC to 0.9xVCC Output reference voltage 0.5xVCC Output load 100 pF Table 9 (Ta=-40C to 85C) Parameter Symbol Read / Write operations VCC=5.0 V10 % CS setup time CS hold time CS setup time (CPU) CS hold time (CPU) CS deselect time Data setup time Data hold time 1 data output delay 0 data output delay Clock frequency Clock pulse width Output disable time Program time tCSS tCSH tCSS(CPU) tCSH(CPU) tCDS tDS tDH tPD1 tPD0 fSK tSKH, tSKL tHZ tPR Min. 0.2 0.2 0.2 0.2 0.4 0.2 0.2 0.0 0.25 0 Typ. 50 4.0 Max. 0.4 0.4 2.0 150 10 VCC=2.7 to 6.5 V Min. 0.4 0.4 0.4 0.4 1.0 0.4 0.4 0.0 0.5 0 Typ. Max. 1.0 1.0 1.0 500 1000 4.0 10 Read operation VCC=1.8 to 2.7 V Min. 1.0 1.0 1.0 1.0 2.0 0.8 0.8 0.0 2.5 Typ. Max. s s s s s s s 2.0 s 2.0 s 0.2 MHz s ns ms Unit CS tCSS SK tDS DI tDH Valid data tSKH tSKL tCSH tCDS Valid data tPD0 DO tPD1 Input data is fetched at the rise of SK. Output data is triggered at the fall of SK. Figure 3 Timing chart CS tCSS(CPU) SK Figure 4 Timing chart of tCSS(CPU) and tCSH(CPU) when connected to CPU tCSH(CPU) 4 Seiko Instruments Inc. CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A Operation For each instraction, input op code, address and data per Table 1. After CS goes from "H" to "L", DI is latched, synchronized with the rise of SK. After the entire data is latched, the instructions input can be completed by changing CS to "H". Even after changing CS to low, instructions can not be latched by inputting a pulse to SK while DI remains low. NOTE: Between instructions, CS must be "H" during tCDS. 1. Read mode (READ) The READ instruction reads data from the specified address. Through the READ instruction, the op code and address are latched, synchronized with the rise of SK. At the falling edge of the 16th SK clock cycle from the start bit, (and all of the addresses are input), DO changes from high impedance (Hi-Z) status to data output status, and data is output, synchronized with the fall of SK. CS SK DI DO 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 * 16 17 31 32 0 1 0 1 0 0 0 A0 A1 A2 A3 A4 A5 A6 A7 tHZ D0 D14 D15 * "L" for S-29255A. 2. Write mode (PROGRAM, WRAL, and ERAL) There are three write instructions, PROGRAM, WRAL, and ERAL. Each write instruction automatically starts the write operation to nonvolatile memory after completing the specified clock input. The write operation is completed in 10 ms (tPR max.) , and the average write period is 4 to 5 ms. The S-29255A/29355A offer the following two methods to check the completion of the write operation to choose the shortest writing cycle. * By reading the status of the RDY/BUSY output pin While the write operation is continued, low level is output. And when the write operation is completed, high level is output. * By reading the status output signal After inputting a write instruction, a status output instruction must be performed (for the status output instruction, refer to "4. Status output") . NOTE: * After starting the write operation, CS need not be "H". * During the write operation, no instruction can be accepted except for status output. When using SK or DI during the write operation, the SK and DI signals should not be a status output instruction, or, CS must be "H". * The write operation can be performed when the RESET pin is at "L". After RESET is "H", even during write operation, the write operation is terminated, and data is unstable. Therefore, when writing is not performed, fix the RESET pin at "H" to inhibit all write operation and to avoid erroneous writing. * When the status output instruction is input after the write instruction, CS need not be "H". Seiko Instruments Inc. 5 CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A 2.1 Program (PROGRAM) mode This mode writes 16-bit data to the specified address. After CS goes to "L", input op code, address, and 16-bit data. The write operation starts at the rising edge of the 32nd SK clock cycle from the start bit. It is not necessary to make the data be "1" before the data write operation. CS SK DI DO RDY/ BUSY Hi-Z 1 1 2 3 4 5 6 7 8 9 10 11 12 12 13 14 15 15 16 * A7 17 17 31 32 0 1 0 0 1 0 0 A0 A1 A2 A3 A4 A5 A6 D0 D14 D15 Write operation starts tPR * "L" for the S-29255A Figure 6 2.2 Write all (WRAL) mode: option The same 16-bit data is written into all address areas in the memory. After CS changes from "H" to "L", input the op code, address, and 16-bit data. The write operation starts at the rising edge of the 32nd SK clock cycle from the start bit. It is not necessary to make the data be "1" before the data write operation. CS SK DI DO RDY/ BUSY Figure 7 2.3 Erase all (ERAL) mode: option Data in all address areas is erased. After erasing the data, all of the data is set to "1". After CS changes from "H" to "L", input the op code and address. The erase operation starts at the rising edge of the 16th SK clock cycle from the start bit. Hi-Z 1 1 2 3 4 5 6 7 8 9 10 11 12 12 13 14 15 16 17 31 32 0 1 0 0 0 0 1 * * * * * * * * D0 D14 D15 Write operation starts tPR CS SK DI DO RDY/ BUSY Hi-Z 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0 1 0 0 0 1 0 * * * * * * * * Erase operation Start tPR Figure 8 6 Seiko Instruments Inc. CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A 3. Program enable (EWEN) and program disable (EWDS) modes EWEN enables the write operation, and EWDS disables the write operation. The status to enable the write operation is called the program enable mode, and the status to disable the write operation is called the program disable mode. The S29255A/29355A is in program disable mode when the power is turned on. To prevent unexpected erroneous writing because of noise and CPU runaway, the S-29255A/29355A should be in program disable mode when writing is not performed. CS SK DI DO Hi-Z 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0 1 0 0 0 EWEN EWDS 11 00 * * * * * * * * Figure 9 4. Status output The status output instruction outputs several kinds of IC inside status (ready/busy, write inhibit/permit, and ECC set). Through the status output instruction, the op code and flag set code are latched, synchronized with the rise of SK. At the falling edge of 16th clock cycle from the start bit, DO is changed from high impedance (Hi-Z) status to data output status, and the data that shows the IC inside status is output synchronized with the fall of SK. The data is retained until CS goes to "H". NOTE : Even if the SK and DI inputs are changed when outputting data, the output data is not changed. CS SK DI 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0 1 0 1 DO Hi-Z 00 1 Busy flag Write permission ECC flag * 0 1 0 0 0 1 * * * * * tHZ Status output Figure 10 Table 10 IC inside status Flag name Write status flag Write permission flag ECC flag Flag set 00 10 01 "L"output During writing Program enable mode Showing not modified "H"output Completed writing Program disable mode Remarks For maintaining compatibility with M6M80021/41, "L" is always output. Redundant memory is not included. 5. Reset operation After RESET goes to "H" during the write operation, the write operation is terminated. At that time, only READ, EWEN, EWDS, and the status output instruction can be performed. Although RESET can be connected with CS, RESET must be fixed at "L" during writing. If RESET goes to "H" during writing, for 0.1 ms from the rise of RESET, no instruction except for status output can be accepted. Seiko Instruments Inc. 7 CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A Three-wire Interface * DI-DO direct connecting Although usually, a four-wire interface with CS, SK, DI, and DO is used for configuring a serial interface, a three-wire interface can be also used for configuring a serial interface by connecting DI and DO. However, since the three-wire system has a possibility that the data output from the serial memory IC interferes with the data output from the CPU, install a resistor between DI and DO (See Figure 11) to give preference to data output from CPU into DI. I/O CP SK SIO 10k to 100k CS SK S-29255A S-29355A DI DO Figure 11 Dimensions (Unit:mm) 1. 8-pin DIP 9.3 (9.6 max. ) 8 5 6.5 1 1.0 4 1.5 3.40.1 4.5 max. 3.1 min. 7.62 0.4 min. 2.54 0.50.1 0 to 15 0.3 -0.05 +0.1 Figure 12 2. 8-pin SOP 5.2 (5.5 max.) 8 5 0.4 4.4 6.20.3 1 4 1.50.1 0 min. 1.27 0.40.1 1.7max. 0.15 -0.05 +0.1 Figure 13 8 Seiko Instruments Inc. CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A Ordering Information S-29XXXA XX Package DP : DIP FE : SOP CA : Bare Chip Product name S-29255A: 2K-bit S-29355A: 4K-bit Note: Each bit is set to 1 before delivery (except bare chip) . Seiko Instruments Inc. 9 CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A Characteristics 1. DC characteristics 1.1 Current consumption (READ) ICC1 Ambient temperature Ta VCC=5.5V fSK=2 MHz DATA=0101 1.0 ICC1 (mA) 0.5 ICC1 (mA) 0.2 0.4 - 1.2 Current consumption (READ) ICC1 Ambient temperature Ta VCC=3.3V fSK=1MHz DATA=0101 - 0 -40 0 Ta (C) 85 0 -40 0 Ta (C) 85 1.3 Current consumption (READ) ICC1 Power supply voltage VCC Ta=25C fSK=1 MHz DATA=0101 1.0 ICC1 (mA) 0.5 - 1.4 Current consumption (READ) ICC1 Clock frequency fSK VCC=5.0V Ta=25C 1.0 ICC1 (mA) 0.5 - 0 2 3 4 5 VCC (V) 6 7 0 10K 100K 1M 2M fSK (Hz) - 1.5 Current consumption (PROGRAM) ICC2 Ambient temperature Ta VCC=5.5V Continuous PROGRAM mode DATA 0101 4.0 ICC2 (mA) 2.0 - 1.6 Current consumption (PROGRAM) ICC2 Ambient temperature Ta VCC=3.3V Continuous PROGRAM mode DATA 0101 1.0 ICC2 (mA) 0.5 0 -40 0 Ta (C) 85 0 -40 0 Ta (C) 85 1.7 Current consumption (PROGRAM) ICC2 Power supply voltage VCC Ta=25C DATA 0101 4.0 ICC2 (mA) 2.0 1.8 Standby current consumption ISB Ambient temperature Ta 10-6 10-7 10-8 ISB (A) 10-9 10-10 10-11 VCC=6.5V - 0 2 3 4 5 VCC (V) 6 7 -40 0 Ta (C) 85 10 Seiko Instruments Inc. CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A 1.9 Input leakage current ILI Ambient temperature Ta - 1.10 Input leakage current ILI Ambient temperature Ta - VCC=5.5V CS, SK, DI=0V 1.0 ILI (A) 0.5 ILI (A) 0.5 1.0 VCC=5.5V CS, SK, DI=5.5V 0 -40 0 Ta (C) - 85 0 -40 0 Ta (C) - 85 1.11 Output leakage current ILO Ambient temperature Ta VCC=5.5V DO=0V 1.0 ILO (A) 0.5 1.12 Output leakage current ILO Ambient temperature Ta VCC=5.5V DO=5.5V 1.0 ILO (A) 0.5 0 -40 0 Ta (C) - 85 0 -40 0 Ta (C) - 85 1.13 High level output voltage VOH Ambient temperature Ta VCC=4.5V IOH=-400A 4.6 1.14 High level output voltage VOH Ambient temperature Ta VCC=2.7V IOH=-100A 2.7 4.4 VOH (V) 4.2 VOH (V) 2.6 2.5 -40 0 Ta (C) - 85 -40 0 Ta (C) - 85 1.15 Low level output voltage VOL Ambient temperature Ta VCC=4.5V IOL=2.1mA 0.3 1.16 Low level output voltage VOL Ambient temperature Ta VCC=2.7V IOL=100A 30 0.2 VOL (V) 0.1 VOL (mV) 20 10 0 -40 0 Ta (C) 85 0 -40 0 Ta (C) 85 Seiko Instruments Inc. 11 CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A 1.17 High level output current IOH Ambient temperature Ta VCC=4.5V VOH=3.8V -5.0 IOH (mA) -2.5 - 1.18 High level output current IOH Ambient temperature Ta VCC=2.7V VOH=2.0V -2.0 IOH (mA) -1.0 - 0 -40 0 Ta (C) - 85 0 -40 0 Ta (C) - 85 1.19 Low level output current IOL Ambient temperature Ta VCC=4.5V VOH=0.45V 20 IOL (mA) 10 1.20 Low level output current IOL Ambient temperature Ta VCC=2.7V VOL=0.1V 2.0 IOL (mA) 1.0 0 -40 0 Ta (C) 85 0 -40 0 Ta (C) - 85 1.21 Input reversal voltage VINV Power supply voltage VCC Ta=25C DI and RESET pins 4.0 VINV (V) 2.0 1.22 Input reversal voltage VINV Power supply voltage VCC Ta=25C CS and SK pins 4.0 VINV (V) 2.0 VIL VIH 1 2 345 VCC (V) - 6 7 0 1 2 345 VCC (V) - 6 7 1.23 Input reversal voltage VINV Ambient temperature Ta 1.24 Input reversal voltage VINV Ambient temperature Ta VCC=5.0V DI and RESET 4.0 VINV (V) 2.0 VINV (V) 2.0 4.0 VCC=5.0V CS and SK pins VIH VIL -40 0 Ta (C) 85 -40 0 Ta (C) 85 12 Seiko Instruments Inc. CMOS 2K/4K-bit SERIAL E2PROM S-29255A/29355A 2. AC characteristics 2.1 Maximum operating frequency fmax Power supply voltage VCC Ta=25C 2M fmax (Hz) 1M 100K 10K 4 tPR (ms) 2 - 2.2 Program time tPR - Power supply voltage VCC Ta=25C 1 2 3 4 VCC (V) 5 1 2 3 4 5 VCC (V) 6 7 2.3 Program time tPR - Ambient temperature Ta VCC=5.0V 6 tPR (ms) 4 2.4 Program time tPR - Ambient temperature Ta VCC=3.0V 6 tPR (ms) 4 2 2 -40 0 Ta (C) - 85 -40 0 Ta (C) - 85 2.5 1 data output delay time tPD1 Ambient temperature Ta 2.6 1 data output delay time tPD1 Ambient temperature Ta VCC=4.5V DATA"0""1" 0.3 tPD1 (s) 0.2 0.4 tPD1 (s) 0.3 VCC=2.7V DATA"0""1" 0.1 0.2 0 -40 0 Ta (C) - 85 0 -40 0 Ta (C) - 85 2.7 0 data output delay time tPD0 Ambient temperature Ta 2.8 0 data output delay time tPD0 Ambient temperature Ta VCC=4.5V DATA"1""0" 0.3 tPD0 (s) 0.2 0.3 tPD0 (s) 0.2 VCC=2.7V DATA"1""0" 0.1 0.1 0 -40 0 Ta (C) 85 0 -40 0 Ta (C) 85 Seiko Instruments Inc. 13 Collection of Product FAQs Author: Ebisawa Takashi Question: What about the reliability and quality of the EEPROM? Answer: 1. The EEPROM must have a quality that is "special in a sense" and that differs from that of the other ICs. 14 Source electrode Control gate electrode Select gate electrode Drain electrode CG FG Thin oxide film SG UTO N+ P substrate N+ N+ GND [Data rewrite] Data rewrite refers to the injection or removal of electrons into or from the FG. In this process, electrons pass through a thin oxide film (UTO). The oxide film inherently acts as an insulator, but in this case the film conducts electricity (electrons are transferred). [Data retention] Data retention refers to the prevention of leakage of electrons stored in the FG. This must be assured for at least 10 years. To meet the above stated contradictory properties, high-quality thin oxide films (UTO) must be manufactured. Such UTOs are very thin (on the order of 10 nm), and stably manufacturing them requires a very difficult technique. 15 Collection of Product FAQs Author: Ebisawa Takashi Question: What about the distribution of application notes, usage notes, and malfunctions? Answer: Distribution of application notes All EEPROMS, including ours, may malfunction (false-writes may occur) due to an "operation in a lowvoltage region upon power-on/off" or "improper recognition of a command due to a noise signal." This defect is particularly common in the voltage region of the microcomputer transmitting commands to the EEPROM, where the voltage is lower than the lowest operating voltage of the microcomputer. To prevent this defect, usage notes have been prepared for the EEPROM. S-93C series, S29 series S-24CxxA series S-24CxxB series 16 Collection of Product FAQs Author: Ebisawa Takashi Question: What are some applications of the serial EEPROM? Answer: 1. Applications of the EEPROM The applications of the EEPROM can be roughly divided into the following types: Tuning memory, mode setting, ID codes: Arbitrary data can easily be rewritten and data can be retained during power-off. Replacement of a DIP switch (from a mechanical to an electronic switch): User costs are substantially reduced. Adjustment data for IC elements and other electronics: The accuracy of final products is increased. Adjustments, which had been performed manually, can be automated. 2. Specific examples of applications Based on the above applications, general examples are shown below. Basically, the EEPROM (a non-volatile memory) is useful for electronic applications. [Television] [Video] TV channel memory, screen setting data, data backup during power-off S-24C series VTR channel memory, program reservation data, image-quality adjustment data, data backup during power-off S-93Cx6A, S-29xx0A, S-24C series Maintenance data, adjustment data S-93Cx6A, S-29xx0A, S-24C series [White goods] [Vehicle-mounted] Troubleshooting data, maintenance data, adjustment data: Air bags, ABS, distance meters S-93Cx6A, S-29xx0A, S-24C series [Printers] Printer maintenance data S-93Cx6A, S-29xx0A, S-24C series 17 [Modems] Replacement of DIP switches, software (firmware) data S-93Cx6A, S-29xx0A, S-24C series [Mobile telephones] Personal ID, telephone-number data, address data, adjustment data S-24C series [Pagers] [PC cards] Personal ID, telephone-number data, address data S-93Cx6A, S-29Z series, S-24C series LAN cards and modem cards, replacement of dip switches, software data S-93C46A, S-29, S-24C series 18 Collection of Product FAQs Author: Kano Tomoo Question: What about the basic terms (verify, ready/busy function)? Answer: Verify, ready/busy (R/B) function This is a function to find out about an actual write operation (time). There are two methods, a "monitoring method based on the output condition of the DO pin" and a "method for monitoring the output condition of the Ready/Busy pin." This function eliminates the need to wait 10 ms for writing to be completed, thereby minimizing the write time according to the performance of the IC (performance value: 4 ms to 5 ms; 1 ms is ensured for the S-24C series). tCDS CS SK DI DO 1 1 2 0 1 3 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 D15 25 D0 tSV Hi-Z tPR VERIFY Standby tHZ1 busy ready Hi-Z (Note) Note that this differs from a normal verify function, which checks written data for errors. 19 Collection of Product FAQs Author: Kano Tomoo Question: What about the basic term (page write)? Answer: Page write S-24C series Writing to memory is normally executed in addresses. With the page write function, however, writing can be executed in pages (multiple addresses). This function can improve the efficiency of write commands and reduce writing time. Ex.:S-24C04B (4 K = 512 addresses x 8 bits) 16-byte page write function Writing in addresses: A write time of 10 msec. x 512 = 5.1 sec. is required. Page write: 10 msec. x 512 / 16 = 320 msec. However, compatibility with products from other companies must be confirmed. 20 Collection of Product FAQs Author: Kano Tomoo Question: What about the basic terms (Test pin, ORG pin) Answer: TEST pin This is an input pin used to enter a test mode when tests are conducted during an SII inspection process. This information is not provided to users. It can be used with a GND or Vcc connection, or in an open state (see note). This is important in maintaining compatibility with the pin layouts of other companies. Some users fear that the test mode may be inadvertently entered during operation, but such fears are unnecessary, as a potential of at least 10 V must be constantly supplied to enter the test mode. (Note) Since the TEST pin has a C-MOS input structure, the GND or Vcc connection is most suited for this pin. ORG (Organization) pin Input pin used to specify a memory configuration. A normal memory has a "16 bit/1 address" data configuration and includes no ORG pin. Competing manufacturers, however, have released products that enable data to be switched between "x16" and "x8" using "H" or "L" of the ORG pin. Since this function is provided for the 93C series of the NS code, there is a compatibility problem. SII has not yet released products featuring this function. 21 Collection of Product FAQs Author: Kano Tomoo Question: Malfunction (false-write, illegal data) Answer: [Malfunction of the EEPROM] (key words: false-store(illegal data) The EEPROM may malfunction (false-store) due to power-on/off or noise from the microcomputer. The defect rate, however, is on the order of ppm. Even though, this could be a serious problem for the users and to the applications. This problem essentially results from users' design techniques, but the manufacturer should make efforts to prevent this defect. As the unit price continuously decreases, this is particularly important in discriminating us from our competitors. Improving the business techniques of the manufacturer Malfunction basically results from a user's inappropriate operation, so the user is the responsible party. We, however, must bear responsibility for defects in the IC. Thus, the best action to take depends on whether the user or SII is responsible for the defect. In practice, however, it is difficult to determine from a user's claim or inquiry, or through an agent, who is responsible for a defect. - In such a case, inform the Business Techniques section of the situation as soon as possible. In addition, see FAQ on other "malfunctions" for technical information. 22 Collection of Product FAQs Author: Kano Tomoo Question: Power-on clear in S-93CxxA, S-29xxxA, notes for power-on (malfunction) Answer: 1. This IC series has a built-in power-on clear circuit. This circuit instantly initializes the EEPROM when the power voltage is activated. Since malfunction may occur if initialization has not been completed normally, the conditions specified below are required to activate the power voltage in order to operate the power-on clear circuit normally. 2. Notes on power-on Method for activating the power voltage As shown in Fig. 1, activate the power voltage starting from a maximum of 0.2 V so that the power voltage reaches the operating value within the time specified as tRISE. If the operating power voltage is, for example, 5.0 V, tRISE = 200 ms, as shown in Fig. 2. Thus, the power voltage must be activated within 200 ms. 23 trise (max) Power voltage VCC Vinit (max) 0.2v 0v (Note1) *1 At 0 V, there is no potential difference between the VCC and GND terminals of the EEPROM. tinit(max) (Note2) *2 t.nit is the time required for EEPROM to initialize internally. During this time period, the EEPROM will not accept commands. Fig. 1 Activation of the Power Voltage VCC (v) 5.0 4.0 3.0 2.0 Example) If the operating power voltage is 5 V, ensure that the power voltage reaches 5 V within 20.0 ms. Power voltage 5 0 1 0 0 1 5 0 2 0 0 (msec) Power-voltage activation time t rise (max) Fig. 2 Maximum power-voltage activation time Initialize time tinit The EEPROM is instantly initialized when the power voltage is activated. Since the EEPROM does not accept commands during initialization, the transmission of commands to the EEPROM must be started after this initialization time period. Fig. 3 shows the time required to initialize the EEPROM. 24 t int (seconds) 100m 10m 1m 100 10 1 1 10 100 1 m 1 0 m 1 0 0 m Power-voltage activation time Fig. 3 EEPROM initialization time EEPROM initialization time t rise (seconds) When the power-on clear circuit has finished initialization normally, the EEPROM enters a programdisabled state. If the power-on clear circuit does not operate, the following situation is likely: In some cases, a previously entered command has been enabled. If, for example, a programenabled command has been enabled and the input terminal mistakenly recognizes a write command due to extraneous noise while the next command is being entered, writing may be executed. The following may prevent the power-on clear circuit from operating: If the power lines of the microcomputer and EEPROM are separated from each other, and the output terminals of the microcomputer and EEPROM are wired or connected to each other, there may be a potential difference between the power lines of the EEPROM and microcomputer. If the voltage of the microcomputer is higher, a current may flow from the output terminal of the microcomputer to the power line of the EEPROM via a parasitic diode in the DO pin of the EEPROM. Therefore, the power voltage of the EEPROM has an intermediate potential to prevent power-on from being cleared. During an access to the EEPROM, the voltage may decrease due to power-off. Even if the microcomputer has been reset due to a decrease in voltage, the EEPROM may malfunction if EEPROM power-on clear operation conditions are not met. For the EEPROM power-on clear operation conditions, see "Method for Activating the Power Voltage." - 25 Collection of Product FAQs Author: Kano Tomoo Question: False-writes in S-93C, S-29 series: inadvertent activation of CS (malfunction) Answer: Inadvertent writing in the S-29 series In the S-29 series, when a CS input is inadvertently activated during a write command, undefined data may be written. Relevant timings are shown below. A command is composed of the following: "start bit + two command bits + address + (data)." The figure below shows the timings in which commands are set (In the figure, the portion denotes the rising edge of SK.) In the case of a write command, after a final address has been input and while 16-bit data is being input, undefined data is written when the CS input is changed from H to L. Activation of SK obtaining A [WRITE] CS SK DI DO 1 1 2 0 1 3 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 D15 25 D0 tCDS VERIFY tSV Hi-Z tPR busy ready tHZ1 Hi-Z Case in which, during a command entry, CS is changed from H to L with a timing that differs by a predetermined minimum number of clocks. 26 In the case of a write command, if the number of clocks is smaller than the predetermined value, data is loaded so as to be changed from D15 to D0. When, for example, CS is shifted from H to L after three clocks, data, which would otherwise have been stored in D15 to D13, is stored in D2 to D0, while undefined data is stored on the upper side a storage state in which the internal logic has been changed to either H or L). In addition, if the number of clocks is greater than the predetermined value, the last 16 pieces of data are stored correctly. 27 Collection of Product FAQs Author: Kano Tomoo Question: EEPROM compatibility table, cross reference Answer: EEPROM compatibility table Product name S-29130ADPA S-93C46ADP S-29130AFJA-TB S-93C46AFJ-TB S-29130ADFJA-TB S-93C46ADFJ-TB S-29131ADPA S-29131AFJA-TB S-29220ADPA S-29220AFJA-TB S-29220ADFJA-TB S-29221ADPA S-29221AFJA-TB S-29330ADPA S-29330AFJA-TB S-29330ADFJA-TB S-29331ADPA S-29331AFJA-TB S-29430ADP S-29430AFE-TF S-24C01ADPA-01 Key word EE,1KB,DIP,3W EE,1KB,SOP1,3W EE,1KB,SOP2,3W EE,1KB,DIP,3W,PROT EE,1KB,SOP1,3W,PROT EE,2KB,DIP,3W EE,2KB,SOP1,3W EE,2KB,SOP2,3W EE,2KB,DIP,3W,PROT EE,2KB,SOP1,3W,PROT EE,4KB,DIP,3W EE,4KB,SOP1,3W EE,4KB,SOP2,3W EE,4KB,DIP,3W,PROT EE,4KB,SOP1,3W,PROT EE,8KB,DIP,3W EE,8KB,SOP1,3W EE,1KB,DIP,2W NATIONAL SEMICONDUCTOR NM93C(S)46ZEN NM93C(S)46ZEM8 ATMEL AT93C46-10PI-2.5 AT93C46R-10SI-2.5 AT93C46W-10SI-2.5 ST Micro electronic ST93C46(7)AB6 ST93C46(7)TM6013TR ST93C46(7)AM6013TR ST93C46(7)B6 ST93C46(7)TM6013TR ST93C56(7)AB6 ST93C56(7)TM6013TR ST93C56(7)AM6013TR ST93C56(7)B6 ST93C56(7)TM6013TR ST93C66(7)AB6 ST93C66(7)TM6013TR ST93C66(7)AM6013TR ST93C66(7)B6 ST93C66(7)TM6013TR NM93C46ZEN NM93C46ZEM8 NM93C(S)56ZEN NM93C(S)56ZEM8 AT93C46-10PI-2.5 AT93C46R-10SI-2.5 AT93C56-10PI-2.5 AT93C56R-10SI-2.5 AT93C56W-10SI-2.5 NM93C56ZEN NM93C56ZEM8 NM93C(S)66ZEN NM93C(S)66ZEM8 AT93C56-10PI-2.5 AT93C56R-10SI-2.5 AT93C66-10PI-2.5 AT93C66R-10SI-2.5 AT93C66W-10SI-2.5 NM93C66ZEN NM93C66ZEM8 AT93C66-10PI-2.5 AT93C66R-10SI-2.5 AT24C01A-10PI-2.5 AT24C01A-10SI-2.5 NM24C02(03)LEN NM24C02(03)LEM8 NM24C04(05)LEN AT24C02-10PI-2.5 AT24C02N-10SI-2.5 AT24C04-10PI-2.5 ST24(25)C(W)01B6 ST24(25)C(W)01M6TR ST24(25)C(W)02B6 ST24(25)C(W)02M6TR ST24(25)C(W)04B6 S-24C01AFJA-TB-01 EE,1KB,SOP,2W S-24C02ADPA-01 EE,2KB,DIP,2W S-24C02AFJA-TB-01 EE,2KB,SOP,2W S-24C04ADPA-01 EE,4KB,DIP,2W 28 S-24C04AFJA-TB-01 EE,4KB,SOP,2W S-24C08ADPA-01 EE,8KB,DIP,2W NM24C04(05)LEM8 NM24C08(09)LEN NM24C08(09)LEM8 NM24C16(17)LEN NM24C16(17)LEM8 NM93C(S)46XLZEM8 AT24C04N-10SI-2.5 AT24C08-10PI-2.5 AT24C08N-10SI-2.5 AT24C16-10PI-2.5 AT24C16N-10SI-2.5 AT93C46R-10SI-1.8 AT93C46W-10SI-1.8 ST24(25)C(W)04M6TR ST24(25)C(W)08B6 ST24(25)C(W)08M6TR ST24(25)C(W)16B6 ST24(25)C(W)16M6TR ST93C46(7)TM6013TR ST93C46(7)AM6013TR ST93C46(7)AM6013TR ST93C56(7)TM6013TR ST93C56(7)AM6013TR ST93C56(7)AM6013TR ST93C66(7)TM6013TR ST93C66(7)AM6013TR ST93C66(7)AM6013TR S-24C08AFJA-TB-01 EE,8KB,SOP,2W S-24C16ADPA-01 EE,16KB,DIP,2W S-24C16AFJA-TB-01 EE,16KB,SOP,2W S-29L130AFE-TB S-29L130ADFE-TB S-29L131ADFE-TB S-29L220AFE-TB S-29L220ADFE-TB S-29L221ADFE-TB S-29L330AFE-TB S-29L330ADFE-TB S-29L331ADFE-TB EE,1KB,SOP1,3W,L/V EE,1KB,SOP2,3W,L/V EE,1KB,SOP2,3W,L/V,PROT EE,2KB,SOP1,3W,L/V EE,2KB,SOP2,3W,L/V EE,2KB,SOP2,3W,L/V,PROT EE,4KB,SOP1,3W,L/V EE,4KB,SOP2,3W,L/V EE,4KB,SOP2,3W,L/V,PROT NM93C(S)46XLZEM8 NM93C(S)56XLZEM8 AT93C46W-10SI-1.8 AT93C56R-10SI-1.8 AT93C56W-10SI-1.8 NM93C(S)56XLZEM8 NM93C(S)66XLZEM8 AT93C56W-10SI-1.8 AT93C66R-10SI-1.8 AT93C66W-10SI-1.8 NM93C(S)66XLZEM8 AT93C66W-10SI-1.8 29 Collection of Product FAQs Author: Kano Tomoo Question: What about the basic terms (memory protect, reset, CS)? Answer: Memory protect, reset S-29xx1A, S-29x94A, S-29x55A Function for prohibiting a write command from being executed in a certain region of the memory space. This function is enabled by controlling the protect or reset input pin (select/deselect protect). This reset prevents the microcomputer from running uncontrollably and also prevents false-writes caused by noise in order to protect data. Ex.: Storage of ID codes and product shipment adjustment data (Note) S-29xx1A and S-29x94A protect 50% of memory, starting with the leading address. CS, /CS (/CS: S-29x55A, S-29x94A) CS is an input pin used to select the execution of a command. It is selected using "H" and deselected using "L" (the reverse is true for /CS) /CS is useful on the interface of the microcomputer (L active is mainly used for the microcomputer). Malfunction, however, is likely to be caused by noise upon power-on if a command is executed at the GND level. CS SK DI DO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 29 30 31 32 33 34 45 46 47 48 49 50 1 0 0 0 X X X * * A7 A6 A5 A4 A3 A2 A1 A0 Hi-Z D1 D1 D1 D2 D1 D0 D1 D1 D1 D2 D1 D0 D1 D1 D1 Hi-Z A7A6A5A4A3A2A1A0+1 A7A6A5A4A3A2A1A0+2 30 31 Collection of Product FAQs Author: Kano Tomoo Question: Concept of the compatibility, features, and markets of the S-29 series Answer: [Compatibility of the EEPROM] In terms of memory, most SII EEPROMs are compatible with our competitors' standard products in their operation codes. If another company's product is to be replaced by a corresponding SII product, the DC/AC specifications desired by the user must be carefully determined. The key words for the products are given below. Our competitor's 93C-series products are compatible with SII's S-29xx0A-series products, and our competitor's 24C-series products are compatible with SII's S-24C-series products. The key word for each company is given below. NM93C AT93C 93C M93C CAT93C AK93C BR93C 32 Collection of Product FAQs Author: Kano Tomoo Question: How are operation codes classified? A: [EEPROM operation codes] In the serial EEPROM, the operation codes can be classified into several types. Our competitors have released products compatible with each type of operation code. The key words of the operation codes are given below. 3-wire Microwire 4-wire type GI (General Instruments) code Mitsubishi code Serial EEPROM 2-wire IICBUS SII original code NS (National Semiconductor) code SPI 1. Serial and parallel Data reading and writing are divided into serial and parallel types. 33 ex.: Parallel 1 0 1 0 ex.: Serial A0 A1 A2 A3 D0 D1 D2 D3 0 0 0 1 Addresses and data are processed in parallel. [Advantage] Fast processing A:0101 D:1100 Addresses and data are processed in serial. A1 D0 :1100 [Advantages] The size can be reduced due to the reduced number of I/O terminals, and fewer wires are required for the substrate. The package can be downsized and manufactured inexpensively. 2. 3-wire type, microwire, 4-wire type Composed of four pins, including three input pins CS, SK, and DI, and an output pin DO. Since DI and DO can be directly coupled together, the EEPROM can be virtually composed of three pins (the 4-wire type includes an additional Ready/Busy pin, but is still referred to as a "3-wire type"). NS code: The key word is "93Cx." Compatible with SII S-29xxOA. General code used by many competing companies. Mass produced and low in cost. GI code General Instrument Inc.'s original code. Its markets continue to dwindle. Mitsubishi code: The key word is "M6M8."Compatible with SII S-29x55A. Serial-port direct-coupling type in which commands and data are composed of x8 units. Intended for the TV and VTR markets and primarily sold as a set with Mitsubishi microcomputers. SII original code: S-29x9xA Serial-port direct-coupling type in which commands and data are composed of x8 units. Intended for technology-oriented users. 3. 2-wire type, IICBUS: The key word is "24C." Compatible with SII S-24CxxA. Composed of two pins: an input pin (SCL) and an I/O pin (SDA). Phillips Inc. owns a relevant patent. [Advantages] Fewer wires are required, and the microcomputer port can be shared with another IICBUS. TV set maker will be main market. 4. SPI: The key word is "25C." Not compatible with SII. Under development. Composed of four pins: three input pins CS, SCK, and SI, and an input pin SO. In the case of the EEPROM, the advantages are high speed (5 MHz at 5v) and a high capacity (128 Kbytes). 34 Collection of Product FAQs Author: Kano Tomoo Question: What are the basic operation codes? Answer: [Terms required to understand EEPROM data sheets (1)] Basic commands Data read, READ Reads data from a specified address Data write, WRITE or PROGRAM Writes data to a specified address Data erase, ERASE Erases data at a specified address (all "1"'s) Chip write, WRAL Writes the same (word) data in all address spaces Chip erase, ERAL Erases data in all address spaces (all "1"'s) Program disable, EWDS or PDS Prohibits write operations (WRITE), and prevents false-writes caused by noise or uncontrollable running of the CPU Program enable, EWES or PEN Enables write operations (WRITE) - [Note] When the power to the EEPROM is turned on, the internal circuit of the IC is reset and the program disable mode is entered. Thus, following power-on, the program enable command must be entered in order to write data. 35 Memory space: In the case of the S-29130A (64 words X 16 bits) Address Data Memory space in which a command can be used to write data freely 64 words 36 Collection of Product FAQs Author: Kano Tomoo Question: What about the basic terms. (continuous read, sequential read)? Answer: Continuous read, sequential read S-93C series, S-29 series, S-24C series Function by which data is read from a specified address using a read command, followed by the output of the next address. This is useful when there is a large amount of user data (ex.: ID codes). Continuos read CS SK 1 2 3 4 5 6 7 8 9 10 11 12 23 24 25 26 27 28 39 40 41 42 43 44 DI 1 1 0 A5 A4 A3 A2 A1 A0 DO Hi-Z 0 D 15 D 14 D 13 D2 D1 D0 D 15 D 14 D13 D2 D1 D0 D15 D14 D13 Hi-Z - Serial-port direct coupling, microcomputer interface, 8-bit command S-29x9xA, S-29x55A, S-2900A The serial port is a serial I/O port provided for a microcomputer. A device that can be easily and directly coupled to this port is referred to as a "serial-port direct-coupling type" or a "microcomputer interface." 1. The EEPROM is configured as follows for simple direct coupling: Data is input at the rising edge of the SK input clock, and output at its falling edge. Commands and data are input and output in 8 bits. 2. A microcomputer with a serial port communicates in 8 bits (8 clocks). This configuration can substantially reduce the number of programs required for the microcomputer. The advantages are easy programming and a reduced ROM capacity. 37 38 Collection of Product FAQs Creator: Takashi Ebisawa Question: What is the EEPROM? Answer: 1. Electrically Erasable Programmable Read Only Memory Why this memory is referred to as "read only" despite the fact that it enables data to be rewritten? The EEPROM requires a longer time for writing than a RAM, so it is used exclusively for reading. What is the "memory"? Elements storing data. Data is generally represented by the digits "0" and "1." What is the "ROM"? Read Only Memory Reference: RAM is Random Access read write Memory. 39 |
Price & Availability of S29255A
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |