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L6270 L6271
MILLI-ACTUATOR DRIVER
PRODUCT PREVIEW
90V BCD MIXED TECHNOLOGY SO24 AND SO20 PLASTIC SMD PACKAGE 4.5 TO 13.2V OPERATIVE VOLTAGE 25 TO 40V OUTPUT VOLTAGE RANGE SELECTABLE BY EXTERNAL RESISTOR FULL-WAVE RESONANT DC-DC CONVERTER USING SINGLE COIL FOR DUAL HIGH VOLTAGE GENERATOR WITH OUTPUT SLEW RATE CONTROL AND SELF CURRENT LIMITING LINEAR MODE AND BANG-BANG MODE 40V OR 0/+80V OPERATIVE VOLTAGE DRIVING CONFIGURATION MODES: 1. SINGLE ENDED VOLTAGE MODE 2. DIFFERENTIAL VOLTAGE MODE 3. SINGLE ENDED CHARGE MODE DOUBLE OPERATIONAL AMPLIFIERS WITH 500KHZ GAIN BANDWIDTH PRODUCT AND LOAD DRIVING CAPABILITY FROM 0.4NF UP TO 24NF BLOCK DIAGRAM
SO20 ORDERING NUMBERS: L6270
SO24
L6271
2.5V VOLTAGE REFERENCE 2.5V ANALOG SHIFTING CIRCUITRY POWER SAVING SLEEP MODE DESCRIPTION The L6270/1 is a piezoelectric actuator driver.
VSUPPLY 4.5V-13V CRES COIL +40V V512-AP 20 POWER SUPPLY HVP 17 16 + 1 K RESONANT DC-DC STEP-UP CONTROLLER 1 1 2 18 RCCOMP 22 HVM 1 K 19 23 HVP 8 9 + 6 5 2.5V HVM 1 K 20 100A 200A 1 K GND-P OUTK-B OUT1-B HVM HBRIDGE 47nF -40V 100nF BANG-LIN 21 Vfdb COIL 3 24 HVP 100nF
INBINB+
INAINA+
OUTK-A OUT1-A V512A VSUPPLY
50K SLEEP 7 SLEEP ANALOG LEVEL SHIFTER VOUT=VIN-2.5 VOUT 10 V-SHIFTED VIN 11 VIN0-5 12 GND-A 13 VREF 100nF 14 IREF 25K BAND-GAP REFERENCE + + -
INTERNAL CURRENT BIAS
15 DC2REF RREFDC
D98IN959A
February 1999
This is preliminary information on a new product now in development. Details are subject to change without notice.
1/10
L6270 - L6271
PIN CONNECTION (SO20)
H-BRIDGE GND-P COIL OUT1-A OUTK-A SLEEP INA(inv) INA(not inv) GND-A Vref
1 2 3 4 5 6 7 8 9 10
D98IN968
20 19 18 17 16 15 14 13 12 11
HVP HVM RC comp V512-AP OUT1-B OUTK-B INB(inv) INB(not inv) DC2ref Iref
PIN FUNCTIONS (SO20)
N. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name H-BRIDGE GND-P COIL OUT1-A OUTK-A SLEEP INA (inv) INA (not inv) GND-A Vref Iref DC2ref INB (not inv) INB (inv) OUTK-B OUT1-B V512-AP RC comp HVM HVP Description 40V Half Bridge output for negative charge pump. Power ground. Coil for positive step up. Output ampl.A. Hi current output ampl.A. Sleep mode for stand-by condition (1=SLEEP 0=operative). Inverting input of A-amplifier. Non Inverting input of A-amplifier. Analog ground. Precise 2.5V reference voltage. External resistor for precise internal current reference. Reference voltage for DC-DC converter X20. Non Inverting input of B-amplifier. Inverting input of B-amplifier. Hi current output ampl.B. Output ampl.B. Analog&Power voltage supply 5 to 12V. DC-DC converter compensation network. Negative High voltage generated op amp supplier. Positive High voltage generated op amp supplier.
2/10
L6270 - L6271
PIN CONNECTION (SO24)
H-BRIDGE GND-P COIL N.C. OUT1-A OUTK-A SLEEP INA(inv) INA(not inv) V-SHIFTED Vin 0-5 GND-A 1 2 3 4 5 6 7 8 9 10 11 12
D98IN969
24 23 22 21 20 19 18 17 16 15 14 13
HVP HVM RC comp LIN/BANG V512-AP OUT1-B OUTK-B INB(inv) INB(not inv) DC2ref Iref Vref
PIN FUNCTIONS (SO24)
N. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Name H-BRIDGE GND-P COIL N.C. OUT1-A OUTK-A SLEEP INA (inv) INA (not inv) V-SHIFTED Vin 0-5 GND-A Vref Iref DC2ref INB (not inv) INB (inv) OUTK-B OUT1-B V512-AP LIN/BANG RC comp HVM HVP Output ampl.A. Hi current output ampl.A. Sleep mode for stand-by condition (1=SLEEP 0=operative). Inverting input of A-amplifier. Non Inverting input of A-amplifier. Analog level shifter output Vin-Vref (-2.5 to +2.5 dynamic range) Input positive voltage Analog ground. Precise 2.5V reference voltage. External resistor for precise internal current reference. Reference voltage for DC-DC converter X20. Non Inverting input of B-amplifier. Inverting input of B-amplifier. Hi current output ampl.B. Output ampl.B. Analog&Power voltage supply 5 to 12V. Linear or Bang-bang select pin (V512 = BANG 0 = Linear) DC-DC converter compensation network. Negative High voltage generated op amp supplier. Positive High voltage generated op amp supplier. Power ground. Coil for positive step up. Description 40V Half Bridge output for negative charge pump.
3/10
L6270 - L6271
ABSOLUTE MAXIMUM RATINGS
Symbol V512 HVP HVM IN A&B Vin o to 5 Tamb Tstg Parameter Supply voltage pin 20 referred to Ground Positive high voltage referred to HVM Negative high voltage referred to Ground Amplifier input voltage common mode Level shifts input voltage Operative Ambient Temperature Storage Temperature Value 14 84 -42 6 -0.5 to +5.5 -20 to +80 -40 to +125 Unit V V V V V C C
All the voltage value are referred to ground.
ELECTRICAL CHARACTERISTICS (All the following parameters are specified @ 27C and V512 = 12V, unless otherwise specified.)
Symbol V512 HVP (1) Parameter Main power supply Output positive Voltage Test Condition Double Supply Voltage Single Supply Voltage V512 8 Single Supply Voltage V512 8 External filter cap. 100nF Bang-Bang Mode Linear Mode 19 20 Min. 4.5 25 30 25 -40 Typ. 40 80 40 -25 2.5 0.8 21 Max. 13.2 Unit V V V V V V V
HVM HVripple
Output negative voltage HVP, HVM ripple
DC-DC gain I, hvp I, hvm Top Fswitch (2) Rds, on Iboost CP-slope Isleep Vref Ivref Vref, cap Iref, res Vsup
Ratio of HVP and DC-DC ref. voltage PIN15 Output current (see figure 1a) Time to operating condition Switching Frequency Boost transistor ON resistance Boost transistor current limiting Charge Pump Slope Total current in sleep mode Reference voltage at PIN13 Reference voltage output current Filter capacitor at PIN13 Resistor at PIN14 for precise internal current (100A) Minimum OpAmp supply Voltage (HVP if externally given) OpAmp DC gain OpAmp Gain Bandwidth product OpAmp Input dynamic voltage DC-DC Converter switched-off when DC2REF voltage lower than
80
5 550 4 700 150 1 2.6 1 100 25
2.4 -1 10
2.5
ms kHz mA V/s mA V mA nF k V V
Double Supply Single Supply
V512 +4 V512 +4 130 500 -5 1.2 5 10 0.6
DC gain GBW DCinp DC-DC OFF
Cload 0.4nF to 24nF Double Supply Voltage Double supply Single supply
dB KHz V V V
4/10
L6270 - L6271
ELECTRICAL CHARACTERISTICS (continued)
Symbol Vout DC, Ibias Iout PSRR,P PSRR,N Cload C int K Ierr (3) Voffset DCShift range Parameter OpAmp Output dynamic voltage OpAmp Bias supply current (both) OpAmp Dynamic Output current OpAmp Positive power supply rejection ratio OpAmp Negative power supply rejection ratio OpAmp Load capacitance range OpAmp Integration capacitance OpAmp Current ratio OUTK/OUT1 OpAmp Ioutk OpAmp Input offset voltage Dynamic Shifter Input Range Test Condition Capacitive load Min. HVM Typ. Max. HVP 7 75 Unit V mA mA dB dB 24 24 10.2 50 10 4 nF nF
@ 50kHz @ 50kHz Voltage mode Gain min 20dB Charge mode Gain min 20dB
-75 TBD TBD 0.4 0.4 9.8 -10 1
10
Iout1 = 0
A mV V
Note 1: Selectable by external resistor. Note 2: Set by external Coil and Capacitor. Note 3: It will be write after silicon characterization, it's designed for a maximum offset of a few mA. In charge mode the Piezo is in open loop, and if Cpiezo = 0.4nF with a maximum Current error of 5A the Maximum long time voltage drift is 12mV/s
Figure 1a. HVP load regulation in single supply mode".
VS (V) 38 36
Supply=8V
D99IN1003
34 32 30 28 26 24 22 0 0.004 0.008 0.012 0.016 IL(A)
Supply=5V
5/10
L6270 - L6271
Figure 1. Charge Mode Configuration (only a suggestion, the application is completely free according with Electrical Characteristics).
Qpiezo=K*[Cint*(1+Ra/Rb)+C]*Vdac Qpiezo=Cost*Vdac Cost=k*[Cint*(1+Ra/Rb)+C] HVP 1 K
Vdac
+ Cpiezo HVM 1 K RP
Rb C
Ra Cint
D98IN970A
OPERATIONAL AMPLIFIERS DESCRIPTION Each driver has two output stages scaled in current by a factor K = 10. In voltage mode configuration the two outputs are shorted. In charge mode configuration OUT1 drives a capacitor Cint and is closed in feedback, while OUTK drives the piezo, mirroring the current supplied to Cint, with a current multiplied by a K factor (see Fig.1). The supply voltage can be internally generated by the DC-DC converter, or external, maintaining the DC-DC converter in sleep mode (PIN15 shorted to ground), in this case the supply voltage can be 0 to V512+4 minimum value up to 80V in single supply or V512+4 to 40V symmetrical to ground. The drivers have 130dB DC gain and the Bandwidth is 500KHz. Stability is granted with a minimum gain of 20dB, for a capacitive load in the range 0.4nF up to 24nF. The drivers can be supplied with HVP-HVM (double supply mode) or with HVP-Ground (single supply mode). In both cases they can achieve a rail-to rail output dynamic range with a maximum load current of 75mA. In double supply mode the input stage has 5V/+5V dynamic range, while in single supply mode it has 1.2V up to 10V input dynamic range. A 2.5V internal reference voltage is available at one pin (Vref) that can be used to close the feedback if the input signal is symmetrical around 2.5V. In this case the output dynamic is symmetrical around 2.5V. It is present a 2.5V down level shifter that can be connected between the input signal and the input of the opamp, to work inter6/10
nally with a signal symmetrical to ground. DC-DC CONVERTER DESCRIPTION The DC-DC converter inside the chip can be supplied from 5V up to 12V and has two parts, one to supply the positive and one to supply the negative voltage. The positive one takes the reference from the pin 2 DC REF and multiplies it by 20 to have the output voltage. If DC2REF is less than 0.6V the whole DC-DC converter is shut down and the high voltages have to be supplied from external. In Sleep Mode (sleep pin) HVM is shorted to GND. When in single supply, no load has to be connected to H-bridge output and HVM must be connected to GND. The topology is a standard resonant full-wave boost one: the LC oscillation is kept running all the time and a set of comparators is used to synchronize turning on and off of the power MOS in order to have zero current and zero voltage switching and furthermore controlled rectification. The step-up converter is designed to work in "Bang-Bang" mode and in Linear mode, in this case an AC compensation network is required (RC-comp) to guarantee the stability in a wide operative range (i.e. changing coil, load, output and input voltage...). In Bang-Bang mode (Bang/Lin=V512 high condition) whenever the output HVP goes down fixed threshold (Vth,out = 20 DC2REF), the next oscillation phase is more powerful and is used to transfer energy from the power supply to the output. In Linear mode, according to the ouput voltage, the current loaded into the coil is changing like a
L6270 - L6271
Voltage Loop-Current Controlled system, and in every pulse there is a regulated power transfer to the load. The resonant LC topology has been chosen in order to limit the voltage slew-rate across the coil within reasonable values and so, to minimize irradiation problems. The negative converter is a simple charge transfer: it is supplied by the positive high voltage and it capacitively translates this positive voltage Figure 3. DC-DC converter
down to a negative one, obviously to limit irradiation problems also the charge output has a limited slew-rate; moreover to reduce intermodulation phoenomenas the charge output is synchronized with the LC oscillations of the resonant boost. This negative voltage is (not counting drops on external rectification diodes) in tracking with the positive one and so the negative output controller is not required.
V512 V512
+ -
BACK-UP OSCILL. V512
DC-DC LOGIC + + RS HVP
200A
HVP
B :5 + L L 2.5V
-
+40V
HVM
-40V
D98IN971A
7/10
L6270 - L6271
DIM. MIN. A A1 B C D E e H h L K 10 0.25 0.4 2.35 0.1 0.33 0.23 12.6 7.4
mm TYP. MAX. 2.65 0.3 0.51 0.32 13 7.6 1.27 10.65 0.75 1.27 0.394 0.010 0.016 MIN. 0.093 0.004 0.013 0.009 0.496 0.291
inch TYP. MAX. 0.104 0.012 0.020 0.013 0.512 0.299 0.050 0.419 0.030 0.050
OUTLINE AND MECHANICAL DATA
SO20
0 (min.)8 (max.)
L
h x 45
A B e K H D A1 C
20
11 E
1
1 0
SO20MEC
8/10
L6270 - L6271
DIM. MIN. A A1 A2 B C D E e H h k L 0.40 10.0 0.25 0.33 0.23 15.20 7.40 2.35 0.10
mm TYP. MAX. 2.65 0.30 2.55 0.51 0.32 15.60 7.60 1.27 10.65 0.75 0.394 0.010 0.013 0.009 0.598 0.291 MIN. 0.093 0.004
inch TYP. MAX. 0.104 0.012 0.100 0.0200 0.013 0.614 0.299 0,050 0.419 0.030
OUTLINE AND MECHANICAL DATA
0 (min.), 8 (max.) 1.27 0.016 0.050
SO24
h x 45
A2
0.10mm .004 Seating Plane
B
e
A1
A
K L H
A1
C
D
24
13
1
12
SO24
E
9/10
L6270 - L6271
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com
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