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| U3550BM Low-Power FM Transmitter / Synthesizer System 26 to 50 MHz Description The U3550BM is a radio-frequency IC for analog cordless telephone applications in the 26/50-MHz band (CTO standard). The IC performs full duplex communication. The transmitting and receiving frequency depends on whether the IC is used in the handset or in the base station. The U3550BM's frequency converter consists of an FM transmitter with switchable output power and receiver Mixer 1 in the same unit. A two-wire bus interface can be used for frequency control as well as for switching the transmitter's power amplifier and the receiver. Fine frequency adjustment of the reference crystal oscillator is programmable. The receive part is designed for a double-conversion architecture. The incoming radio-frequency signal will be filtered and amplified before reaching the first mixer. At this stage, the RF signal will be converted down to the first intermediate frequency (10.7 MHz) by using a local adjustable oscillator (VCO3). The frequency of this oscillator is controlled by the PLL. The transmitter part contains two PLL-controlled VCOs. The frequency modulation is accomplished by superposing the incoming audio signal on the first PLL control voltage. In this system, the frequency is a product of mixing VCO1 with local oscillator (VCO3). The FMmodulated carrier is amplified by external power amplifier before entering the output filter and the antenna connector. Features D All PLLs and most of the oscillators are integrated D All functions and channel selection controllable by D D D D serial bus Receiver Mixer 1 with integrated image rejection Up to 25 channels selectable depending on CT0 standard Integrated oscillator circuit with external crystal (11.15 MHz) Programmable carrier-modulation frequency VBAT DELVB DELGND MIXO Mixer 1 + 45 - 45 sin LOGND Application Block Diagram VCC om po ne systems PCLO 10.7 MHz cos 2 N Phase comparator cos D1 D2 Loop filter Phase comparator AGND VSS MODIN D CT0 (USA, France, Spain, Netherlands, Portugal, Korea, Taiwan, New Zealand, China) D Narrowband voice and data transmitting / receiving nt s OSCVDD K 20 557.5 KHz VCO 1 2 Ad ro nic C MIXIN MIXVB LO1 LO2 VCO 3 sin Mixer 2 + 45 - 45 VTX RFOVB RFO VCO 2 RFOGND Figure 1. Block diagram Rev. A2, 10-Sep-98 Gm bH MCKA OSCGND XCK MCKO 11.15 MHz Oscillator interface Serial BUS interface C D D3 P GREF Phase comparator LFGND MLF 13280 1 (25) Preliminary Information U3550BM Pin Description MCKO 1 D C OSCGND 2 3 4 28 VCC 27 VSS 26 MCKA 25 MODIN 24 LFGND 23 MLF 22 VBAT 21 AGND 20 VTX 19 RFOVB 18 RFO XCK 5 OSCVDD 6 DELVB 7 DELGND 8 GREF 9 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 MIXIN 10 MIXVB 11 MIXO 12 LO1 13 LO2 14 11623 17 RFOGND 16 LOGND 15 PCLO Figure 2. Pinning Order Information Extended Type Number U3550BM-AFL U3550BM-AFLG3 Ad ro nic C om po ne Package SO28 SO28 nt s Taped and reeled 2 (25) Preliminary Information Gm bH Remarks Pin 1 2 3 4 5 6 7 Function Clock output for peripherals Data input of serial bus Clock line of serial bus Oscillator ground Oscillator input (11.15 MHz) Oscillator supply input Phase correction VCO3 supply input DELGND Phase correction VCO3 ground GREF Voltage reference for internal current sources MIXIN Mixer input MIXVB Mixer-supply input MIXO Mixer output LO1 Tank elements for LO are connected to these pins LO2 PCLO Phase comparator PLL3 output LOGND VCO3 ground RFOGND RF transmit output ground RFO RF transmit output RFOVB Power-supply input of RF transmit output buffer VTX Power-supply output of RF external power amplifier AGND Analog ground VBAT Power supply of analog part MLF Modulator loop filter LFGND Modulator loop-filter ground MODIN Modulator input signal MCKA Peripheral-clock output adjustment VSS Digital ground VCC Power supply of digital part Symbol MCKO D C OSCGND XCK OSCVDD DELVB Rev. A2, 10-Sep-98 U3550BM VCO Adjustments To be able to use a wide VCO frequency range (i.e., VCO2 = 26.3 to 49.9 MHz), VCO1 and VCO2 have a rough adjust and a fine adjust to increase the frequency range given by the phase comparator. The 4 rough adjusts for VCO1 and VCO2 (3 used in VCO1) are correlated to the country setting. For each country, there are two sets of VCO rough adjust settings, one for the base and one for the handset (see tables Channel Frequencies, Dividers and Country Settings). To achieve the adaption to the various country standards, there is a fine adjust with 32 steps for VCO1 and VCO2. These fine adjusts can be set manually (for test purposes) or by the automatically mode. Theoretically, the indicator of the change (increase/ decrease when the voltage of the phase comparator is too high) is selectable. The programming value `1', however, is necessary. Setting normal conditions VCO1: EAFA1 = 1, automatic fine adjust VCO1 enabled SAFA1 = 1, sign of auto fine adjustment VCO1 = 1. Setting for VCO2 is identical. For VCO3, there is no internal adjustment. Duration Adjustment of the Anti-Backlash Signals The phase comparators of the modulator- and the mixerloop have a 2-bit adjustment for the duration of the upand down pulses when the loop is locked (anti-backlash). Best results can be achieved by setting all the bits (AMOD[2:1], AMIX[2:1]) to 0. Adjustment of the Modulator Gain To fulfill all requirements of the various countries, three conversion gains of the modulator are selectable by the bits GMOD[1:0]. Clock-Output Divider Adjustment The MCKO pin is a clock output derived from the crystal oscillator. It can be used to drive a microprocessor or other remote components and thereby reduces the number of crystals required. The crystal oscillator frequency can be divided by an integer value: 1, 2, 3, 4, 6 or switched off. The divider value is adjusted by an analog level on the MCKA pin. Table 1 shows the clock-output value on MCKO for different divider values and the corresponding level required on MCKA. Crystal oscillator = 11.15 MHz. Speed-up of the Modulator Loop Filter To obtain a fast locking time for the modulator loop, there is a precharge and a speed-up mode for the external loop filter. During receive mode (VCO3 enabled, VCO1 disabled), the modulator loop filter is precharged to 1.25 V. Table 1. Clock-output values Level on MCKA Level on MCKA for VCC = 3.6 V Corresponding divider Ad ro nic C 0 to 7% VCC 0 to 0.25 X During the first 30 ms after enabling VCO1, the modulator phase comparator is in speed-up mode. In this mode, the current of the phase comparator which charges the loop filter is much larger than in normal mode. The duration of the speed-up mode depends on the number of oscillator clock cycles. 13% to 27% VCC 33% to 47% VCC 53% to 67% VCC 73% to 87% VCC 0.47 to 0.97 6 1.19 to 1.69 4 2.7875 1.91 to 2.41 3 3.716 2.63 to 3.13 2 5.575 om po ne nt s For country settings, see tables Channel Frequencies, Dividers and Country Settings. For the ranges, see tabel Electrical Characteristics (RF transmitter). Gm bH 93% to VCC 3.35 to 3.6 1 11.15 Corresponding clock on MCKO (MHz) No output 1.858 Rev. A2, 10-Sep-98 3 (25) Preliminary Information U3550BM Frequency Synthesis Loop filter 3) VCO 3 2 fLO N Phase comparator K fRef3 96 11627 D1 2) VCO 2 Loop filter Phase comparator fRef D2 VCO 1 nt s 1) Loop filter om po ne Figure 3. 1) 2) 3) Modulator loop Mixer loop Local oscillator (LO) loop Modulator Loop and Mixer Loop Dividers France Spain Netherlands Portugal USA (channels 1 to 10) USA (new channels) Taiwan New Zealand Korea D1 4 2 2 2 8 6 8 4 8 D2 8 8 8 8 8 6 8 8 8 For France, Spain, Netherlands, Portugal, Taiwan and New Zealand, fRef2 and fmod do not change when the channel changes. For USA and Korea is valid: fRef2 and fmod are varying according to the channel number. For all countries, fRef2 and fmod are identical for base set and handset. Reference Frequency Dividers for Local Oscillator K0 = 4460 K1 = 2230 K2 = 1784 K3 = 1115 K4 = 892 K5 = 446 fRef3 = 2.5 kHz fRef3 = 5 kHz fRef3 = 6.25 kHz fRef3 = 10 kHz fRef3 = 12.5 kHz fRef3 = 25 kHz 4 (25) Ad ro nic C D3 2 4 4 4 1 1 1 2 1 Preliminary Information Gm bH 11.15 MHz 2 D3 fmod Q P+ 223 Phase comparator fRef1 = 557.5 kHz fRef2 (MHz) 1.075 0.9 0.9 0.625 0.955 0.943 0.9625 0.5875 0.955 fmod (MHz) 4.3 1.8 1.8 1.25 7.64 5.66 7.70 4.70 7.64 Rev. A2, 10-Sep-98 U3550BM Modulator PLL The fractional divider has been chosen to increase reference the frequency of the modulator PLL. 557.5 kHz Local Oscillator PLL f Ref3 + fN LO mod P The circuit is remoted by an external microcontroller through the serial bus. The data is a 12-bit word: P: integer part of the fractional divider Q: fractional part of the fractional divider Q + 223 A0 - A3: address of the destination register (0 to 15) f mod -P 557.5 kHz D0 - D7: contents of register 223 kHz + 557.7kHz 2.5 The data line must be stable when the clock is high and data must be shifted serially. After a 12-clock period, the transfer to the destination register is generated (internally) by a low-to-high transition of the data line when the clock is high. The frequency step 2.5 kHz is a fraction of the reference frequency 557.5 kHz Q Qx (P ) 1) ) (223-Q)P + P ) 223 223 om po ne nt s Microprocessor A2 A3 For each comparison cycle (fRef1 = 557.5 kHz), the accumulator content is incremented by the Q value and the divider divides by the P value. When the accumulator value reaches or exceeds 223, the divider divides by the value (P + 1). Then, the accumulator holds the excess value (accumulator value - 223). After 223 cycles, the correct division is executed. Gm bH Data Clock D C Figure 4. 2nd word +f Q ) 223 Serial Bus Interface 96 11787 Data (D) D0 D1 D2 A0 A1 Ad ro nic C Clock (C) 1st word 13279 Word transmission Transfer condition Figure 5. Serial bus transmission Rev. A2, 10-Sep-98 5 (25) Preliminary Information U3550BM Data 4 Clock 8 0 Address Decoder 15 96 11653 Figure 6. Data (D) A1 om po ne A2 A3 tch tcl nt s teon teh Clock (C) tsud thd Gm bH 128 Latches Commands D0 teoff 96 11654 Ad ro nic C 6 (25) Figure 7. Rev. A2, 10-Sep-98 Preliminary Information U3550BM Content of Internal Registers The registers have the following structure D7 D6 D5 D4 D3 D2 D1 D0 R0 - R4: reserved for U3500BM R5: Gain VCO2 free free KV23 KV22 KV21 KV2[3:1]: Gain VCO2 M12: Frequency of phase-comparator in Mixer loop ETXO M1CP UDM1 IMIXI GMOD1 nt s DV1I3 DV3I3 R6: Country setting bits Gm bH M12 GMOD0 free DV1I2 DVlI1 DV1F2 DVlF1 DV3I2 DV3I1 DV3I10 DV3I9 reserved U3500 free R7: VCO1 setting AMOD2 AMOD1 RA11 om po ne RA10 ETXO: Enable HF-transmit output M1CP: Changes 1 dB compression point of Mixer 1 UDM1: Up-/down-mixing of Mixer 1 IMIXI: Inverse inputs of phase comparator in mixer loop GMOD[1:0]: Modulation gain of VCO1 DVlI0 AMOD[2:1]: Lengthening anti-backlash signal modulator loop RA1[1:0]: Rough adjustment VCO1 DVlI[3:0]: Divider setting VCO1 integer part R8: Divider VCO1 fractional part DV1F7 DV1F6 DV1F [7:0]: Divider setting VCO1 fractional part R9: Divider VCO3 integer part LSB DV3I7 DV3I6 Ad ro nic C DV1F5 DV1F4 DV1F3 DVlF0 DV3I5 DV3I4 DV3I0 DV3I [7:0]: Divider setting VCO3 integer part LSB R10: Divider VCO3 integer part MSB free DV3I14 DV3I13 DV3I12 DV3I11 DV3I8 DV3I[14:8]: Divider setting VCO3 integer part MSB Rev. A2, 10-Sep-98 7 (25) Preliminary Information U3550BM R11: Setting VCO2 and VCO3 free free FRMT free AMIX2 AMIX1 RA21 RA20 FRMT: Output frequency range of Mixer T AMIX[2:1]: Lengthening anti-backlash signal mixer loop RA2[1:0]: Rough adjustment VCO2 R12: Divider for country setting, fine adjust oscillator FAOS2 FAOS1 FAOS0 D31 D30 D20 FAOS[2:0]: Oscillator fine adjust D3[1:0]: Setting divider D3 D20: Setting divider D2 D1[1:0]: Setting divider D1 R13: VCO1 enable and fine adjust EVCO1 SAFA1 EAFA1 FA14 FA13 nt s FA12 FA22 E10K R14: VCO2 enable and fine adjust EVCO2 SAFA2 EAFA2 om po ne FA24 FA23 E25K E12K5 EVCO1: Enable VCO1 SAFA1: Sign for automatic fine adjust VCO1 EAFA1: Enable automatic fine adjust VCO1 FA1[4:0]: Fine adjust VCO1 for manual adjustment EVCO2: Enable VCO2 and Mixer T SAFA2: Sign for automatic fine adjust VCO2 EAFA2: Enable automatic fine adjust VCO2 FA2 [4:0]: Fine adjust VCO2 for manual adjustment EVCO3 Ad ro nic C R15: VCO3 enable, oscillator enable, selection of phase comparator VCO3 and speed-up phase comparator for VCO3 EOSC SU3 E6K25 E5K EVCO3: Enable VCO3 and Mixer 1 EOSC: Enable oscillator SU3: Speed-up phase-comparator for VCO3 E25K: Selection phase-comparator frequency VCO3: fRef3 = 25 kHz E12K5: Selection phase-comparator frequency VCO3: fRef3 = 12.5 kHz E10K: Selection phase-comparator frequency VCO3: fRef3 = 10 kHz E6K25: Selection phase-comparator frequency VCO3: fRef3 = 6.25 kHz E5K: Selection phase-comparator frequency VCO3: fRef3 = 5 kHz E5K, E6K25, El0K, El2K5, E25K = 0 Selection phase-comparator frequency VCO3: fRef3 = 2.5 kHz 8 (25) Preliminary Information Gm bH D11 FA11 FA21 D10 FA10 FA20 Rev. A2, 10-Sep-98 U3550BM Absolute Maximum Ratings Parameters Supply voltage Junction temperature Ambient temperature Storage temperature Power dissipation Tamb = 60C Symbol VS Tj Tamb Tstg Ptot Min. Max. 5.5 +125 +75 +125 520 Unit V C C C mW SO28 Thermal Resistance Junction ambient Parameters SO28 Symbol RthJA Gm bH Value 120 Min. 3.1 Typ. 3.6 Max. 5.2 5 200 700 5 12 14 70 100 300 26.3125 49.9900 5.7 3.42 2.85 2 6 16 130 390 0.3 -25 -50 Unit K/W Electrical Characteristics Tamb = +25C; VS = VBAT = MIXVB = RFOVB = DELVB = VCC = OSCVDD; VS = 3.6 V; fMIXIN = 26.40 MHz, fdev = 2.5 kHz; VMIXIN = 2.24 mVrms; fRFO = 41.4 MHz; (Fh8) fMODIN = 1.0 kHz; VMODIN = 0.5 Vrms; Voffset = 1.5 V; VMCKA = VCC; all blocks disabled (ETXO = EVCO1 = EVCO2 = EVCO3 = 0); unless otherwise specified. Test circuit see figure 8. Parameters Power supply Operating voltage range Operating current in active mode (1) Operating current in standby mode, oscillator off (1) Operating current in standby mode, oscillator on Operating current in RX mode Operating current in active mode without TX output Operating current in active mode RF transmitter MODIN input impedance RFO output impedance RFO output-voltage level Lowest operating frequency Highest operation frequency TX conversion gain RFO - MODIN Test Conditions / Pins Symbol Unit V om po ne nt s VBAT = MIXVB = RFOVB = DELVB = 2.9 V OSCVDD = VCC = 0 V VBAT = MIXVB = RFOVB = DELVB = VCC = OSCVDD = 3.6 V, VMCKA = 0 V, EOSC = 0 VBAT = MIXVB = RFOVB = DELVB = VCC = OSCVDD = 3.6 V, VMCKA = 3.6 V, EOSC = 1 EVCO3 = 1 EVCO1 = EVCO2 = 1 mA mA mA mA mA mA kW ETXO = 1, no load at RFO Ad ro nic C Demodulated distortion THD Load = 200 ETXO = 0; no load France base channel 1 (Fb1) (2) USA base channel 9 (US1b9) (2) Eb1: fRFO = 31.025 MHz US1h9: fRFO = 49.99 MHz Fh6: fRFO = 41.4375 MHz for VS = 3.1 to 5.2 V Eb1: Df = 5.0 kHz Fh9: Df = 1.5 kHz for VS = 3.1 to 5.2 V W V MHz MHz kHz/V kHz/V kHz/V % Residual modulation (4) on demodulated signal THD measurement with psophometric filter dB Rev. A2, 10-Sep-98 9 (25) Preliminary Information U3550BM Parameters Spurious at RFO output (delta versus carrier) Test Conditions / Pins a/ Fb6: fRFO = 26.375 MHz b/ US1h9: FRFO = 49.99 MHz (3) Df = 2.5 kHz Df = 12.5 kHz Df = 557.5 kHz Df = 1/2 fmod Df = fmod for VS = 3.1 to 5.2 V Symbol Min. 60 Typ. Max. Unit dBc VTX output capability VTX output leakage current PLLs Charge-pump output voltage Precharge voltage at the loop filter Charge-pump output current in speed-up mode Charge-pump output current gp p p Charge-pump leakage current VCO1 gain Receiver input mixer (Mixer 1) Input frequency range Output frequency Input resistance Input capacitor Output impedance Voltage gain on MIXO DV with and without load ETXO = 0; current to GND VS = 3.1 to 5.2 V EVCO1 =1, output high EVCO3 = 1 EVCO1 = 0 EVCO1 = 1 VMLF = 1.25 V, output high VMLF = 1.25 V, output low VMLF = 1.25 V, output high VMLF = 1.25 V, output tristate VMLF = 0 V, then 2.5 V EVCO3 = 1 ILOAD = 3 mA Gm bH 0.5 1 2.5 1.4 2.63 1.65 -300 6.2 -6.2 140 -200 8 -4.3 +100 156 50 10.7 3.0 3.5 330 80 12.5 17 3.6 4 390 110 15.5 20 20 14 18 -17.7 -14.3 V mA V V 2.38 1.15 -400 4.3 -8 -100 121 mA mA mA nt s 2.4 3 210 50 9.5 14 -19 -16 nA kHz/V MHz MHz kW pF om po ne M1CP = 0 M1CP = 1 M1CP = 0 M1CP = 1 for: Fb8: fLO = 30.7 MHz FRF11 = 20 MHz UDM1 = 1 Fb8: fLO = 30.7 MHz FRF21 = 41.4 MHz UDM1 = 0 W W dB dB Noise figure Ad ro nic C Input compression point US1h10: fLO = 57.67 MHz FRF31 = 46.97 MHz UDM1 = 1 for VS = 3.1 to 5.2 V BW = 1 MHz 50-W input impedance M1CP = 0 M1CP = 1 50-W input impedance dB dBm dBm 10 (25) Rev. A2, 10-Sep-98 Preliminary Information U3550BM Parameters Third order input intercept point Test Conditions / Pins M1CP = 0 M1CP = 1 50-W input impedance FRF1 = 41.4 MHz FRF2 = 41.4125 MHz Input level 1 = -30 dBm Input level 2 = -30 dBm Fb8: fLO = 30.7 MHz UDM1 = 0 FRF11 = 41.4 MHz FRF12 = 20 MHz (image) Fb8: fLO = 30.7 MHz UDM1 = 0 FRF21 = 20 MHz FRF22 = 41.4 MHz (image) Fb8: fLO = 57.67 MHz UDM1 = 1 FRF31 = 46.97 MHz FRF32 = 68.37 LO to RF MIXIN input isolation LO to IF MIXO output isolation Isolation transmit path to receive path (crosstalk) Symbol Min. -7 -4 Typ. -5 -2 Max. Unit dBm dBm Image-frequency rejection Gm bH 20 dB Ad ro nic C Logical part Inputs: C, D Low-voltage input High-voltage input Inputs: C, D, MCKA Input leakage current (0 < VI < VCC) Input leakage current Pin XCK (0 < VI < VCC) Output impedance at MCKO Serial bus (figure 8) Data set-up rime Data hold time Clock low time Clock high time Hold time before transfer condition Data low pulse on transfer condition Data high pulse on transfer condition om po ne Fb8: measuring, fLO = 30.7 MHz Fb8: measuring, fLO = 30.7 MHz Synthesizer programming as `Taiwan channel 5' (see page 21), transmitter modulation (Pin 25) for = 3 kHz, fmod = 300 to 3400 kHz, M1CP = 1, fRF (Pin 10) = 45.35 or 48.35 MHz unmodulated, -25 dBm (50 measuring frequency modulation of the 10.7 MHz signal at MIXO (Pin 12) nt s 28 Vil Vih Vi 0.8 VCC -1 -5 0.5 0.1 0 2 2 0.1 0.2 0.2 tsud thd tcl tch teon teh teoff 0.2 1.2 mVrms mVrms dB Df W) 0.2 VCC 1 5 1.0 mA mA kW ms ms ms ms ms ms ms (1) (2) IS = IVBAT + IVCC + IMIXVB + IRFOVB + ODELVB + I1OSCVDD 1-measure 11.15 MHz at MCKO pin 2-measure FRFO at RFO pin (3) (4) See country channels Ratio between demodulated audio level with and without 1-kHz modulation Rev. A2, 10-Sep-98 11 (25) Preliminary Information U3550BM Fine Adjustment of the Oscillator Frequency To set the oscillator's frequency exactly to 11.5 MHz, the frequency is adjustable in 8 steps. By adding 3 different internal capacities, the frequency can be reduced. The values of these capacitors are designed to be 0.7 pF (FAO0), 1.4 pF (FAO1) and 2.8 pF (FAO2). Parameters Oscillator frequency without reduction Changing the oscillator's frequency with FOSC reduction Test Conditions / Pins FAOS (0:2) = 0 FAO2 FAO1 FAO0 0 0 1 0 1 0 1 0 0 1 1 1 Min. Gm bH Typ. 11.15 Max. 100 200 400 700 C6 56 nF R3 R4 Unit MHz Hz Hz Hz Hz + VCC VMCKA C8 DC 28 0.1 F R5 om po ne VBatt VRFOVB DC f = 1 kHz Vrms = 500 mV Voffset = 1.5 V sin C 9 1 F nt s 200 Test Circuit 5.6 k + 27 DC 26 + 25 24 + DC + W 17 C7 4.7 nF 16 15 24 k W 23 22 21 20 19 18 U3550BM 7 8 1 Ad ro nic C 2 3 4 5 6 9 C2 10 nF 10 VMIX VB 11 12 13 14 VOSC VDD + + VBatt + 110 nH R1 330 C4 10 nF D C W C5 L1 DC DC VDELVB C3 1 nF DC Inputs serial bus + f = fRF Rout = 50 Vrms = 2.24 mV *) 12 pF *) D2 R3 56 kW *) BPY51 or BZT55C51 11.15 MHz C1 4.7 pF W D1 sin 13281 Figure 8. Test circuit 12 (25) Rev. A2, 10-Sep-98 Preliminary Information U3550BM Channel Frequencies, Dividers and Country Settings To meet all requirements of various countries France (F), Spain (E), Netherlands (NL), USA and Portugal (P), Korea, Taiwan, New Zealand and modes base (b), handset (h) several bits have to be set which do not change for the different channels. These settings are called country settings. The country-setting bits are followed by further bits enabling the adjustments given below. * * * * D Rough adjustments for 2 VCOs D Setting three integer dividers mixer and modulator loop D Modulator gain D Up-/down-mixing Mixer 1 and Mixer T D Output-frequency range of Mixer T D Gain adjustment of the VCO2 Name Register RA1[0:1] RA2[0:1] D1[0:1] D20 D3[0:1] KV[1:3] GMOD[0:1] IMIXI UDM1 FRMT om po ne Function Rough adjust VCO1 Rough adjust VCO2 Integer divider D1 Integer divider D2 Integer divider D3 Gain VCO2 Modulator gain Up-/down-mixing Mixer T Up-/down-mixing Mixer 1 Output-frequency range Mixer T nt s Notes 00: is the highest frequency 00: is the highest frequency Division by 2, 4, 6, 8 Division by 6, 8 Division by 1, 2, 4 00: gain minimal 0: if fVCO2 lower than fLO Gm bH 3 4 4 2 3 6 3 2 2 2 1: supra band active (handset) 0: for fVCO2 - fLO < 6 MHz Note: Setting the fractional dividers: For Q, send the binary equivalent of the numbers given below. For P (integer part), send the D2 complement (16 - P) i.e. Fb1 (P = 7, Q = 159 => integer: send 16 - P = 9, fractional: send 159) Rev. A2, 10-Sep-98 Ad ro nic C 13 (25) Preliminary Information U3550BM France CT0 Base Set Country setting: Name Value Setting RA1[1:0] 00 max RA2[1:0] 11 min D1B[1:0] 11 4 D2B0 1 8 D3B[1:0] 01 2 KV2[3:1] 100 GMOD[1:0] 01 mid IMIXI 0 supra UDM1 0 infra FRMT 0 low Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 RX Channel Frequency (MHz) 41.3125 41.3250 41.3375 41.3500 41.3625 41.3750 41.3875 41.4000 41.4125 41.4250 41.4375 41.4500 41.4625 41.4750 41.4875 France CT0 Handset Country setting: Name Value Setting RA1[1:0] 00 max RA2[1:0] 01 high D1B[1:0] 11 4 om po ne D2B0 1 8 D3B[1:0] 01 2 KV2[3:1] 101 1st LO Frequency (MHz) 30.6125 30.6250 30.6375 30.6500 30.6625 30.6750 30.6875 30.7000 30.7125 30.7250 30.7375 30.7500 30.7625 30.7750 30.7875 nt s GMOD[1:0] 01 mid Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz 14 (25) Ad ro nic C Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 RX Channel Frequency (MHz) 26.3125 26.3250 26.3375 26.3500 26.3625 26.3750 26.3875 26.4000 26.4125 26.4250 26.4375 26.4500 26.4625 26.4750 26.4875 1st LO Frequency (MHz) 37.0125 37.0250 37.0375 37.0500 37.0625 37.0750 37.0875 37.1000 37.1125 37.1250 37.1375 37.1500 37.1625 37.1750 37.1875 Preliminary Information Gm bH IMIXI 1 infra UDM1 1 supra N 4898 4900 4902 4904 4906 4908 4910 4912 4914 4916 4918 4920 4922 4924 4926 FRMT 0 low N 5922 5924 5926 5928 5930 5932 5934 5936 5938 5940 5942 5944 5946 5948 5950 Rev. A2, 10-Sep-98 U3550BM France CT0 Modulation Loop Frequency and Divider fmod = 4.3 MHz, P = 7, Q = 159 Spain CT0 Base Set Country setting: Name Value Setting RA1[1:0] 10 mid RA2[1:0] 10 low D1B[1:0] 00 2 D2B0 1 8 D3B[1:0] 11 4 KV2[3:1] 100 Gm bH GMOD[1:0] 10 high IMIXI 1 infra GMOD[1:0] 10 high IMIXI 0 supra UDM1 0 infra FRMT 0 low Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 RX Channel Frequency (MHz) 39.925 39.950 39.975 40.000 40.025 40.050 40.075 40.100 40.150 40.175 40.200 40.225 Spain CT0 Handset Country setting: Name Value Setting RA1[1:0] 10 mid RA2[1:0] 01 high D1B[1:0] 00 2 om po ne 1st LO Frequency (MHz) 29.225 29.250 29.275 29.300 29.325 29.350 29.375 29.400 29.450 29.475 29.500 29.525 N 4676 4680 4684 4688 4692 4696 4700 4704 4712 4716 4720 4724 D2B0 1 8 D3B[1:0] 11 4 nt s KV2[3:1] 100 UDM1 1 supra FRMT 0 low Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Spain CT0 Modulation Loop Frequency and Divider fmod = 1.8 MHz, P = 3, Q = 51 Rev. A2, 10-Sep-98 Ad ro nic C Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 RX Channel Frequency (MHz) 31.025 31.050 31.075 31.100 31.125 31.150 31.175 31.200 31.250 31.275 31.300 31.325 1st LO Frequency (MHz) 41.725 41.750 41.775 41.800 41.825 41.850 41.875 41.900 41.950 41.975 42.000 42.025 N 6676 6680 6684 6688 6692 6696 6700 6704 6712 6716 6720 6724 15 (25) Preliminary Information U3550BM Netherlands CT0 Base Set Country setting: Name Value Setting RA1[1:0] 10 mid RA2[1:0] 10 low D1B[1:0] 00 2 D2B0 1 8 D3B[1:0] 11 4 KV2[3:1] 100 GMOD[1:0] 10 high IMIXI 1 infra UDM1 0 infra FRMT 0 low Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 RX Channel Frequency (MHz) 39.9375 39.9625 39.9875 40.0125 40.0375 40.0625 40.0875 40.1125 40.1375 40.1625 40.1875 40.2125 Netherlands CT0 Handset Country setting: Name Value Setting RA1[1:0] 10 mid RA2[1:0] 01 high D1B[1:0] 00 2 om po ne D2B0 1 8 D3B[1:0] 11 4 KV2[3:1] 001 1st LO Frequency (MHz) 29.2375 29.2625 29.2875 29.3125 29.3375 29.3625 29.3875 29.4125 29.4375 29.4625 29.4875 29.5125 nt s GMOD[1:0] 10 high Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 Netherlands CT0 Modulation Loop Frequency and Divider fmod = 1.8 MHz, P = 3, Q = 51 16 (25) Ad ro nic C RX Channel Frequency (MHz) 31.0375 31.0625 31.0875 31.1125 31.1375 31.1625 31.1875 31.2125 31.2375 31.2625 31.2875 31.3125 1st LO Frequency (MHz) 41.7375 41.7625 41.7875 41.8125 41.8375 41.8625 41.8875 41.9125 41.9375 41.9625 41.9875 42.0125 Preliminary Information Gm bH IMIXI 0 supra UDM1 1 supra N 4678 4682 4686 4690 4694 4698 4702 4706 4710 4714 4718 4722 FRMT 0 low N 6678 6682 6686 6690 6694 6698 6702 6706 6710 6714 6718 6722 Rev. A2, 10-Sep-98 U3550BM USA CT0 Base Set Country setting channel 1 - 10 (USA1): Name Value Setting RA1[1:0] 10 mid RA2[1:0] 00 max D1B[1:0] 01 8 D2B0 1 8 D3B[1:0] 00 1 KV2[3:1] 100 GMOD[1:0] 00 low IMIXI 1 infra UDM1 0 infra FRMT 1 high Country setting new channels (channel 11 - 25, USA2): Name Value Setting RA1[1:0] 01 mid RA2[1:0] 01 high D1B[1:0] 10 6 D2B0 0 6 D3B[1:0] 00 1 KV2[3:1] 110 Gm bH GMOD[1:0] 01 mid IMIXI 1 infra UDM1 0 infra FRMT 0 low Channel frequencies and 1st LO divider, fRef3 = 5 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 New channels Channel Number 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 RX Channel Frequency (MHz) 49.670 49.845 49.860 49.770 49.875 49.830 49.890 49.930 49.990 49.970 Rev. A2, 10-Sep-98 Ad ro nic C RX Channel Frequency (MHz) 48.760 48.840 48.860 48.920 49.020 49.080 49.100 49.160 49.200 49.240 49.280 49.360 49.400 49.460 49.500 om po ne 1st LO Frequency (MHz) 38.970 39.145 39.160 39.070 39.175 39.130 39.190 39.230 39.290 39.270 N 7794 7829 7832 7814 7835 7826 7838 7846 7858 7854 nt s 1st LO Frequency (MHz) 38.06 38.14 38.16 38.22 38.32 38.38 38.40 38.46 38.50 38.54 38.58 38.66 38.70 38.76 38.80 N 7612 7628 7632 7644 7664 7676 7680 7692 7700 7708 7716 7732 7740 7752 7760 17 (25) Preliminary Information U3550BM USA CT0 Handset Country setting channel 1 - 10 (USA1): Name Value Setting RA1[1:0] 10 mid RA2[1:0] 00 max D1B[1:0] 01 8 D2B0 1 8 D3B[1:0] 00 1 KV2[3:1] 100 GMOD[1:0] 00 low IMIXI 0 supra UDM1 1 supra FRMT 1 high Country setting new channels (channel 11 - 25 USA2): Name Value Setting RA1[1:0] 01 mid RA2[1:0] 00 max D1B[1:0] 10 6 D2B0 0 6 D3B[1:0] 00 1 KV2[3:1] 110 GMOD[1:0] 01 mid Channel frequencies and 1st LO divider, fRef3 = 5 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 New channels Channel Number 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 RX Channel Frequency (MHz) 46.610 46.630 46.670 46.710 46.730 46.770 46.830 46.870 46.930 46.970 18 (25) Ad ro nic C RX Channel Frequency (MHz) 43.720 43.740 43.820 43.840 43.920 43.960 44.120 44.160 44.180 44.200 44.320 44.360 44.400 44.460 44.480 om po ne 1st LO Frequency (MHz) 57.31 57.33 57.37 57.41 57.43 57.47 57.53 57.57 57.63 57.67 nt s 1st LO Frequency (MHz) 54.42 54.44 54.52 54.54 54.62 54.66 54.82 54.86 54.88 54.90 55.02 55.06 55.10 55.16 55.18 Preliminary Information Gm bH IMIXI 0 supra UDM1 1 supra FRMT 0 low N 11462 11466 11474 11482 11486 11494 11506 11514 11526 11534 N 10884 10888 10904 10908 10924 10932 10964 10972 10976 10980 11004 11012 11020 11032 11036 Rev. A2, 10-Sep-98 U3550BM USA CT Modulation Loop Frequencies and Dividers N Channel 1 2 3 4 5 6 7 8 9 10 New channels N Channel 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 Q 34 10 34 18 10 2 58 50 42 34 66 50 50 50 42 P 13 13 13 13 13 13 13 13 13 13 Q 157 95 105 157 123 157 157 157 157 181 fmod (MHz) 7.640 7.485 7.510 7.640 7.555 7.640 7.640 7.640 7.640 7.700 nt s Rev. A2, 10-Sep-98 Ad ro nic C om po ne Gm bH fmod (MHz) 5.66 5.60 5.66 5.62 5.60 5.58 5.72 5.70 5.68 5.66 5.74 5.70 5.70 5.70 5.68 19 (25) Preliminary Information U3550BM Portugal CT0 Base Set Country setting: Name Value Setting RA1[1:0] 01 min RA2[1:0] 10 low D1B[1:0] 00 2 D2B0 1 8 D3B[1:0] 11 4 KV2[3:1] 010 GMOD[1:0] 10 high IMIXI 1 infra UDM1 0 infra FRMT 0 low Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 RX Channel Frequency (MHz) 37.000 37.025 37.050 37.075 37.100 37.125 37.150 37.175 37.200 37.225 37.250 37.275 Portugal CT0 Handset Country setting: Name Value Setting RA1[1:0] 01 min RA2[1:0] 01 high D1B[1:0] 00 2 om po ne D2B0 1 8 D3B[1:0] 11 4 KV2[3:1] 001 1st LO Frequency (MHz) 26.300 26.325 26.350 26.375 26.400 26.425 26.450 26.475 26.500 26.525 26.550 26.575 nt s GMOD[1:0] 10 high Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 Portugal CT0 Modulation Loop Frequency and Divider fmod = 1.25 MHz, P = 2, Q = 54 20 (25) Ad ro nic C RX Channel Frequency (MHz) 27.550 27.575 27.600 27.625 27.650 27.675 27.700 27.725 27.750 27.775 27.800 27.825 1st LO Frequency (MHz) 38.250 38.275 38.300 38.325 38.350 38.375 38.400 38.425 38.450 38.475 38.500 38.525 Preliminary Information Gm bH IMIXI 0 supra UDM1 1 supra N 4208 4212 4216 4220 4224 4228 4232 4236 4240 4244 4248 4252 FRMT 0 low N 6120 6124 6128 6132 6136 6140 6144 6148 6152 6156 6160 6164 Rev. A2, 10-Sep-98 U3550BM Taiwan CT0 Base Set Country setting: Name Value Setting RA1[1:0] 10 mid RA2[1:0] 00 max D1B[1:0] 01 8 D2B0 1 8 D3B[1:0] 00 1 KV2[3:1] 110 GMOD[1:0] 01 low IMIXI 1 infra UDM1 0 supra FRMT 1 higher Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 RX Channel Frequency (MHz) 48.2500 48.2750 48.3000 48.3250 48.3500 48.3750 48.4000 48.4250 48.4500 48.4750 Taiwan CT0 Handset Country setting: Name Value Setting RA1[1:0] 10 mid RA2[1:0] 00 max D1B[1:0] 01 8 D2B0 1 8 D3B[1:0] 00 1 om po ne nt s KV2[3:1] 110 1st LO Frequency (MHz) 37.5500 37.5750 37.6000 37.6250 37.6500 37.6750 37.7000 37.7250 37.7500 37.7750 Gm bH GMOD[1:0] 00 low IMIXI 0 supra N 6008 6012 6016 6020 6024 6028 6032 6036 6040 6044 UDM1 1 supra FRMT 1 high Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 Taiwan CT0 Modulation Loop Frequency and Divider fmod = 7.70 MHz, P = 13, Q = 181 Rev. A2, 10-Sep-98 Ad ro nic C RX Channel Frequency (MHz) 45.2500 45.2750 45.3000 45.3250 45.3500 45.3750 45.4000 45.4250 45.4500 45.4750 1st LO Frequency (MHz) 55.9500 55.9750 56.0000 56.0250 56.0500 56.0750 56.1000 56.1250 56.1500 56.1750 N 8952 8956 8960 8964 8968 8972 8976 8980 8984 8988 21 (25) Preliminary Information U3550BM New Zealand CT0 Base Set Country setting: Name Value Setting RA1[1:0] 00 max RA2[1:0] 01 high D1B[1:0] 11 4 D2B0 1 8 D3B[1:0] 01 2 KV2[3:1] 110 GMOD[1:0] 01 mid IMIXI 1 infra UDM1 0 infra FRMT 0 low Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 11 12 13 14 15 16 17 18 19 20 RX Channel Frequency (MHz) 40.2500 40.2750 40.3000 40.3250 40.3500 40.3750 40.4000 40.4250 40.4500 40.4750 New Zealand CT0 Handset Country setting: Name Value Setting RA1[1:0] 00 max RA2[1:0] 11 min D1B[1:0] 11 4 D2B0 1 8 D3B[1:0] 01 2 om po ne KV2[3:1] 101 nt s GMOD[1:0] 01 mid 1st LO Frequency (MHz) 29.5500 29.5750 29.6000 29.6250 29.6500 29.6750 29.7000 29.7250 29.7500 29.7750 Channel frequencies and 1st LO divider, fRef3 = 6.25 kHz Channel Number 11 12 13 14 15 16 17 18 19 20 New Zealand CT0 Modulation Loop Frequency and Divider fmod = 4.70 MHz, P = 8, Q = 96 22 (25) Ad ro nic C RX Channel Frequency (MHz) 34.2500 34.2750 34.3000 34.3250 34.3500 34.3750 34.4000 34.4250 34.4500 34.4750 1st LO Frequency (MHz) 44.9500 44.9750 45.0000 45.0250 45.0500 45.0750 45.1000 45.1250 45.1500 45.1750 Preliminary Information Gm bH IMIXI 0 supra UDM1 0 supra N 4728 4732 4736 4740 4744 4748 4752 4756 4760 4764 FRMT 0 low N 7192 7196 7200 7204 7208 7212 7216 7220 7224 7228 Rev. A2, 10-Sep-98 U3550BM Korea CT0 Base Set Country setting: Name Value Setting RA1[1:0] 10 mid RA2[1:0] 00 max D1B[1:0] 01 8 D2B0 1 8 D3B[1:0] 00 1 KV2[3:1] 100 GMOD[1:0] 00 low IMIXI 1 infra UDM1 0 infra FRMT 1 high Channel frequencies and 1st LO divider, fRef3 = 5 kHz Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 RX Channel Frequency (MHz) 49.6700 49.8450 49.8600 49.7700 49.8750 49.8300 49.8900 49.9300 49.9900 49.9700 49.6950 49.7100 49.7250 49.7400 49.7550 Korea CT0 Handset Country setting: Name Value Setting RA1[1:0] 10 mid RA2[1:0] 00 max D1B[1:0] 01 8 om po ne 1st LO Frequency (MHz) 38.9700 39.1450 39.1600 39.0700 39.1750 39.1300 39.1900 39.2300 39.2900 39.2700 39.9950 39.0100 39.0250 39.0400 39.0550 Gm bH GMOD[1:0] 00 low IMIXI 0 supra N 7794 7829 7832 7814 7835 7826 7838 7846 7858 7854 7799 7802 7805 7808 7811 D2B0 1 8 D3B[1:0] 00 1 nt s KV2[3:1] 100 UDM1 1 supra FRMT 1 high Channel frequencies and 1st LO divider, fRef3 = 5 kHz Rev. A2, 10-Sep-98 Ad ro nic C Channel Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 RX Channel Frequency (MHz) 46.6100 46.6300 46.6700 46.7100 46.7300 46.7700 46.8300 46.8700 46.9300 46.9700 46.5100 46.5300 46.5500 46.5700 46.5900 1st LO Frequency (MHz) 57.3100 57.3300 57.3700 57.4100 57.4300 57.4700 57.5300 57.5700 57.6300 57.6700 57.2100 57.2300 57.2500 57.2700 57.2900 N 11462 11466 11474 11482 11486 11494 11506 11514 11526 11534 11442 11446 11450 11454 11458 23 (25) Preliminary Information U3550BM Korea CT Modulation Loop Frequencies and Dividers N Channel 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 P 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 Q 157 95 105 157 123 157 157 157 157 181 107 109 111 113 115 fmod (MHz) 7.640 7.485 7.510 7.640 7.555 7.640 7.640 7.640 7.640 7.700 7.515 7.520 7.525 7.530 7.535 Package SO28 Dimensions in mm 18.05 17.80 om po ne 2.35 0.25 0.10 15 technical drawings according to DIN specifications Package Information nt s 9.15 8.65 7.5 7.3 10.50 10.20 14 0.4 1.27 28 16.51 Ad ro nic C 1 24 (25) Preliminary Information Gm bH 0.25 13033 Rev. A2, 10-Sep-98 U3550BM Ozone Depleting Substances Policy Statement It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. Rev. A2, 10-Sep-98 Ad ro nic C We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423 om po ne nt s Gm bH 1. Meet all present and future national and international statutory requirements. 25 (25) Preliminary Information |
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