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| NTMS10P02R2 Power MOSFET -10 Amps, -20 Volts P-Channel Enhancement-Mode Single SO-8 Package Features * * * * * * * Ultra Low RDS(on) Higher Efficiency Extending Battery Life Logic Level Gate Drive Miniature SO-8 Surface Mount Package Diode Exhibits High Speed, Soft Recovery Avalanche Energy Specified SO-8 Mounting Information Provided http://onsemi.com -10 AMPERES -20 VOLTS 14 mW @ VGS = -4.5 V P-Channel D Applications * Power Management in Portable and Battery-Powered Products, i.e.: Cellular and Cordless Telephones and PCMCIA Cards MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Drain-to-Source Voltage Gate-to-Source Voltage - Continuous Thermal Resistance - Junction-to-Ambient (Note 1.) Total Power Dissipation @ TA = 25C Continuous Drain Current @ 25C Continuous Drain Current @ 70C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 3.) Thermal Resistance - Junction-to-Ambient (Note 2.) Total Power Dissipation @ TA = 25C Continuous Drain Current @ 25C Continuous Drain Current @ 70C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 3.) Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = -20 Vdc, VGS = -4.5 Vdc, Peak IL = 5.0 Apk, L = 40 mH, RG = 25 ) Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds Symbol VDSS VGS RJA PD ID ID PD ID IDM RJA PD ID ID PD ID IDM TJ, Tstg EAS Value -20 "12 50 2.5 -10 -8.0 0.6 -5.5 -50 80 1.6 -8.8 -6.4 0.4 -4.5 -44 -55 to +150 500 Unit Vdc Vdc C/W W A A W A A C/W W A A W A A C mJ G S 8 1 SO-8 CASE 751 STYLE 12 MARKING DIAGRAM & PIN ASSIGNMENT Source Source Source Gate 1 2 3 4 Top View E10P02 L Y WW = Device Code = Assembly Location = Year = Work Week E10P02 LYWW 8 7 6 5 Drain Drain Drain Drain TL 260 C 1. Mounted onto a 2 square FR-4 Board (1 sq. Cu 0.06 thick single sided), t = 10 seconds. 2. Mounted onto a 2 square FR-4 Board (1 sq. Cu 0.06 thick single sided), t = steady state. 3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2%. ORDERING INFORMATION Device NTMS10P02R2 Package SO-8 Shipping 2500/Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. (c) Semiconductor Components Industries, LLC, 2003 1 December, 2003 - Rev. 2 Publication Order Number: NTMS10P02R2/D NTMS10P02R2 ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) (Note 4.) Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = -250 Adc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = -20 Vdc, VGS = 0 Vdc, TJ = 25C) (VDS = -20 Vdc, VGS = 0 Vdc, TJ = 70C) Gate-Body Leakage Current (VGS = -12 Vdc, VDS = 0 Vdc) Gate-Body Leakage Current (VGS = +12 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = -250 Adc) Temperature Coefficient (Negative) Static Drain-to-Source On-State Resistance (VGS = -4.5 Vdc, ID = -10 Adc) (VGS = -2.5 Vdc, ID = -8.8 Adc) Forward Transconductance (VDS = -10 Vdc, ID = -10 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 5. & 6.) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge BODY-DRAIN DIODE RATINGS (Note 5.) Diode Forward On-Voltage Diode Forward On-Voltage Reverse Recovery Time (IS = -2.1 Adc, VGS = 0 Vdc, 2 1 Ad Vd dIS/dt = 100 A/s) Reverse Recovery Stored Charge 4. Handling precautions to protect against electrostatic discharge is mandatory. 5. Indicates Pulse Test: Pulse Width = 300 s max, Duty Cycle = 2%. 6. Switching characteristics are independent of operating junction temperature. (IS = -2.1 Adc, VGS = 0 Vdc) (IS = -2.1 Adc, VGS = 0 Vdc, TJ = 125C) (IS = -10 Adc, VGS = 0 Vdc) (IS = -10 Adc, VGS = 0 Vdc, TJ = 125C) VSD VSD trr ta tb QRR - - - - - - - - -0.72 -0.60 -0.90 -0.75 65 25 40 0.075 -1.2 - - - 100 - - - C Vdc Vdc ns (VDS = -10 Vdc, VGS = -4.5 Vdc, ID = -10 Ad ) 10 Adc) (VDD = -10 Vdc, ID = -10 Adc, VGS = -4.5 Vdc 4 5 Vdc, RG = 6.0 ) (VDD = -10 Vdc, ID = -1.0 Adc, VGS = -4.5 Vdc 4 5 Vdc, RG = 6.0 ) td(on) tr td(off) tf td(on) tr td(off) tf Qtot Qgs Qgd - - - - - - - - - - - 25 40 110 110 25 100 100 125 48 6.5 17 35 65 190 190 - - - - 70 - - nC ns ns (VDS = -16 Vdc, VGS = 0 Vdc, 16 Vd Vd f = 1.0 MHz) Ciss Coss Crss - - - 3100 1100 475 3640 1670 1010 pF VGS(th) -0.6 - RDS(on) - - gFS - 0.012 0.017 30 0.014 0.020 - Mhos -0.88 2.8 -1.20 - Vdc mV/C V(BR)DSS -20 - IDSS - - IGSS - IGSS - - 100 - -100 nAdc - - -1.0 -5.0 nAdc - -12.1 - - Vdc mV/C Adc Symbol Min Typ Max Unit http://onsemi.com 2 NTMS10P02R2 20 -2.3 V -2.1 V -I D , DRAIN CURRENT (AMPS) 10 VDS -10 V TJ = 25C -1.9 V 8.0 -I D , DRAIN CURRENT (AMPS) 15 -10 V -3.1 V 6.0 25C 10 4.0 5.0 VGS = -1.7 V 2.0 0 100C TJ = -55C 0 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 2.00 0 0.5 1.0 1.5 2.0 2.5 -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics R DS(on), DRAIN-TO-SOURCE RESISTANCE (OHMS) R DS(on), DRAIN-TO-SOURCE RESISTANCE (OHMS) Figure 2. Transfer Characteristics 0.100 ID = -10 A TJ = 25C 0.075 0.020 TJ = 25C VGS = -2.5 V 0.016 0.050 VGS = -4.5 V 0.012 0.025 0 0 2.0 4.0 6.0 8.0 -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 10 0.008 6.0 10 14 -ID, DRAIN CURRENT (AMPS) 18 R DS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) Figure 3. On-Resistance versus Gate-To-Source Voltage 1.6 ID = -10 A VGS = -4.5 V -I DSS , LEAKAGE (nA) 1000 10,000 Figure 4. On-Resistance versus Drain Current and Gate Voltage VGS = 0 V 1.4 TJ = 125C 1.2 1.0 TJ = 100C 100 0.8 0.6 -50 10 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) 150 2.0 6.0 10 14 18 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-To-Source Leakage Current versus Voltage http://onsemi.com 3 NTMS10P02R2 10,000 VGS = 0 V C, CAPACITANCE (pF) 8000 Ciss VDS = 0 V TJ = 25C 6000 Crss 4000 Ciss 2000 Crss 0 10 5.0 0 5.0 -VGS -VDS 10 Coss 15 20 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation -VGS , GATE-TO-SOURCE VOLTAGE (VOLTS) -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 5.0 QT 4.0 VGS 8.0 10 VDS 3.0 Q1 2.0 ID = -10 A TJ = 25C Q2 6.0 4.0 1.0 0 0 Q3 2.0 0 10 20 30 40 50 Qg, TOTAL GATE CHARGE (nC) Figure 8. Gate-To-Source and Drain-To-Source Voltage versus Total Charge 1000 VDD = -10 V ID = -1.0 A VGS = -4.5 V t, TIME (ns) td(off) tf t, TIME (ns) 1000 VDD = -10 V ID = -10 A VGS = -4.5 V td(off) tr tf 100 td(on) tr 100 td(on) 10 1.0 10 RG, GATE RESISTANCE (OHMS) 100 10 1.0 10 RG, GATE RESISTANCE (OHMS) 100 Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Resistive Switching Time Variation versus Gate Resistance http://onsemi.com 4 NTMS10P02R2 DRAIN-TO-SOURCE DIODE CHARACTERISTICS 100 -IS, SOURCE CURRENT (AMPS) -ID , DRAIN CURRENT (AMPS) 2.0 1.6 1.2 0.8 0.4 0 VGS = 0 V TJ = 25C 100 ms 10 1.0 ms 1.0 VGS = 2.5 V SINGLE PULSE TC = 25C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1.0 10 10 ms 0.1 0.50 0.55 0.60 0.65 0.70 -VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) dc 100 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 11. Diode Forward Voltage versus Current Figure 12. Maximum Rated Forward Biased Safe Operating Area di/dt IS trr ta tb TIME tp IS 0.25 IS Figure 13. Diode Reverse Recovery Waveform TYPICAL ELECTRICAL CHARACTERISTICS 10 Rthja(t)EFFECTIVE TRANSIENT , THERMAL RESISTANCE 1.0 D = 0.5 0.2 0.1 0.05 0.02 0.01 Chip 0.0163 0.1 Normalized to ja at 10s. 0.0652 0.1988 0.6411 0.9502 0.01 0.0307 F 0.1668 F 0.5541 F 1.9437 F 72.416 F SINGLE PULSE 0.001 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 t, TIME (s) 1.0E+00 1.0E+01 1.0E+02 Ambient 1.0E+03 Figure 14. Thermal Response http://onsemi.com 5 NTMS10P02R2 PACKAGE DIMENSIONS SO-8 CASE 751-07 ISSUE AA -X- A 8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 B 1 4 S 0.25 (0.010) M Y M -Y- G C -Z- H D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* STYLE 12: PIN 1. 2. 3. 4. 5. 6. 7. 8. 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 6 NTMS10P02R2/D |
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