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FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER Integrated Device Technology, Inc. IDT54/74FCT299T/AT/CT FEATURES: * * * * Std., A and C speed grades Low input and output leakage 1A (max.) CMOS power levels True TTL input and output compatibility - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) High drive outputs (-15mA IOH, 48mA IOL) Power off disable outputs permit "live insertion" Meets or exceeds JEDEC standard 18 specifications Product available in Radiation Tolerant and Radiation Enhanced versions Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Available in DIP, SOIC, QSOP, CERPACK and LCC packages DESCRIPTION: The IDT54/74FCT299T/AT/CT are built using an advanced dual metal CMOS technology. The IDT54/74FCT299T/AT/ CT are 8-input universal shift/storage registers with 3-state outputs. Four modes of operation are possible: hold (store), shift left, shift right and load data. The parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins. Additional outputs are provided for flip-flops Q0 and Q7 to allow easy serial cascading. A separate active LOW Master Reset is used to reset the register. * * * * * * FUNCTIONAL BLOCK DIAGRAM S1 S0 DS7 DS0 CP CD Q0 MR OE1 OE2 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 2632 drw 01 D Q CP CD D Q CP CD D Q CP CD D Q CP CD D Q CP CD D Q CP CD D Q CP CD D Q CP Q7 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES (c)1995 Integrated Device Technology, Inc. APRIL 1995 DSC-4205/4 6.11 1 IDT54/74FCT299T/AT/CT FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS INDEX S0 OE1 OE2 I/O6 I/O4 I/O2 I/O0 Q0 MR GND 1 2 3 4 5 6 7 8 9 10 20 19 P20-1 D20-1 SO20-2 SO20-8 & E20-1 18 17 16 15 14 13 12 11 2632 drw 02 MR GND DS0 CP I/O 1 2632 drw 03 Vcc S1 DS7 Q7 I/O7 I/O5 I/O 3 I/O1 CP DS0 I/O6 I/O4 I/O2 I/O0 Q0 OE 2 OE 1 S0 Vcc S1 32 4 5 6 7 8 1 20 19 18 17 16 15 14 9 10 11 12 13 L20-2 DS7 Q7 I/O7 I/O5 I/O3 DIP/SOIC/QSOP/CERPACK TOP VIEW LCC TOP VIEW PIN DESCRIPTION Pin Names CP DS0 DS7 S0, S1 Description Clock Pulse Input (Active Edge Rising) Serial Data Input for Right Shift Serial Data Input for Left Shift Mode Select Inputs Asynchronous Master Reset Input (Active LOW) 3-State Output Enable Inputs (Active LOW) Parallel Data Inputs or 3-State Parallel Outputs Serial Outputs 2632 tbl 01 FUNCTION TABLE(1) Inputs MR S1 L H H H H X H L H L S0 X H H L L CP X X Response Asynchronous Reset Q0-Q7 = LOW Parallel Load; I/On Qn Shift Right; DS0 Q0, Q0 Q1, etc. Shift Left; DS7 Q7, Q7 Q6, etc. Hold 2632 tbl 02 MR OE1, OE2 I/O0-I/O7 O0, O7 NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH clock transition ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Commercial VTERM(2) Terminal Voltage -0.5 to +7.0 with Respect to GND VTERM(3) Terminal Voltage -0.5 to with Respect to VCC +0.5 GND TA Operating 0 to +70 Temperature TBIAS Temperature -55 to +125 Under Bias TSTG Storage -55 to +125 Temperature PT Power Dissipation 0.5 IOUT DC Output Current -60 to +120 Military -0.5 to +7.0 Unit V CAPACITANCE (TA = +25C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. Unit 10 pF 12 pF 2632 lnk 04 -0.5 to VCC +0.5 -55 to +125 -65 to +135 -65 to +150 0.5 -60 to +120 V C C C W mA NOTE: 1. This parameter is measured at characterization but not tested. 2632 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only. 6.11 2 IDT54/74FCT299T/AT/CT FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10% Symbol VIH VIL IIH IIL II VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Current(4) Input LOW Current(4) Input HIGH Current(4) Clamp Diode Voltage Short Circuit Current Output HIGH Voltage Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max., VI = 2.7V VCC = Max., VI = 0.5V VCC = Max., VI = Vcc (Max.) VCC = Min., IN = -18mA VCC = Max., VCC = Min. VIN = VIH or VIL (3) Min. 2.0 -- -- -- -- -- -60 Typ.(2) -- -- -- -- -- -0.7 -120 3.3 3.0 0.3 -- 200 0.01 Max. -- 0.8 1 1 1 -1.2 -225 -- -- 0.5 1 -- 1 Unit V V A A A V mA V V V A mV mA 2632 tbl 05 VO = GND IOH = -6mA MIL. IOH = -8mA COM'L. IOH = -12mA MIL. IOH= -15mA COM'L. 2.4 2.0 -- -- -- -- VOL IOFF VH ICC Output LOW Voltage Input/Output Power Off Leakage (5) VCC = Min. VIN = VIH or VIL VCC = 0V, VIN or VO 4.5V -- VCC = Max. VIN = GND or VCC IOL = 32mA MIL. IOL = 48mA COM'L. Input Hysteresis Quiescent Power Supply Current NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter is 5A at TA = -55C. 5. This parameter is guaranteed but not tested. 6.11 3 IDT54/74FCT299T/AT/CT FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current (4) Vcc = Max. VIN = 3.4V(3) Vcc = Max. Outputs Open OE1 = OE2 = GND MR = VCC S0 = S1 = VCC DS0 = DS1 = GND One Input Toggling 50% Duty Cycle Vcc = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE1 = OE2 = GND MR = VCC S0 = S1 = VCC DS0 = DS7 = GND One Bit Toggling at fi = 5MHz 50% Duty Cycle Vcc = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE1 = OE2 = GND MR = VCC S0 = S1 = VCC DS0 = DS7 = GND Eight Bits Toggling at fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND Test Conditions(1) Min. -- -- Typ.(2) 0.5 0.15 Max. 2.0 0.25 Unit mA mA/MHz IC Total Power Supply Current (6) VIN = VCC VIN = GND -- 1.5 3.5 mA VIN = 3.4V VIN = GND -- 2.0 5.5 VIN = VCC VIN = GND -- 3.8 7.3(5) VIN = 3.4V VIN = GND -- 6.0 16.3(5) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 2632 tbl 06 6.11 4 IDT54/74FCT299T/AT/CT FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE IDT54/74FCT299T Com'l. Symbol tPLH tPHL tPLH tPHL tPHL tPHL tPZH tPZL tPHZ tPLZ tSU Parameter Propagation Delay CP to Q0 or Q7 Propagation Delay CP to I/On Propagation Delay MR to Q0 or Q7 Propagation Delay MR to I/On Output Enable Time OEn to I/On Output Disable Time OEn to I/On Set-up Time HIGH or LOW S0 or S1 to CP Set-up Time HIGH or LOW I/On, DS0 or DS7 to CP Hold Time HIGH or LOW S0 or S1 to CP Hold Time HIGH or LOW I/On, DS0 or DS7 to CP CP Pulse Width HIGH or LOW Condition (1) IDT54/74FCT299AT Com'l. (2) IDT54/74FCT299CT Com'l. Min. (2) Mil. (2) Mil. (2) Mil. (2) Min. (2) Max. Min. Max. Min. Max. Min. Max. Max. Min. Max. Unit CL = 50pF RL = 500 2.0 2.0 2.0 2.0 1.5 1.5 7.5 10.0 12.0 10.0 15.0 11.0 7.0 -- 2.0 2.0 2.0 2.0 1.5 1.5 7.5 14.0 12.0 10.5 15.0 15.0 9.0 -- 2.0 2.0 2.0 2.0 1.5 1.5 3.5 7.2 7.2 7.2 8.7 6.5 6.0 -- 2.0 2.0 2.0 2.0 1.5 1.5 4.0 9.5 9.5 9.5 11.5 7.5 6.5 -- 2.0 2.0 2.0 2.0 1.5 1.5 3.5 6.5 6.5 6.5 6.5 6.5 6.0 -- 2.0 2.0 2.0 2.0 1.5 1.5 4.0 7.5 7.5 7.5 7.5 7.5 6.5 -- ns ns ns ns ns ns ns tSU 5.5 -- 5.5 -- 4.0 -- 4.5 -- 4.0 -- 4.5 -- ns tH 1.0 -- 1.0 -- 1.0 -- 1.0 -- 1.0 -- 1.0 -- ns tH 1.5 -- 1.5 -- 1.5 -- 1.5 -- 1.5 -- 1.5 -- ns tW tw tREM 7.0 7.0 7.0 -- -- -- 7.0 7.0 7.0 -- -- -- 5.0 5.0 5.0 -- -- -- 6.0 6.0 6.0 -- -- -- 5.0 5.0 5.0 -- -- -- 6.0 6.0 6.0 -- -- -- ns ns ns 2619 tbl 07 MR Pulse Width LOW Recovery Time NOTES: 1. See test circuit and waveforms. 2. Minimum units are guaranteed but not tested on Propagation Delays. 6.11 5 IDT54/74FCT299T/AT/CT FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS V CC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 VOUT 7.0V SWITCH POSITION Test Open Drain Disable Low Enable Low All Other Tests Open DEFINITIONS: 2632 lnk 08 CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Switch Closed 2632 drw 04 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 2632 drw 05 PULSE WIDTH tH LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE 1.5V tREM 1.5V 2632 drw 06 tSU tH PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE DISABLE 3V 1.5V 0V 3.5V 0.3V tPHZ 0.3V 1.5V 0V VOH 0V 2632 drw 08 SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V 2632 drw 07 CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 3.5V 1.5V tPLZ VOL NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns 6.11 6 IDT54/74FCT299T/AT/CT FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION IDT XX Temperature Range FCT X Family XXXX Device Type X Package X Process Blank B P D SO L E Q Commercial MIL-STD-883, Class B Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK Quarter-size Small Outline Package 299T 8-Input Universal Shift Register 299AT 299CT Blank 54 74 High Drive -55C to +125C 0C to +70C 2632 drw 09 6.11 7 |
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