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HT9020 Call Progress Tone Decoder & ABR Controller Features * * * * * Low cost 32768Hz crystal Low power consumption Operating voltage: 2.5V to 5.5V (CPT mode) 2.0V to 5.5V (ABR mode) Call progress tone decoder - Fully decoded tristate call progress status output - Works with traditional precision or PBX call progress tones Busy redial controller - Repeat times: 3, 10 or 15 times ( 2, 5, 15 times by mask option) - 4.65, 32.6 and 62.8 sec break time (16.3sec by mask option) - Auto-terminate after 30 times (default) ringback tone receipt General Description The HT9020 provides two modes; Call progress tone decoder and Busy redial controller, to support the application fields. Standard call progress tone decoder Busy redial controller This feature detects a specified input signal and then outputs relative envelopes during a 2.32sec interval. Three tristate output pins (DIAL, RBK, BUSY) indicate the presence of a dial tone, ringback tone or busy/reorder tone respectively, so it provides information that enables the microprocessor to decide whether to initiate, continue or terminate calls. This feature implements a busy redial function. After decoding, if the line is busy, this device forces the dialer to break for 62.8 sec, then triggers the redial key after the dial tone receipt. If the receiver is still busy, the redial sequence will be repeated 10 times. If the receiver is ringing, the redial sequence will be terminated after 30 times of ringback tone receipt. Selection Table Function Part No. Operating Voltage CPT mode 2.5V~5.5V ABR mode 2.0V~5.5V CPT mode 2.5V~5.5V OSC Frequency CPT Decoder ABR Repeat Times 3/10/15 times [2/5/15 by metal option] ABR Break Time 4.65/32.6/62.8 sec [16.3 sec by metal option] Package HT9020A 32768Hz Full decoded 18 DIP/SOP HT9020B 32768Hz CPT envelope only 8 DIP 1 21st Aug '98 HT9020 Block Diagram Pin Assignment Pin Description Pin Name I/O Internal Connection Description When this pin is connected to VDD, the chip is in the call progress tone decoder mode (CPTD mode) When this pin is connected to VSS, the chip is in the auto busy redial controller mode (ABRC mode) DEC/ABRC I CMOS IN OE/HKOFF I CMOS IN CPTD mode: DIAL, RBK, BUSY and ENV pin tristate output control pin. OE=VDD: Tristate output selected ABRC mode: Off hook sense pin HKOFF=VDD: Reset controller and disable ABR operation 2 21st Aug '98 HT9020 Internal Connection Pin Name I/O Description CPTD mode: While an input signal is within specification, this pin will output the envelope relative to the input signal with a typical 40ms timing delay. ABRC mode: This is an ABR finished indicating signal output pin. When an ABR counter is full, this pin will output a 100ms pulse. CPTD mode: The call progress tone is decoded in this ready output pin. This pin can be used to trigger a microcontroller to read the latched data at DIAL, RBK and BUSY ABRC mode: ABR indicating signal output. While ABR is active, this pin will output a 0.86Hz, 25% duty cycle clock. CPTD mode: Output data return to zero select pin RTZ=VDD; The outputs of DIAL, RBK and BUSY will be cleared when the input signal is out of specification while in the 2.32 sec time window. RTZ=VSS; The outputs of DIAL, RBK and BUSY will be latched until the next valid data is received. ABRC mode: Numbers of the busy redial and time of break selection pin. CPTD mode: 1/2 VDD reference voltage output pin When EN=VDD, the device will be turned off and VREF disabled. All outputs will be pulled low to reduce power consumption. ABRC mode: Number of the busy redial and time of break selection pin. AC coupled analog signal input pin ENV/END O CMOS OUT DV/LED O CMOS OUT RTZ/SEL1 I CMOS IN VREF/SEL2 I/O CMOS I/O (VREF:O SEL2:I) SIN I CMOS IN B3/RING I CMOS IN CPTD mode: Received busy tone pattern select pin B3=VDD; BUSY will be set after three successive busy tones are received. B3=VSS; BUSY will be set immediately after a busy tone is received. ABRC mode: Ringer detection input pin Negative power supply 2.5~5.5V for CPT mode operation 2.0~5.5V for ABR mode operation Positive power supply, 2.5~5.5V for normal operation VSS VDD -- -- -- -- BUSY/ BREAK O CMOS OUT CPTD mode: BUSY=HIGH: The detected input signal is a busy or reorder tone ABRC mode: When in ABR mode, the BREAK pin will be high. After a busy tone is detected it will return low. When the break timer has timed out, it will return high. 3 21st Aug '98 HT9020 Internal Connection Pin Name I/O Description CPTD mode: RBK=HIGH: The detected input signal is a ringback tone. ABRC mode: Transmission gate input or output pin. Used to trigger the row and column pin of the redial key when a dial tone is received. It will output a 100ms pulse. CPTD mode: DIAL=HIGH; The detected input signal is a dial tone. ABRC mode: Transmission gate input or output pin. Used to trigger the row and column pin of the redial key when a dial tone is received. It will output a 100ms pulse. CPTD mode: EN=VSS; Normal operation mode EN=VDD; Device disabled. The oscillator stops and all output pins are pulled low or high impedance. ABRC mode: The pin is schmitt trigger input structure. Active low. Applying a negative going pulse to this pin can toggle the auto-busy-redial function. When CLR is low and BREAK is high, the tone decoder is reset. This pin can be connected to the mute pin of the dialer IC for tone elimination. RBK/KEY2 O CMOS OUT DIAL/KEY1 O CMOS OUT EN/KEY I CMOS IN CLR I CMOS IN X1 I The system oscillator consists of an inverter, a bias resistor OSCILLATOR and the necessary load capacitor on-chip. Connect a standard 32.768kHz crystal or ceramic resonator. X1 and X2 terminals implement the oscillator function. OSCILLATOR The oscillator is turned off in the standby mode, and is actuated whenever a keyboard entry is detected. CMOS IN Pull-low For testing only, active high X2 O TEST I Approximate internal connection circuits 4 21st Aug '98 HT9020 Absolute Maximum Ratings* Supply Voltage ............................... -0.3V to 6V Input Voltage ............... VSS-0.3V to VDD+0.3V Storage Temperature................. -55C to 150C Operating Temperature .............. -20C to 75C *Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maximum Ratings" may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Electrical Characteristics Symbol Parameter Test Conditions VDD -- 5V Conditions CPT mode ABR mode Min. Typ. Max. Unit 2.5 2.0 -- -- -- -36 -42 -- -- 800 40 -- -- 1.05 3 -- 8 -- -- 1.0 2.4 250 0.8 -- 2.5 -- -- -- -- -- -- -- -- -- -- -- 40 1.16 4 2.32 5.5 5.5 2 0.8 1 0 -8 -50 200 -- -- 20 -- 1.2 5 -- -- -- 2 -- 2.6 V V mA mA A VDD Operating Voltage IDD ISTB GDV GRL fRL fRH tDD tRD tDH tDL tDV tSU tI tIP tCL tST ZI VREF Operating Current Standby Current Detection Level Rejection Level Rejection Out-band Frequency Detection Signal Time Rejection Noise Time Envelope Output Delay Time Data Valid Output Time Data Setup Time Interval Time Interval Pause Time Clear Time OSC Start Up Time Input Impedance Reference Voltage Functions enabled 2.5V No load Functions disabled or 2.5V EN=1 5V fIN=305~640Hz dBm dBm dBm Hz ms ms ms sec ms sec ms ns sec M V 2.5V ENV=1 -- -- -- -- -- -- -- -- -- -- -- -- -- All frequency, ENV=0 V 0 dBm, ENV=0 In-band signal input, ENV=1 Any signal input, ENV=0 Time to output high Time to output low Time to output high/low -- Internal signal Internal signal -- -- fIN=200~3.4kHz No load 5 21st Aug '98 HT9020 Test Conditions VDD -- 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 2.5V 5.0V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V VIH=5.0V VIL=0V VOH=4.5V VOL=0.5V VLKH=5.0V VLKL=0V -- -- fIN=305~640Hz All frequency V<0 dBm, ENV=0 V<0 dBm, ENV=0 In-band dial tone In-band dial tone In-band busy tone 30 Times ringback tone (2 sec On/4 sec Off) No signal -- -- -- Symbol ZREF VIH VIL IIH IIL IOH IOL ILKH ILKL ISO IDR GDL GRL fROL fROH tDD1 tDD2 tDB tDR tDN tDE tTO tO tB1 tB2 RON ROFF Parameter Output Impedance Logic Input High Voltage Logic Input Low Voltage Logic Input High Current Logic Input Low Current Output High Current Output Low Current Output Disable Leakage Current Pull Down Current Pull Up Current Detection Level Rejection Level Rejection Out-band Low Frequency Rejection Out-band High Frequency Detection Time Detection Time Detection Busy Time Detection Ringer Time Detection Time Detection Enable Time RELI, O Turn on Time ABREND Output Time Break Time (tB1+2.3sec) Transition on Resistor Gate Output off Resistor Conditions -- -- -- Min. Typ. Max. Unit -- 3.5 -- -- -0.1 -- 2.0 -- -0.1 -- -- -42 -36 -- -- 800 2.1 6.5 6.8 150 25 0.2 80 80 10 -- -- -- -- -- -- -- -- 25 25 -- -- -- -- -- 3.32 7.0 7.5 180 30.2 30.2 100 100 62.8 65.1 500 -- 20 -- 1.5 0.1 -- -0.5 -- 0.1 -- 35 35 -8 0 -50 200 -- 3.0 8.0 8.2 210 35 35 120 120 65.0 68.0 100 -- mA mA A A A A M V V A dBm dBm dBm Hz Hz sec sec sec sec sec sec ms ms sec sec After a busy tone is detected 60.0 After no signal is detected VRDLI=5.0V, VRDLO=0V VRDLI=0V, VRDLO=5.0V 62.0 -- 10 M 6 21st Aug '98 HT9020 Functional Description Decoder The HT9020 call progress tone decoder (DEC/ABRC=VDD) can be used in the U.S.A. and many other countries in the world. The signal format, truth table and timing of the decoder are shown below. The signal format of the call progress tone Tone Precision Dial Tone Old Dial Tone Precision Busy Tone Old Busy Tone Precision Reorder Tone Old Reorder Tone Precision Ring-back Tone Old Ring-back Tone Frequency 350Hz + 440Hz 120Hz(or 133Hz, ..) + 600Hz 480Hz + 620Hz 120Hz + 600Hz 480Hz + 620Hz 120Hz + 600Hz 440Hz + 480Hz 40Hz (or the others) + 420Hz Continuous Continuous Condition 0.5sec On and 0.5sec Off 0.5sec On and 0.5sec Off 0.3sec On and 0.2sec Off 0.2sec On and 0.3sec Off or 0.25sec On and 0.25sec Off 2sec On and 4sec Off 2sec On and 4sec Off The truth table of the decoder Tone Initial Dial Ringback Busy/Reorder Overflow Output Disable Transition No. -- 1 2~4 5~16 over 16 -- DIAL 0 1 0 0 0 Hi-Z RBK 0 0 1 0 0 Hi-Z BUSY 0 0 0 1 0 Hi-Z DV 0 1 1 1 1 * OE/HKOFF 0 0 0 0 0 1 Notes: Hi-Z: Hi impedance *: previous state 7 21st Aug '98 HT9020 Decoder timing diagrams 8 21st Aug '98 HT9020 ABR controller Initial state: * RDLO=Hi-Impedance * RDLI=Hi-Impedance * BREAK=Low * ABRI=Low After the break timer has timed-out, the redial will be executed again. If the repeat-number ends, the OVER pin will output a 100ms high pulse to automatically reset to the initial state. If the receiver does not answer within 30 cycles, a ringback tone is produced, and the OVER pin will output a 100ms high pulse to automatically reset to the initial state. The break time and repeat number setting If a negative transition is received on the ABR pin, then the Auto-busy-dial function will be executed, and the LED pin will output a 0.86Hz (duty=0.25) clock. If the device detects a dial tone, KEY1 and KEY2 pins output a 100ms pulse to trigger the redial key of the telephone dialer. The dial tone will be ignored after the redial key is triggered. If a busy/reorder tone for three successive windows is received or the line signal is off for 30.2secs or a dial tone appears again for more than 7 secs after the number is dialed-out, the device will turn on the internal register to implement the following control: * Turn off the filter * BREAK pin output low for on-hook switch Repeat No. SEL1 SEL2 (times) 0 0 1 1 0 1 0 1 10 10 3 15 Break Time (seconds) tB1 62.8 32.6 62.8 4.65 tB2 84.9 34.9 64.9 6.97 control * The on-hook timer starts counting the break time 9 21st Aug '98 HT9020 ABR controller timing diagrams 10 21st Aug '98 HT9020 Application Circuits Application Circuit 1 11 21st Aug '98 HT9020 Application Circuit 2 12 21st Aug '98 |
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