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| a FEATURES 1000 MHz Toggle Rate Driver/Comparator/Active Load and Dynamic Clamp Included Inhibit Mode Function 100-Lead LQFP Package with Built-In Heat Sink Driver 48 Output Resistance 800 ps Tr/Tf for a 3 V Step Comparator 1.1 ns Propagation Delay at 3 V Load 40 mA Voltage Programmable Current Range 50 ns Settling Time to 15 mV APPLICATIONS Automatic Test Equipment Semiconductor Test Systems Board Test Systems Instrumentation and Characterization Equipment VCC VH VTERM DATA DATAB IOD IODB RLD RLDB VL PWRD HCOMP VCCO QH QHB VCC High Speed Dual Pin Electronic AD53522 FUNCTIONAL BLOCK DIAGRAM (One-Half) VCC VEE VEE VEE AD53522 VCH VHDCPL DRIVER OUT VLDCPL VCL COMPARATOR QL QLB PRODUCT DESCRIPTION LCOMP The AD53522 is a complete, high speed, single-chip solution that performs the pin electronics functions of driver, comparator, and active load (DCL) for ATE applications. In addition, the driver contains a dynamic clamp function and the active load contains an integrated Schottky diode bridge. The driver is a proprietary design that features three active states: Data High mode, Data Low mode, and Term mode, as well as an Inhibit State. In conjunction with the integrated dynamic clamp, this facilitates the implementation of a high speed active termination. The output voltage range is -0.5 V to +6.5 V to accommodate a wide variety of test devices. The dual comparator, with an input range equal to the driver output range, features PECL compatible outputs. Signal tracking capability is in the range of 3 V/ns. The active load can be set for up to 40 mA load current. IOH, IOL, and the buffered VCOM are independently adjustable. On-board Schottky diodes provide high speed switching and low capacitance. Also included is an on-board temperature sensor that gives an indication of the silicon surface temperature of the DCL. This information can be used to measure JC and JA or flag an alarm if proper cooling is lost. Output from the sensor is a current sink VCOM IOLC IOXRTN V/I +1 VCOM_S ACTIVE LOAD PROT_LO INHL INHLB IOHC V/I 1.0 A/ K DR_GND GND_ROT PWRGND 9 HQGND THERMSTART PROT_HI THERM* *ONLY 1 (ONE) THERM PER DEVICE that is proportional to absolute temperature. The gain is trimmed to a nominal value of 1.0 A/K. As an example, the output current can be sensed by using a 10 k resistor connected from 10 V to the THERM (IOUT) pin. A voltage drop across the resistor will be developed that equals 10 k 1 A/K = 10 mV/K = 2.98 V at room temperature. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved. AD53522-SPECIFICATIONS DRIVER1 (T = 85 C J 5 C, +VS = +10.5 V 1%, -VS = -4.5 V Conditions 1%, VCCO = 3.3 V, unless otherwise noted.) Min Typ2 Max Unit Spec3 Perf Spec No. Parameter 1 2 3 4 DIFFERENTIAL INPUT CHARACTERISTICS (DATA to DATAB, IOD to IODB, RLD to RLDB) Voltage Range Note: Inputs are from Same Logic Type Family Differential Voltage with Note: AC Tests Performed LVPECL Levels Bias Current VIN = 1.5 V, 2.5 V REFERENCE INPUTS Bias Currents OUTPUT CHARACTERISTICS Logic High Range Max Value Measured during Linearity Tests Data = H, VH = -0.4 V to +6.5 V, Vl = -0.5 V (VT = 0 V, VH Meets Test 20, 21, and 22 Specs) Data = L, VL = -0.5 V to +6.4 V, VH = 6.5 V (VT = 0 V, VL Meets Test 30, 31, and 32 Specs) VL = -0.05 V, VH = +0.05 V, VT = 0 V and VL = -0.5 V, VH = +6.5 V, VT = 0 V Data = H, VH = 0 V, VL = -0.5 V, VT = +3 V Data = H, VH = -0.4 V to +6.5 V, VL = -0.5 V, VT = +3 V Data = H, VH = -0.4 V to +6.5 V, VL = -0.5 V, VT = +3 V Data = L, VL = 0 V, VH = +6.5 V, VT = +3 V Data = L, VL = -0.5 V to +6.4 V, VH = +6.5 V, VT = +3 V Data = L, VL = -0.5 V to +6.4 V, VH = +6.5 V, VT = +3 V VL = 0 V, VH = +5 V, VT = 0 V VL = -0.5 V, VT = 0 V, IOUT = +1, +30 mA VL = -0.5 V, VT = 0 V, IOUT = -1, -30 mA VH = +6.5 V, VT = 0 V, IOUT = +1, +30 mA VH = +6.5 V, VT = 0 V, IOUT = -1, -30 mA VL = 0 V, VT = 0 V, IOUT = -30 mA (Trim Point) Cbyp = 39 nF, VH = +6.5 V, VL = -0.5 V, VT = 0 V Output to -0.5 V, VH = +6.5 V, VL = -0.5 V, VT = 0 V, DATA = H Output to +6.5 V, VH = +6.5 V, VL = -0.5 V, VT = 0 V, DATA = L 0 400 -250 -50 600 +3.3 1000 +250 +50 V mV A A N P P P 10 -0.4 +6.5 V P 11 Logic Low Range -0.5 +6.4 V P 12 Amplitude [VH-VL] +0.1 +7.0 V P 20 21 22 30 31 32 33 40 41 42 43 44 50 51 52 ABSOLUTE ACCURACY VH Offset VH Gain Error Linearity Error VL Offset VL Gain Error Linearity Error Offset Temperature Coefficient OUTPUT RESISTANCE VH = -0.3 V VH = +6.5 V VL = -0.5 V VL = +6.4 V VH = +2.5 V Dynamic Current Limit Static Current Limit Static Current Limit -50 -0.3 -5 -50 -0.3 -5 +0.5 +46 +46 +46 +46 +47.5 +100 -120 +60 +50 +0.3 +5 +50 +0.3 +5 mV P % of VH P mV mV % of VL mV mV/C P P P P N N P P N P N P P +50 +50 +50 +50 mA -60 +120 mA mA -2- REV. A AD53522 DRIVER1 (continued) Spec No. Parameter 60 VTERM Voltage Range Conditions Term Mode, VTERM = -0.3 V to +6.3 V, VL = 0 V, VH = +3 V (VTERM Meets Test 61, 62, and 63 specs) Term Mode, VTERM = 0 V, VL = 0 V, VH = +3 V Term Mode, VTERM = -0.3 V to +6.3 V, VL = 0 V, VH = +3 V Term Mode, VTERM = -0.3 V to +6.3 V, VL = 0 V, VH = +3 V VTERM = 0 V, VL = 0 V, VH = +3 V IOUT = +30 mA, -1 mA, VTERM = -0.3 V, VH = +3 V, VL = 0 V IOUT = -30 mA, +1 mA, VTERM =+6.3 V, VH = +3 V, VL = 0 V IOUT = 30 mA, 1 mA, VTERM = +2.5 V, VH = +3 V, VL = 0 V +VS , -VS 1% Output to -0.3 V, VTERM = +6.3 V Output to +6.3 V, VTERM = -0.3 V Min -0.3 Typ2 Max +6.3 Unit V Spec3 Perf P 61 62 63 64 70 VTERM Offset VTERM Gain Error VTERM Linearity Error4 Offset Temperature Coefficient Output Resistance DC -50 -0.3 -5 +0.5 +46 +50 +0.3 +5 mV P % of VSET P mV mV/C P N N N P N P P P N P +50 72 73 74 80 81 82 PSRR, Drive, or Term Mode Static Current Limit Static Current Limit +17.8 -120 +60 1.25 1.4 2 200 -60 +120 1.55 mV/V mA mA ns ps/C ps DYNAMIC PERFORMANCE, DRIVE (VH and VL) Propagation Delay Time Measured at 50%, VL = 0 V, VH = 3 V, into 500 Propagation Delay T.C. Measured at 50%, VL = 0 V, VH = 3 V, into 500 Delay Matching, Edge-to-Edge Measured at 50%, VL = 0 V, VH = 3 V, into 500 RISE AND FALL TIMES 200 mV Swing 1 V Swing 3 V Swing 3 V Swing 3 V Swing 5 V Swing Measured 20%-80%, VL = -0.1 V, VH = +0.1 V, into 50 Measured 20%-80%, VL = 0 V, VH = 1 V, into 50 Measured 10%-90%, VL = 0 V, VH = 3 V, into 50 Measured 10%-90%, VL = 0 V, VH = 3 V, into 500 Measured 20%-80%, VL = 0 V, VH = 3 V, into 500 Measured 10%-90%, VL = 0 V, VH = 5 V, into 500 90 91 92 93 93A 94 0.25 0.3 0.8 0.8 0.450 0.560 1.2 0.670 1.5 ns ns ns ns ns ns N N N N P N 100 101 102 110 RISE AND FALL TIME TEMPERATURE COEFFICIENT 1 V Swing (Per Test 91) 3 V Swing (Per Test 92) 5 V Swing (Per Test 94) Overshoot and Preshoot VL, VH = -0.1 V, +0.1 V, Driver Terminated into 50 VL, VH = 0.0 V, 3 V, Driver Terminated into 50 SETTLING TIME to 15 mV to 4 mV Delay Change vs. Pulse Width Delay Change vs. Duty Cycle VL = 0 V, VH = 0.5 V, Driver Terminated into 50 VL = 0 V, VH = 0.5 V VL/VH = 0/3, PW = 2.5 ns/7.5 ns, 30 ns/90 ns, DC = 25% VL = 0 V, VH = 3 V, Duty Cycle (DC) 5% to 95%, T = 40 ns 2 2 4 0 - 50 -6.0 - 50 ps/C ps/C ps/C 0 + 50 % of Step + mV +6.0 + 50 % of Step + mV ns s ps ps N N N N N 120 121 130 131 50 10 25 25 N N N N 75 REV. A -3- AD53522 SPECIFICATIONS (continued) DRIVER1 (continued) Spec No. Parameter 140 141 142 MINIMUM WIDTH PULSE 1 V Swing 3 V Swing Toggle Rate Conditions Measured at 50% point width VOUT AC Swing = 0.9 VOUT DC Swing Terminated, 50 Load on Transmission Line VH = 1 V, VL = 0 V, Terminated to 50 ,VOUT > 300 mV p-p Min Typ 0.6 1.5 2 Max Unit ns ns MHz Spec3 Perf N N N 1000 150 151 152 153 160 170 171 DYNAMIC PERFORMANCE, INHIBIT Delay Time, Active to Inhibit Measured at 50%, VH = 4 V, VL = 0 V, VTT = 2 Delay Time, Inhibit to Active Measured at 50%, VH = 4 V, VL = 0 V, VTT = 2 Delay Time Matching, Measured at 50%, VH = 4 V, Inhibit to Active VL = 0 V, VTT = 2 Delay Time Matching, Measured at 50%, VH = 4 V, Active to Inhibit VL = 0 V, VTT = 2 I/O Spike VH = 0 V, VL = 0 V Rise, Fall Time, Active to Inhibit VL = 0 V, VTT = 2 (20%-80% of 1 V Output) Rise, Fall Time, Inhibit to Active VH = 4 V, VL = 0 V, VTT = 2 (20%-80% of 1 V Output) DYNAMIC PERFORMANCE, VTERM Delay Time, VH to VTERM Measured at 50%, VL = VH = 2 V, VTERM = 0 V, VTT = 0 V Delay Time, VL to VTERM Measured at 50%, VL = VH = 0 V, VTERM = 2 V, VTT = 0 V Delay Time, VTERM to VH Measured at 50%, VL = VH = 2 V, VTERM = 0 V, VTT = 0 V Delay Time, VTERM to VL Measured at 50%, VL = VH = 0 V, VTERM = 2 V, VTT = 0 V Overshoot and Preshoot VH/VL, VTERM = (0 V, 2 V), (0 V, 6 V) VTERM Rise Time, VL to VT, VL, VH = 0 V, VTERM = 2 V, Normal Mode 20%-80% VTERM Rise Time, VT to VH, VL, VH = 2 V, VTERM = 0 V, Normal Mode 20%-80% VTERM Fall Time, VT to VL, VL, VH = 0 V, VTERM = 2 V, Normal Mode 20%-80% VTERM Fall Time, VH to VT, VL, VH = 2V, VTERM = 0 V, Normal Mode 20%-80% 1.7 1.7 150 150 2.0 2.2 250 250 200 1.2 0.6 ns ns ps ps mV p-p ns ns P P P P N N N 180 181 182 183 190 191A 191B 192A 192B 1.5 1.6 1.6 1.6 -6.0 + 50 1.9 1.9 2.0 2.0 ns ns ns ns P P P P +6.0 + 50 % of Step N + mV 1.0 ns N 0.6 0.6 1.0 ns ns ns N N N -4- REV. A AD53522 COMPARATOR1 Spec No. Parameter 200 201 202 203 206 207 208 209 210 DC INPUT CHARACTERISTICS VCCO Range Offset Voltage (VOS) Offset Voltage Drift HCOMP, LCOMP BIAS CURRENTS Voltage Range (VCM) Differential Voltage (VDIFF) Gain Error Linearity Error Extended Range Operation DIGITAL OUTPUTS Logic 1 Voltage Q Logic 0 Voltage QB Logic Differential, Q-QB Slew Rate Conditions Min +2.0 -25 Typ2 Max +4.5 +25 Unit V mV V/C A V V %FSR mV V Spec3 Perf N P N P P P N N P Common-Mode Voltage = 0 V Common-Mode Voltage = 0 V Over Linearity Range +50 -50 -0.5 +50 +6.5 +7 0.0 +2 VIN = -0.5 V to +6.5 V -0.25 VIN = -0.5 V to +6.5 V -2 HCOMP, LCOMP = -1, Output -1.0 Toggle VOUT from -0.9 V to -1.1 V Q or QB, 150 to GND, 150 from Q to QB Q or QB, 150 to GND, 150 from Q to QB Q or Qb, 150 to GND, 150 from Q to QB Q or QB (20% - 80% of output, 150 from Q to QB) VCCO - 1.05 VCCO - 2.2 0.65 0.9 380 220 221 222 225 VCCO - 0.85 VCCO - 1.5 1.15 V V V ps P P P N 240 241 250 260 270 280 281 282 290 CHANNEL COMPARATOR SWITCHING PERFORMANCE PROPAGATION DELAY5, 6, 7 Input to Output VIN = 3 V p-p, 2 V/ns Propagation Delay Tempco VIN = 3 V p-p, 2 V/ns Prop Delay Change with respect to: Slew Rate: 1, 2, 3 V/ns VIN = 0 V to 3 V Amplitude: 500 mV, 1.0 V, 3.0 V VIN = 1.0 V/ns Equivalent Input Rise Time VIN = 0 V to 2 V, < 80 ps, 20%-80% Rise Time Driver in VTERM = 0 V Pulse Width Linearity VIN = 0 V to 3 V, 2 V/ns, PW = 3, 4, 5, 10 ns, Driver Hi-Z mode Settling Time Settling to 8 mV, VIN = 0 V to 3 V, Driver Hi-Z mode Hysteresis Comparator Propagation Delay VIN = 0 V to 3 V, 2 V/ns Matching, HCOMP to LCOMP INPUT CHARACTERISTICS (INHL, INHLB) See Driver Spec No. 1 Input Voltage VIOH = 1 V, VIOL = 1 V, VCOM = 2 V, VDUT = 0 V INHL, INHLB Bias Current INHL, INHLB = 0 V, 3.3 V, AC Tests 0.2 V and 0.8 V VIOH Current Program Range, VDUT = 0.8 V, 6.5 V IOH = 0 mA to -40 mA 0.7 1.0 120 100 275 1.1 ns ps/C ps ps ps P N N N N 50 25 6 125 ps ns mV ps N N N P 300 301 302 0 -250 0 +3.3 +250 +4.0 V A V P P P REV. A -5- AD53522 SPECIFICATIONS (continued) ACTIVE LOAD1 Spec No. Parameter Conditions Min Typ 2 Max Unit Spec3 Perf 303 304 305 310 311 312 VIOL Current Program Range, IOL = 0 mA to 40 mA VIOH, VIOL Input Bias Current IOXRTN Range VDUT = -0.5 V, +6.5 V VDUT Range VDUT Range, IOH = 0 mA to -40 mA VDUT Range, IOL = 0 mA to +40 mA OUTPUT CHARACTERISTICS Accuracy Gain Error, Load Current, Normal Range Calculated at 1 mA and 40 mA points2 VDUT = -0.5 V, +5.2 V VIOL = 0 V, 4 V and VIOH = 0 V, 4 V IOL = +40 mA, IOH = -40 mA, IOL = +40 mA, IOH = -40 mA, |VDUT - VCOM|> 1.3 V VDUT - VCOM > 1.3 V VCOM - VDUT > 1.3 V 0 -300 -0.5, +6.5 -0.5 +0.8 -0.5 4.0 +300 V A V P P N P P P +6.5 +6.5 +5.2 V V V 320 321 322 323 324 Load Offset Load Nonlinearity Output Current Tempco IOH Extended Range IOL, IOH = 25 A - 40 mA, -0.35 VCOM = 0 V, VDUT = 2 V, and IOL = 25 A to 40 mA, VCOM = +6.5 V, VDUT = +5.2 V and IOH = 25 A to 40 mA, VCOM = -0.5 V, VDUT = +0.8 V Calculated from Intercept of 1 mA -300 and 40 mA Points IOL, IOH from 25 A to 40 mA -80 Measured at IOH, IOL = 200 A Driver Inhibited, IOH = 1 mA, Change in IOH from VTT = 0 V to VTT = -1.0 V IOL, IOH = 40 mA, VCOM = 0 V VCOM = 0 V IOL, IOH = 40 mA, VCOM = -0.5 V to +6.5 V IOL, IOH = 40 mA, VCOMI = -0.5 V to +6.5 V 2 +0.35 %ISET P +300 +80 < 3 A A A/C % P P N P 330 331 332 333 VCOM BUFFER VCOM Buffer Offset Error VCOM Buffer Bias Current VCOM Buffer Gain Error VCOM Buffer Linearity Error DYNAMIC PERFORMANCE Propagation Delay IMAX to INHIBIT INHIBIT to IMAX Propagation Delay Matching I/O Spike Settling Time to 15 mV Settling Time to 4 mV -50 -20 -4 -10 +50 +20 +4 +10 mV A % mV P P P P 340 341 342 350 360 361 VTT = +2 V, VCOM = +4 V/0 V, IOL = +20 mA, IOH = -20 mA VTT= +2 V, VCOM = +4 V/0 V, IOL = +20 mA, IOH = -20 mA Matching = (Test 340 Value) - (Test 341 Value) VCOM = 0 V, IOL = +20 mA, IOH = -20 mA IOL = +20 mA, IOH = -20 mA, 50 Load, to 15 mV IOL = +20 mA, IOH = -20 mA, 50 Load, to 4 mV 1.0 1.2 -1.0 1.3 1.8 2.0 2.4 +1.0 ns ns ns mV ns s P P P N N N 250 50 10 -6- REV. A AD53522 DYNAMIC CLAMP1 Spec No. Parameter 400 401 402 410 411 420 430 440 441 Input Voltage VCH Input Voltage VCL Input Bias Current VCH/VCL VCH, VCL Offset Error VCH, VCL Gain Error Static Current Capability Incremental Resistance VCHP, VCLP Protection Diodes Vf @ 500 A Protection Diodes Max Current Conditions Min 2 -1.5 -250 -250 0.96 50 45 0.52 Typ2 Max 7.5 +4 +250 +250 1.01 75 52 0.64 2 Unit V V A mV V/V mA V mA Spec3 Perf P P P P P N P P N Overrange Spec 401, 402 ITEST = 1 mA ITEST = 1 mA 11 mA to 21 mA 48 For Information Only TOTAL FUNCTION Spec No. Parameter 500 501 503 504 505 600 601 602 605 606 PWRD Input Voltage PWRD Bias Current Power-Down Supply Reduction Power-Down Output Leakage Current Power-Down Output Leakage Current Output Leakage Current Output Leakage Current Output Leakage Current Output Capacitance Output Capacitance Term Conditions PWRD Trip Point 1.4 V 0.15 V VIOH = 0 V, VIOL = 0 V VIOH = 0 V, VIOL = 0 V, VOUT = -0.5 V to +5.5 V VIOH = 0 V, VIOL = 0 V, VOUT = 5.5 V to 6.5 V VOUT = -0.5 V to +6.5 V VOUT = 0 V to 5 V VOUT = -1 V Driver and Load Inhibited Driver VTERM = 0 V, Load Inhibited Min 0 -250 35 -20 -500 -1 -500 -5 Typ2 Max 5 +250 60 +20 +500 +1 +500 +5 Unit V A % nA nA A nA A pF pF Spec3 Perf P P P P P P P P N N 9.2 2.5 POWER SUPPLIES Spec No. Parameter 610 620 630 640 650 651 Total Supply Range Positive Supply, VCC Negative Supply, VEE Positive Supply Current, VCC Negative Supply Current, VEE Comparator Supply Current Overhead, VCCO Total Power Dissipation Total Power Dissipation Temperature Sensor Gain Factor Conditions Min Typ 2 Max Unit V V V mA mA mA Spec3 Perf N N N P P P 660 661 700 Driver = Inhibit, ILOAD Program = 40 mA, Load = Active Driver = Inhibit, ILOAD Program = 40 mA, Load = Active Driver = Inhibit, ILOAD Program = 40 mA, Load = Active (IVCCO - (comparator logic output currents)) Driver = Inhibit, ILOAD Program = 40 mA, Load = Active Driver = Inhibit, ILOAD Program = 40 mA, 0 mA RLOAD = 10 k, VSOURCE = 10.5 V 15 +10.5 -4.5 465 570 475 600 45 7.2 5.2 1 7.9 5.9 W W A/K P P N NOTES 1 All temperature coefficients are measured at TJ = 75C to 95C. In test figures, voltmeter loading is 1 M or greater, scope probe loading is 100 k in parallel with 0.6 pF. 2 Typical values are not tested or guaranteed. Nominal values are generated from design or simulation analyses and/or limited bench evaluations and are not tested or guaranteed. 3 Spec Perf: N = Nominal, O = Operating Condition, T = Typical, P = Production, Max/Min. 4 VTERM linearity over the following condition: VL - 6 V < VTERM < VH + 6 V. 5 All ac input values are referred to the source end of transmission line input. 6 All ac tests are performed with driver in VTERM mode except where noted. 7 Rise time is calculated SQRT((comp out Tr) 2 - (comp in Tr) 2). Specifications are subject to change without notice. REV. A -7- AD53522 ABSOLUTE MAXIMUM RATINGS 1 POWER SUPPLY VOLTAGE VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3 V VEE to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7 V VCC to VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V VCCO to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V PWRGND, DRGND, GND_ROT, or HQGND . . . . 0.4 V OUTPUTS VOUT Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite2 VOUT, Inhibit Mode . . . . . . . . . . . . . . . . . . . . . +8.5 V, -2 V VOUT, Inhibit Mode . . . . . VL - 5.5 V < VOUT < VH + 5.5 V VHDCPL . . . . . . . . Do Not Connect Except for Cap to VCC VLDCPL . . . . . . . . Do Not Connect Except for Cap to VEE QH, QHB, QL, QLB Maximum IOUT: Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Surge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA THERM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 V, 0 V Driver Output Capacitance, Maximum . . . . . . . . . . . . 10 pF INPUTS DATA, DATAB, IOD, IODB, RLD, RLDB . . . . . . . . . . . . . . . . . . . . . . . . (VCCO + 1.5 V, VCCO - 4.5 V) INHL, INHLB, CMPD . . . . . . . . . . . . . . . -0.4 V to +5.5 V PWRD . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4 V to +4.5 V DATA to DATAB, IOD to IODB, RLD to RLDB . . . 3 V INHL to INHLB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V VH, VL, VTERM to GND (RSERIES < 500 ) . +7.5 V, -1.1 V VH to VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8 V, -3.5 V (VH - VTERM) and (VTERM - VL) . . . . . . . . . . . . . 8 V Reflection Clamp High/Low . . . . . . . . . . . . . . . +8.5 V, -2 V Protection Clamp Breakdown Voltage . . . . . . . . . . . . . . 12 V Protection Clamp Current . . . . . . . . . . . . . . . . . . . . . 5 mA VOUT to HCOMP or LCOMP . . . . . . . . . . . . . . . . . . 7.8 V ENVIRONMENTAL Operating Temperature (Junction) . . . . . . . . . . . . . . . 175C Storage Temperature . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 sec)3 . . . . . . . . . . . 260C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Absolute maximum limits apply individually, not in combination. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Output short circuit protection is guaranteed as long as proper heat sinking is employed to ensure compliance with the operating temperature limits. 3 To ensure lead coplanarity ( 0.002 inches) and solderability, handling with bare hands should be avoided and the device should be stored in environments at 24 C 5C (75F 10F) with relative humidity not to exceed 65%. ORDERING GUIDE Model AD53522JSQ Temperature Range 0C to 70C Package Description 100-Lead LQFP-EDQUAD with Integral Heat Slug Package Option SQ-100 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD53522 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Table I. Driver Truth Table Table II. Comparator Truth Table DATA DATAB IOD IODB 0 1 X X 1 0 X X 1 1 0 0 0 0 1 1 RLD X X 0 1 RLDB X X 1 0 Output State VL VH INH and CLAMP VTERM VOUT > HCOMP > HCOMP < HCOMP < HCOMP > LCOMP < LCOMP > LCOMP < LCOMP QH 1 1 0 0 Output States QHB QL 0 0 1 1 1 0 1 0 QLB 0 1 0 1 Table III. Active Load Truth Table VDUT INHL INHLB IOH 1 1 0 Output States (Including Diode Bridge) IOL I(VOUT) +10 mA V(IOLC) +10 mA V(IOLC) 0 -8- -10 mA IOL -10 mA IOH 0 REV. A V(IOHC) V(IOHC) 0 AD53522 PIN CONFIGURATION PROT_LO1 VCOM_S1 PWRGND PWRGND PWRGND PWRGND PWRGND HCOMP1 76 DATAB1 VTERM1 78 HQGND INHLB1 VCOM1 THERM DATA1 IODB1 IOHC1 IOLC1 INHL1 RLD1 IOD1 VH1 VCC 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 77 PROT_HI1 1 IOXRTN1 2 VCH1 3 VCL1 4 VHDCPL1 5 OUT1 6 VLDCPL1 7 PWRGND 8 PWRGND 9 DR_GND 10 PWRGND 11 PWRGND 12 GND_ROT 13 PWRGND 14 PWRGND 15 DR_GND2 16 PWRGND 17 PWRGND 18 VLDCPL2 19 OUT2 20 VHDCPL2 21 VCL2 22 VCH2 23 IOXRTN2 24 PROT_HI2 25 PIN 1 IDENTIFIER VL1 VEE 75 74 73 72 71 LCOMP1 VCC VCC VEE VEE QH1 QHB1 VCCO1 QLB1 QL1 RLDB1 PWRD1 GND_ROT PWRD2 RLDB2 QL2 QLB2 VCCO2 QHB2 QH2 VEE VEE VCC VCC LCOMP2 HEAT SLUG 70 69 68 67 66 65 AD53522 TOP VIEW (Not to Scale) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 INHLB2 PWRGND IODB2 DATAB2 PWRGND PWRGND HQGND IOD2 DATA2 PWRGND PROT_LO2 PWRGND NOTE DIE IS MOUNTED TO THE BACK OF THE HEAT SLUG. THE PACKAGE IS MOUNTED TO THE BOARD, HEAT SLUG UP. THERMSTART VCOM_S2 PIN FUNCTION DESCRIPTIONS Pin Number 1 2 3 4 5 6 7 Mnemonic PROT_HI1 IOXRTN1 VCH1 VCL1 VHDCPL1 OUT1 VLDCPL1 Description Channel 1, Output Voltage Sensing Diode. Current Return Path for the Active Load for Channel 1. Typically connected to a power ground. Analog Input Voltage that Sets the Reflection Clamp High Level of Channel 1. Analog Input Voltage that Sets the Reflection Clamp Low Level of Channel 1. Internal Supply Decoupling for the Driver Output Stage of Channel 1. This pin needs to be connected to VCC through a 39 nF (minimum) capacitor. Input/Output For The Driver, Window Comparator, Reflection Clamp, and Active Load of Channel 1. Internal Supply Decoupling for the Driver Output Stage of Channel 1. This pin needs to be connected to VEE through a 39 nF (minimum) capacitor. Power Ground. 8, 9, 11, 12, 14, PWRGND 15, 17, 18, 27, 28, 38, 44, 45, 81, 82, 88, 98, 99 10 DR_GND Analog Ground. REV. A -9- HCOMP2 INHL2 VEE RLD2 VCOM2 VCC VH2 VTERM2 IOLC2 IOHC2 VL2 AD53522 Pin Number 13 16 19 20 21 22 23 24 25 26 29 30 31 32 33 34 35 36, 54, 55, 71, 72, 90 37, 52, 53, 73, 74, 89 39 40 41 42 43 46 47 48 49 50 51 56 57 58 59 Mnemonic GND_ROT DR_GND2 VLDCPL2 OUT2 VHDCPL2 VCL2 VCH2 IOXRTN2 PROT_HI2 PROT_LO2 VCOM_S2 IOLC2 IOHC2 HQGND INHL2 INHLB2 VEE VCC RLD2 IOD2 IODB2 DATA2 DATAB2 VCOM2 VH2 VTERM2 VL2 HCOMP2 LCOMP2 QH2 QHB2 VCCO2 QLB2 Description Analog Ground. Analog Ground. Internal Supply Decoupling for the Driver Output Stage of Channel 2. This pin needs to be connected to VEE through a 39 nF (minimum) capacitor. Input/Output for the Driver, Window Comparator, Reflection Clamp, and Active Load of Channel 2 Internal Supply Decoupling for the Driver Output Stage of Channel 2. This pin needs to be connected to VCC through a 39 nF (minimum) capacitor. Analog Input Voltage that Sets the Reflection Clamp Low Level of Channel 2 Analog Input Voltage that Sets the Reflection Clamp High Level of Channel 2 Current Return Path for the Active Load for Channel 2. Typically connected to a power ground. Channel 2, Output Voltage Sensing Diode. Channel 2, Output Voltage Sensing Diode. Analog Output Voltage that Represents a Buffered VCOM1 Input Analog Input Voltage that Programs the Channel 2 Active Load Source Current. Analog Input Voltage that Programs the Channel 2 Active Load Sink Current. Clean Analog Ground for the Active Load for Channel 2. One of Two Complementary Inputs that Control the Inhibit Mode for the Active Load Bridge of Channel 2. One of Two Complementary Inputs that Control the Inhibit Mode for the Active Load Bridge of Channel 2. Negative Supply Terminal. Positive Supply Terminal. One of Two Complementary Inputs that Control, in Conjunction with IOD2 and IODB2, the Operating Mode of the Channel 2 Driver. Refer to Table I for specific conditions. One of Two Complementary Inputs that Control, in Conjunction with RLD2 and RLDB2, the Operating Mode of the Channel 2 Driver. Refer to Table I for specific conditions. One of Two Complementary Inputs that Control, in Conjunction with RLD2 and RLDB2, the Operating Mode of the Channel 2 Driver. Refer to Table I for specific conditions. One of Two Complementary Inputs that Determine the High and Low State of the Channel 2 Driver. Driver output is high for DATA2 > DATAB2. Refer to Table I for specific conditions. One of Two Complementary Inputs that Determine the High and Low State of the Channel 2 Driver. Driver output is high for DATA2 > DATAB2. Refer to Table I for specific conditions. Analog Input Voltage that Establishes the Commutation Voltage for the Active Load Diode Bridge for Channel 2. Analog Input Voltage that Sets the Logic 1 Level of the Driver Output Limit for Channel 2. Determines the driver output for DATA2 > DATAB2. Analog Input Voltage that Set the Termination Voltage Level of the Channel 2 Driver when in VTERM Mode. Analog Input Voltage that Set the Logic 0 Level of the Driver Output Limit for Channel 2. Determines the driver output for DATAB2 > DATA2. Analog Input Voltage that Sets the Logic 1 Compare Reference for the Window Comparator of Channel 2. Analog Input Voltage that Sets the Logic 0 Compare Reference for the Window Comparator of Channel 2. One of Two Complementary Outputs for the Logic 1 Window Comparator of Channel 1. One of Two Complementary Outputs for the Logic 1 Window Comparator of Channel 1. Input Supply Voltage for QH2, QHB2, QL2, and QLB2 Signals and Reference Voltage for DATA2, DATAB2, IOD2, IODB2, RLD2, and RLDB2. One of Two Complementary Outputs for the Logic 0 Window Comparator of Channel 2. THERMSTART Temperature Sensor Startup Pin. Normally not connected. -10- REV. A AD53522 Pin Number 60 61 62 63 64 65 66 67 68 69 70 75 76 77 78 79 80 83 84 85 86 87 91 92 93 94 95 96 Mnemonic QL2 RLDB2 PWRD2 GND_ROT PWRD1 RLDB1 QL1 QLB1 VCCO1 QHB1 QH1 LCOMP1 HCOMP1 VL1 VTERM1 VH1 VCOM1 DATAB1 DATA1 IODB1 IOD1 RLD1 INHLB1 INHL1 HQGND IOHC1 IOLC1 THERM Description One of Two Complementary Outputs for the Logic 0 Window Comparator of Channel 2. One of Two Complementary Inputs that Control, in Conjunction with IOD2 and IODB2, the Operating Mode of the Channel 2 Driver. Refer to Table I for specific conditions. Power-Down Control for Channel 2. Analog Ground. Power-Down Control for Channel 1. One of Two Complementary Inputs that Control, in Conjunction with IOD1 and IODB1, the Operating Mode of the Channel 1 Driver. One of Two Complementary Outputs for the Logic 0 Window Comparator of Channel 1. One of Two Complementary Outputs for the Logic 0 Window Comparator of Channel 1. Input Supply Voltage for QH1, QHB1, QL1, and QLB1 Signals and Reference Voltage for DATA1, DATAB1, IOD1, IODB1, RLD1, and RLDB1. One of Two Complementary Outputs for the Logic 1 Window Comparator of Channel 1. One of Two Complementary Outputs for the Logic 1 Window Comparator of Channel 1. Analog Input Voltage that Sets the Logic 0 Compare Reference for the Window Comparator of Channel 1. Analog Input Voltage that Sets the Logic 1 Compare Reference for the Window Comparator of Channel 1. Analog Input Voltage that Sets the Logic 0 Level of the Driver Output Limit for Channel 1. Determines the driver output for DATAB1 > DATA1. Analog Input Voltage that Sets the Termination Voltage Level of the Channel 1 Driver when in VTERM Mode. Analog Input Voltage that Sets the Logic 1 Level of the Driver Output Limit for Channel 1. Determines the driver output for DATA1 > DATAB1. Analog Input Voltage that Establishes the Commutation Voltage for the Active Load Diode Bridge for Channel 1. One of Two Complementary Inputs that Determine the High and Low State of the Channel 1 Driver. Driver output is high for DATA1 > DATAB1. Refer to the Driver Truth Table for specific conditions. One of Two Complementary Inputs that Determine the High and Low State of the Channel 1 Driver. Driver output is high for DATA1 > DATAB1. Refer to the Driver Truth Table for specific conditions. One of Two Complementary Inputs that Control, in Conjunction with RLD1 and RLDB1, the Operating Mode of the Channel 1 Driver. Refer to Table I for specific conditions. One of Two Complementary Inputs that Control, in Conjunction with RLD1 and RLDB1, the Operating Mode of the Channel 1 Driver. Refer to Table I for specific conditions. One of Two Complementary Inputs that Control, in Conjunction with IOD1 and IODB1, the Operating Mode of the Channel 1 Driver. Refer to Table I for specific conditions. One of Two Complementary Inputs that Control the Inhibit Mode for the Active Load Bridge of Channel 1. One of Two Complementary Inputs that Control the Inhibit Mode for the Active Load Bridge of Channel 1. Clean Analog Ground for the Active Load for Channel 1. Analog Input Voltage that Programs the Channel 1 Active Load Sink Current. Analog Input Voltage that Programs the Channel 1 Active Load Source Current. Temperature Sensor Output Pin. A resistor (10 k) should be connected between THERM and V CC. The approximate die temperature can be determined by measuring the current through the resistor. The typical scale factor is 1 A/K. Analog Output Voltage that Represents a Buffered VCOM1 Input. Channel 1 Output Voltage Sensing Diode. 97 100 VCOM_S1 PROT_LO1 REV. A -11- AD53522 OUTLINE DIMENSIONS 100-Lead Low Profile Quad Flat Package, Integrated Heat Sink [LQFP-ED] (SQ-100) Dimensions shown in millimeters 16.00 BSC SQ 1.60 MAX 0.75 0.60 0.45 SEATING PLANE 100 1 14.00 BSC SQ 76 75 PIN 1 BOTTOM VIEW 1.45 1.40 1.35 (PINS DOWN) 9.78 9.65 9.40 12.00 REF 0.20 0.09 7 3.5 0 VIEW A 25 26 49 50 0.15 0.05 0.08 MAX LEAD COPLANARITY VIEW A ROTATED 90 CCW 0.50 BSC 0.27 0.22 0.17 COMPLIANT TO JEDEC STANDARDS MS-026BED-HU Revision History Location 10/03--Data Sheet changed from REV. 0 to REV. A. Page Changes to FUNCTIONAL BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Changes to PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 -12- REV. A C02786-0-10/03(A) |
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