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PI6C4512 PLL Clock Multiplier Features * Zero ppm multiplication error * Input crystal frequency range: 5 - 30MHz * Input clock frequency range: 4 - 50MHz * Output clock frequencies range 200MHz * Period jitter 100ps (typ) * 9 Selectable frequencies controlled by S0 and S1 pins * Supply voltage: 3.3V 10% or 5.0V 10% * Packaging (Pb-Free and Green): --8-pin SOIC (W) Description The PI6C4512 is a precision general-purpose clock synthesizer with fmax 200MHz. The PI6C4512 uses an external low-cost crystal to generate a very accurate rate and stable system clocks. Block Diagram Pin Configuration S0 S1 X1 / ICLK X2 PLL Clock Synthesis and Control Circuit Output Buffer CLK X1 / ICLK VCC 1 2 3 4 8 7 6 5 X2 S1 S0 CLK Crystal Oscillator Output Buffer REF GND REF Clock Output Table(1) S1 0 0 0 M M M 1 1 1 S0 0 M 1 0 M 1 0 M 1 CLK x4 x (16/3) x5 x 2.5 x2 x (10/3) x6 x3 x8 Notes: 1. M = Mid-level (unconnected, biases to VCC/2). 06-0034 1 PS8763B 03/30/06 PI6C4512 PLL Clock Multiplier Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested) Storage temperature ......................................................-65C to +150C Ambient Operating Temperature ....................................... 0C to +70C Supply Voltage to Ground Potential (VCC)..................... -0.3V to +7.0V Inputs (Referenced to GND)................................... -0.5V to VCC +0.5V Clock Output (Referenced to GND) ....................... -0.5V to VCC +0.5V Soldering Temperature (Max of 10 seconds).................................260C Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Pin Description Name X1/ICLK VCC GND REF CLK S0 S1 X2 Pin 1 2 3 4 5 6 7 8 Description Crystal connection or clock input. Supply voltage: 3.3V 10% or 5.0V 10% Connect to GND Buffered crystal oscillator output clock Clock output Multiplier select pin 0. Connect to GND or VCC or float (no connection). Multiplier select pin 1. Connect to GND or VCC or float (no connection). Crystal connection. Leave unconnected for clock input. External Components The PI6C4512 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.1F || 0.01F should be connected between each VDD and GND and placed as close to the chip as possible. A series termination resistor of 33 may be used for clock outputs. If a crystal is used, it should be a fundamental mode, parallel resonant crystal. Crystal capacitors should be connected from X1 to ground and from X2 to ground to according to the crystal specifications. The value of capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) = (CL -15) x 2. Recommended Operation Conditions Symbol VCC TA Description Supply Voltage Operating Temperature Test Condition Min. 3 0 Typ. Max. 5.5 +70 Units V C 06-0034 2 PS8763B 03/30/06 PI6C4512 PLL Clock Multiplier DC Electrical Characteristics (VCC = 3.3V 10% and 5.0V 10%, TA = 0C to +70C, unless otherwise noted) Symbol VCC ICC VIH VIL VIH VIM VIL VOH VOL IS Symbol FIN FOUT TR TF TDC BW TPJ Description Supply voltage Supply current Input logic HIGH Input logic LOW Input logic HIGH Input mid-level Input logic LOW High-level output voltage Low-level output voltage Short circuit current IOH = -12mA IOL = +12mA No load, 20MHz crystal Test Condition Pin VCC VCC ICLK ICLK S0, S1 S0, S1 S0, S1 CLK, REF CLK, REF CLK 70 2.4 0.4 VCC-0.5 VCC/2 0.5 Min. 3 (VCC/2) +1 12 VCC/2 VCC/2 (VCC/2)-1 Typ. Max. 5.5 30 Units V mA V V V V V V V mA AC Electrical Characteristics (VCC = 3.3V 10% and 5.0V 10%, TA = 0C to +70C, unless noted) Parameter Input Frequency Output frequency(1) Output clock rise time Output clock fall time Output clock duty-cycle PLL bandwidth Period Jitter Test Condition Crystal Clock VCC: 4.5V to 5.5V VCC: 3.0V to 3.6V 0.8V to 2.0V, CL = 15pF load 2.0V to 0.8V, CL = 15pF load At VCC/2, f 150MHz At VCC/2, f > 150MHz f 150MHz 100MHz to 200MHz Pin ICLK ICLK CLK CLK CLK CLK CLK CLK CLK CLK 45 40 10 100 250 Min. 5 4 20 20 1 1 50 50 55 60 Typ. Max. 30 50 200 180 Unit MHz MHz MHz MHz ns ns % kHz ps Notes: 1. The phase relationship between input and output clocks can change at power up. Recommended Crystal Pericom recommends the Pericom 49S SMD series crystal, which is a low cost, low profile SMD crystal packaged in a HC-49/u short SMD package. Recommended Crystal Specifications Parameter Mode of Oscillation Frequency Frequency Tolerance Temperature and Aging Stability CO/CI Ratio Load Cap Equivalent Series Resistance Value Fundamental 5 - 30 50 50 240 18 30 pF Units AT MHz PPM PPM 06-0034 3 PS8763B 03/30/06 PI6C4512 PLL Clock Multiplier Packaging Mechanical: 8-Pin SOIC (W) Ordering Information(1,2) Ordering Code PI6C4512W PI6C4512WE Package Code W WE Package Description 8-pin SOIC Pb-Free and Green 8-pin SOIC Note: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. E = Pb-free and Green Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com 06-0034 4 PS8763B 03/30/06 |
Price & Availability of PI6C4512W
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