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IS32WV204816B
2M x 16 (32-Mbit) PSEUDO STATIC RAM
ISSI
MAY 2004
(R)
FEATURES
* Access time: 70ns * TTL compatible inputs and outputs; tri-state I/O * Wide Power supply voltage: 2.2V to 3.6V * CMOS Standby: 70A (32-Mbit) * Deep Power Down Standby: 5A (32-Mbit) * Deep Power-Down Mode: Data Invalid * Page Operation Mode: Four Word Access * Logic compatible with SRAM R/W (WE) pin. * Industrial Temperature Range: -40oC to 85oC
DESCRIPTION
The ISSI IS32WV204816B is a high-performance CMOS Pseudo Static RAM, organized as 2Meg x 16 bits. ISSI CMOS technology provides high density, high speed low power devices that features SRAM-like write timing. Data is written to memory cells on the rising edge of the WE signal. With a page size of 4 words, the device has a page access operation. The device also supports deep powerdown mode providing low-power standby. The IS32WV204816B is packaged in a 48-pin mini-BGA (6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A1 A2-A20
DECODER
2Mb x 16 MEMORY ARRAY
VDD GND I/O DATA CIRCUIT
I/O0-I/O15
COLUMN I/O
UB LB CS1 CS2 WE OE
CONTROL CIRCUIT
Copyright (c) 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
1
IS32WV204816B
PIN CONFIGURATIONS 48-pin mini-BGA (M) (6mm x 8mm)
1 2 3 4 5 6
ISSI
48-pin mini-BGA (B) (6mm x 8mm)
1 2 3 4 5 6
(R)
A B C D E F G H
A4 A3 A2 A1 A0 CS1 OE GND
A17 A7 A6 A5 I/O0 I/O8 I/O9 I/O1
UB LB A18 NC I/O2 I/O10 I/O11 I/O3
CS2 WE A20 A19 I/O5 I/O12 VDD I/O4
A8 A9 A10 A11 I/O7 I/O14 I/O13 I/O6
A12 A13 A14 A15 A16 NC I/O15 GND
A B C D E F G H
LB I/O8 I/O9 GND VDD I/O14 I/O15 A18
OE UB I/O10 I/O11 I/O12 I/O13 A19 A8
A0 A3 A5 A17 NC A14 A12 A9
A1 A4 A6 A7 A16 A15 A13 A10
A2 CS1 I/O1 I/O3 I/O4 I/O5 WE A11
CS2 I/O0 I/O2 VDD GND I/O6 I/O7 A20
PIN DESCRIPTIONS
A0-A20 A0-A1 WE OE CS1 CS2 LB, UB VDD GND NC Address Inputs Page Address Inputs Write Enable Output Enable Chip Enable Input Chip Select Input Lower & Upper Data Byte Control Input Power Ground No Connection
I/O0 to I/O15 Data Input/Outputs
2
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
IS32WV204816B
TRUTH TABLE
Function Read: Word Read: Lower Byte Read: Upper Byte Write: Word Write: Lower Write: Upper Outputs Disabled Standby Deep Power-Down Standby CS1 CS2 L L L L L L L H H H H H H H H H H L OE L L L X X X H X X WE H H H L L L H X X LB L L H L L H X X X UB L H L L H L X X X ADD XX XX XX XX XX XX XX X X
I/O0 to I/O7
ISSI
I/O8 to I/O15 I/OOUT HIGH-Z I/OOUT DIN INVALID DIN HIGH-Z HIGH-Z HIGH-Z Power ICC1 ICC1 ICC1 ICC1 ICC1 ICC1 ISB ISB ISB3 I/OOUT I/OOUT HIGH-Z DIN DIN INVALID HIGH-Z HIGH-Z HIGH-Z
(R)
L = VIL, H =VIH, X = VIL or VIH, High-Z = High-impedance. XX = At CS1 falling edge, all addresses (A2 to A20) are valid "IN". Page address signals (A0 and A1) must be VIH or VIL, during entire cycle.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
3
IS32WV204816B
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VT VDD IOUT PD TSTG Parameters Voltage on Any Pin Relative to GND Supply Voltage Output Current Power Dissipation Storage Temperature Rating -0.2 to VDD+3.6 -0.2 to VDD+3.6 50 0.6 -55 to +150 Unit V V mA W C
ISSI
(R)
Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol CIN1 CIN2 CIO Parameter Input Capacitance: A0-A20 Input Capacitance: CS1, CS2, OE, WE, LB, UB Data Input/Output Capacitance: I/O0-I/O15 Max. 10 10 10 Unit pF pF pF
Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25C, f = 1 MHz.
4
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
IS32WV204816B
RECOMMENDED OPERATING CONDITIONS (Voltages are referenced to GND.)
Symbol VDD VIH VIL VDH Parameter Supply Voltage Input High Voltage Input Low Voltage Data Retention Supply Voltage Min. 2.2 2.0 -0.2 2.0 Typ. -- -- -- Max. 3.6 VDD + 03 0.4 3.0 Unit V V V V
ISSI
(R)
ELECTRICAL CHARACTERISTICS(1) (Recommended Operating Conditions unless otherwise noted.)
Symbol Parameter IIL Input Leakage Current IIO VOH VOL ICC1 ICC2 ISB1 ISB2 ISB3 Output Leakage Current Output High Voltage Level Output Low Voltage Level Operating Current Page Access Operating Current Standby Current: TTL Standby Current: CMOS Standby Current: Deep Power-down Test Condition Any input 0V VIN VDD Other inputs not under test = 0V Output is disabled (Hi-Z) 0V VOUT VDD IOH = -0.5 mA IOL = 1.0 mA CS1 =VIH, IOUT = 0mA CS1 Cycling, tRC = tRC (min.) CS1=VIL, CS2=VIH, IOUT = 0mA Page Add. Cycling, tPC (min.) CS1=VIH, CS2=VIH CS1=Vss-0.2V, CS2=VDD-0.2V CS1=0.2V Min. -1.0 -1.0 1.9 -- -- -- -- -- -- Max. 1.0 1.0 -- 0.2 30 25 1 70 5 Unit A A V V mA mA mA A A
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
5
IS32WV204816B
AC CHARACTERISTICS
(Recommended Operating Conditions unless otherwise noted.)
ISSI
Min. 85 70 15 -- -- 70 -- 70 -10 65 -10 30 8 8 18 8 70 70 70 45 70 0 25 25 25 0 0 0 Max. -- 10K -- 70 70 -- 25 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Continued
(R)
Symbol tRC tCE tP tCEA tOEA tOEP tBEA tAPH tASC tAHC tASO, tASW tAHO, tAHW tWHC tRCS tWOS tRCH tWP tWCH tCWL tWBH tBWL tWR tDSW tDSC tDSB tDHW tDHC tDHB
Parameter Random Read or Write Cycle Time CS1 Pulse Width Pre-charge Time CS1 Access Time OE Access Time OE Pulse Width LB,UB Access Time Address (A0 and A1) Hold Time Address Setup Time Address Hold Time Address Setup Time Address Hold Time WE Hold Time Read Command Setup Time Write Command Setup Time Read Command Hold Time WE Pulse Width CS1 to End of Write Write Command to CS1 Lead Time LB,UB to End of Write Write Command to LB, UB Lead time Write Recovery Time Data Set-up Time from WE Data Set-up Time from CS1 Data Set-up Time from LB, UB Data Hold Time from WE Data Hold Time from CS1 Data Hold Time from LB, UB
Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
6
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
IS32WV204816B
AC CHARACTERISTICS Continued
(Recommended Operating Conditions unless otherwise noted.)
ISSI
Min. 10 0 0 0 -- -- -- -- 25 -- 5(1) 0 200 10 Max. -- -- -- -- 20 20 20 20 -- 25 -- -- -- --
(R)
Symbol tCLZ tOLZ tBLZ tWLZ tCHZ tOHZ tBHZ tWHZ tPC tAA tAOH tCS tCH tDPD
AC Notes:
Parameter CS1 Low to Output Active OE Low to Output Active LB, UB Low to Output Active WE Low to Output Active CS1 High to Output High-Z OE High to Output High-Z LB, UB High to Output High-Z OE High to Output High-Z Page Mode Cycle Time Page Mode Address Access Time Page Mode Output Data Hold Time CS1 Set-up Time CS1 Hold Time CS1 Pulse Width (Deep Power Down)
Units ns ns ns ns ns ns ns ns ns ns ns ns s ms
1. Guarantee minimum 10ns of data valid time under any specific operating condition. 2. After power-up, an initial pause of 200 us with CS2 high is required with the output open condition. 3. Parameters tCHZ, tOHZ, tBHZ and TWHZ define the time at which the output goes the into the open condition and are not output voltage reference levels. 4. During write cycles, input data is latched on the earliest of WE, LB/UB, or CS1 rising edge. Therefore, input data must be valid during the set-up time (tDSC, tDSB or tDSW) and hold time (tDHC, tDHB or tDHW). 5. Address (A2 to A20) inputs are latched on the falling edge of OE or WE. Address (A2 to A20) input must be valid during the set-up time (tASO or tASW) and hold time (tAHO or tAHW). 6. Data can not be retained at deep power-down stand-by mode. 7. If OE is high during the write cycle, the outputs will remain at high impedance. 8. During the output state of I/O signals, input signals of reverse polarity must not be applied. 9. trising = tfalling = 5ns for inputs.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
7
IS32WV204816B
AC TEST CONDITIONS
Parameter Input Pulse Level Input Rise and Fall Time Input and Output Timing and Reference Level Output Load Unit VDD-0.2V to VDD+0.2V 5 ns VREF See Figures 1 and 2 (1)
ISSI
(R)
Note 1. All AC test to output Load Figure 1, except High-Z use output load Figure 2.
2.2V to 3.6V R1() R2() VREF VTM 3070 3150 1.5V 2.8V
AC TEST LOADS
R1 VTM
1.8V R1
OUTPUT 30 pF Including jig and scope R2
OUTPUT 5 pF Including jig and scope R2
Figure 1
Figure 2
8
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
IS32WV204816B
AC WAVEFORMS Read Timing
tRC tCE CS1 tCH CS2 tASC A0~A1 tAHC A2~A20 tASO OE tRCS WE tOEP tRCH tAHO tP tAPH tP
ISSI
(R)
LB,UB tOEA tBEA tOLZ tBLZ I/O tCLZ tCEA tCHZ tBHZ tOHZ
For shaded areas either OE or CS1 = High.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
9
IS32WV204816B
AC WAVEFORMS Page Read timing (four word access)
ISSI
(R)
tRC tCE CS1 tCH tP
CS2 tASC tAHC tPC tPC tPC
A0~A1 tAPH A2~A20 tP tASO OE tRCS tRCH tAHO
WE
LB,UB tOEA tBEA tOLZ tBLZ I/O
Dout
tAOH
tAOH
tAOH
tCHZ
Dout
Dout
Dout
tCLZ tCEA
tAA tAA tAA
For shaded areas either OE or CS1 = High.
10
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
IS32WV204816B
AC WAVEFORMS Write Timing (WE Control Write) WE
ISSI
(R)
tRC tCE CS1 tCH CS2 tWR tASC tAPH tP
A0~A1 tASW A2~A20 tAHW
OE tWCH WE tWHC tWP tCWL tP
LB, UB tWBH tDSW Din tDHW Data Input Valid
Dout
High Impedance
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
11
IS32WV204816B
AC Wave Forms Write Timing (LB UB Control Write) LB/UB LB
ISSI
(R)
tRC tP tCE CS1 tCH
CS2 tASC A0~A1 tASW A2~A20 tWCH WE tWHC tCWL tWP tBWL LB, UB tAHW tAPH
tWR
tP
tWBH tDSB tDHB Data Input Valid
Din
Dout
High Impedance
12
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
IS32WV204816B
AC Wave Forms Write Timing (CS1 Control Write) CS1
ISSI
(R)
tRC tCE CS1 tCH CS2 tASC A0~A1 tASW A2~A20 tWHC WE tBWL LB, UB tDSC Din tCLZ Dout tWHZ High Impedance Data Input Valid tDHC tCWL tAHW tP
tAHC tAPH
tWR
OE = High.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
13
IS32WV204816B
Deep Power-Down Timing
ISSI
(R)
CS1 tDPD CS2 tCS tCH
Note: During deep power-down stand-by mode, data can not be retained.
Prohibition Timing
(Timing shown is prohibited.)
CS1
CS2
OE
WE
Note: A malfunction may occur, since devices go into test modes for internal use, if both OE and WE go Low coincident with or before falling edge of CS1.
14
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
IS32WV204816B
ISSI
(R)
ORDERING INFORMATION Industrial Range: -40C to +85C
Speed (ns) 70 Order Part No. IS32WV204816B-70MI IS32WV204816B-70BI Package Mini BGA (6mm x 8mm) (0.8 mm Pitch) Mini BGA (6mm x 8mm) (0.75 mm Pitch)
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 04/29/04
15
PACKAGING INFORMATION
Mini Ball Grid Array Package Code: B (48-pin)
Top View 1 2 3 4 56 6
ISSI
Bottom View
b (48x)
(R)
5
4
3
2
1
A B C D D E F G H D1
e
A B C D E F G H
e E E1
A2 SEATING PLANE A1
A
Notes: 1. Controlling dimensions are in millimeters.
mBGA - 6mm x 8mm
MILLIMETERS Sym.
N0. Leads A A1 A2 D D1 E E1 e b -- 0.24 0.60 7.90 5.90
mBGA - 8mm x 10mm
INCHES Min. Typ. Max. Sym.
N0. Leads
MILLIMETER Min. Typ. Max.
48 -- 0.24 0.60 9.90 7.90 -- -- -- -- -- 1.20 0.30 -- 10.10 8.10 --
INCHES Min. Typ. Max.
Min. Typ. Max.
48 -- -- -- -- -- 1.20 0.30 -- 8.10 6.10
-- 0.009 0.024 0.311 0.232
-- -- -- -- --
0.047 0.012 -- 0.319 0.240
A A1 A2 D D1 E E1 e b
-- -- -- -- --
0.047 0.012 -- 0.398 0.319
0.009 0.024 0.390 0.311
5.25 BSC 3.75 BSC 0.75 BSC 0.30 0.35 0.40
0.207 BSC 0.148 BSC 0.030 BSC 0.012 0.014 0.016
5.25 BSC 3.75 BSC 0.75 BSC 0.30 0.35 0.40
0.207 BSC 0.148 BSC 0.030 BSC 0.012 0.014 0.016
Copyright (c) 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 01/15/03
PACKAGING INFORMATION
Mini Ball Grid Array Package Code: M (48-pin)
ISSI
Bottom View
b (48x)
(R)
Top View 1 2 3 4 56 6
5
4
3
2
1
A B C D D E F G H D1
e
A B C D E F G H
e E E1
A2 SEATING PLANE A1
A
Notes: 1. Controlling dimensions are in millimeters.
Copyright (c) 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 01/15/03
PACKAGING INFORMATION
Mini Ball Grid Array Package Code: M (48-pin)
ISSI
(R)
mBGA - 6mm x 8mm
MILLIMETERS Sym.
N0. Leads A A1 A2 D D1 E E1 e b -- 0.25 0.60
INCHES Min. Typ. Max.
Min. Typ. Max.
48 -- -- -- 5.60BSC 5.90 6.00 6.10 4.00BSC 0.80BSC 0.40 0.45 0.50 1.20 0.40 --
.-- 0.010 0.024
-- 0.047 -- 0.016 -- --
7.90 8.00 8.10
0.311 0.314 0.319 0.220BSC 0.232 0.236 0.240 0.157BSC 0.031BSC 0.016 0.018 0.020
mBGA - 7.2mm x 8.7mm
MILLIMETERS Sym.
N0. Leads A A1 A2 D D1 E E1 e b -- 0 .24 0.60
mBGA - 9mm x 11mm
INCHES Min. Typ. Max. Sym.
N0. Leads
MILLIMETERS Min. Typ. Max.
48 -- 0.24 0.60 -- -- -- 5.25BSC 8.90 9.00 9.10 3.75BSC 0.75BSC 0.30 0.35 0.40 1.20 0.30 -- --
INCHES Min. Typ. Max.
Min. Typ. Max.
48 -- -- -- 5.25BSC 7.10 7.20 7.30 3.75BSC 0.75BSC 0.30 0.35 0.40 1.20 0.30 --
-- 0.009 0.024
-- -- --
0.047 0.012 --
A A1 A2 D D1 E E1 e b
-- -- --
0.047 0.012 --
0.009 0.024
8.60 8.70 8.80
0.339 0.343 0.346 0.207BSC 0.280 0.283 0.287 0.148BSC 0.030BSC 0.012 0.014 0.016
10.90 11.00 11.10
0.429 0.433 0.437 0.207BSC 0.350 0.354 0.358 0.148BSC 0.030BSC 0.012 0.014 0.016
2
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. D 01/15/03

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