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APT7846
Touch Screen Controller
Features
* * * * * * * *
16 Pin SSOP or TSSOP Operates With Four Wire Touch Screen 8-Bit or 12-Bit A/D Converter Ratiometric Conversion Eliminates Screen Calibration 1 Auxiliary Analog Input Full Power Down Control Internal Bandgap Reference Serial Interface To Microprocessor
Description
The APT7846 is enhance function of APT7843 added battery and temperature monitor function and offer of a bandgap reference voltage for system user. The APT7846 Touch Screen Controller IC provides all the screen driver , A/D converter and control circuits to easily interface to 4 wire resistive touch screen. The IC continually monitors the screen waiting for a touch. When the screen touched , the IC performs A/D converter to determine the location of touch. Also , this device has 1 auxiliary input to A/D converter , allowing for the measurement of other input signal.
Pin Assignment Applications
+Vcc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DCLK CS DIN BUSY DOUT PENIRQ +Vcc V4-.
* * * * *
PDAs Hand held computer Touch-screen mobile phone Protable electronic dictionary Smart IA
X+ Y+ XYGND V*)6 IN
Ordering Information
APT7846
Handling Code Temp. Range Package Code Package Code N : SSOP Temp. Range I : - 40 to 85 C Handling Code TU : Tube O : TSSOP
TR : Tape & Reel
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 1 www.anpec.com.tw
APT7846
Block Diagram
PENIRQ
X+ XY+ YScreen Driver 12 Bit or 8 Bit A/D Converter MUX Serial Interface
DCLK CS DIN
V*)6 IN
Internal Reference
DOUT BUSY
V4-.
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NAME +Vcc X+ Y+ XYGND V*)6 IN V4-. +Vcc PENIRQ DOUT BUSY DIN CS DCLK DESCRIPTION Power Supply , 2.7V to 5V. Connect to X+ on touch screen. Connect to Y+ on touch screen. Connect to X- on touch screen. Connect to Y- on touch screen. Ground Measure Battery Input. Auxiliary input of A/D converter. Voltage Reference Input or Output. Power Supply , 2.7V to 5V. Pen interrupt. (requires to 100k pull-up resistor externally) Serial Data Output. This output is high impedance when CS is HIGH. Busy Output. This output is high impedance whenCS is HIGH. Serial Data input. Chip Select. (Active Low) Serial Clock.
Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001
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APT7846
Electrical Characteristics
At TA = -40C to 85C, VCC = +2.7V , VREF = +2.5V , fSAMPLE = 125kHz , fCLK = 16 f SAMPLE = 2MHz , 12-bit mode , and digital inputs = GND or Vcc , unless otherwise noted.
PARAMETER DC ACCURACY Resolution No missing code Integral Nonlinearity Offset Error Offset Error Match Gain Error Gain Error Match Noise Power Supply Rejection REFERENCE INPUT VREF Input Voltage Range DC Leakage Current VREF Input Impedance VREF Input Current FSAMPLE = 12.5 kHz CS = Vcc REFERENCE OUTPUT Internal Reference Voltage Input Impedence DYNAMIC PERFORMANCE Aperture Delay Aperture Jitter Channel to Channel Isolation CONVERSION RATE Conversion Time Track/Hold Acquisition Time Throughput Rate SWITCH DRIVERS On-Resistance Y+ , X+ Y- , X4 4 15 15 3 125 12 DCLK cycles DCLK cycles KSPS VIN = 2.5Vp-p ; FIN = 50kHz 30 100 100 ns ps dB Internal Reference Off 2.4 2.5 1 2.6 V G CS = GND or Vcc 1.0 1 5 13 2.5 3 40 Vcc A G A A A 0.1 30 70 0.1 11 2 6 1 4 1 12 Bits Bits LSB LSB LSB LSB LSB uV rms dB CONDITIONS APT7846 MIN TYP MAX UNIT
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APT7846
Electrical Characteristics (Cont.)
PARAMETER LOGIC INPUTS Input High Voltage , V I N H Input Low Voltage , V I N L Input Current , I I N Input Capacitance , C I N LOGIC OUTPUTS Output High Voltage , V O H Output Low Voltage , V O L PENIRQ output low voltage , V O L Floating-State Leakage Current Floating-State Output Capacitance Output Coding ANALOG INPUT Input Voltage Ranges DC Leakage Current Input Capacitance POWER REQUIREMENTS Vcc Icc Normal Mode (Static) Normal Mode (FSAMPLE = 12.5kSPS) Shutdown Mode(Static) Showdown BATTERY MEASURE Input Voltage Range Input impedance Sample Battery On Sample Battery Off Accuracy TEMPERATURE RANGE Normal Operation -40 85 C V R EF -2 10 1 2 K G % 0.5 6 V Vcc = 3.6V Digital I/Ps =0V or Vcc Vcc = 3.6V Vcc = 3.6V 650 540 3 3.6 A A A W 2.7 3.6 V 0 0.1 30 V R EF V A pF |I O H | -250A |I O L | 250A
Vcc 0.2
CONDITIONS
APT7846 MIN 2.4 0.8 1 10 TYP MAX
UNIT
|I I N H | +5A |I I N L | +5A
V V A pF V 0.4 0.2 10 10 V V A pF
Straight ( Natural ) Binary
Note : (1) LSB means least Significant Bit. With VREF equal to +2.5V , one LSB is 610V
Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001
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APT7846
Chip Overview
The APT7846 is a successive approximation analog-to-digital (A/D) converter based around a capacitive redistribution DAC. Figure 1 show basic operation of the APT7846. The APT7846 communicates via a 4-wire serial interface. The device requires an external reference voltage Vref. The value of the reference voltage directly sets the input range of the converter. Otherwise you can use internal reference Voltage to do conversion. The APT7846 primary function is to control resistive touchscreens. When a touch is detected , pen interrupt pin will go low to wake up extenal microprocessor . The microprocessor writes register to initiate
+2.7V to +5v 1uF to 10uF (Optional)
conversion. This A/D converter may also be used to measure voltage presented on the IN Pin or to measure battery presented on the VBAT Pin.
Analog Input
The analog input to the converter is provided via a four-channel multiplexer. Figure 2 shows a simplified diagram of the APT7846 with the difference input of the A/D converter , and the converters reference. Table I and Table II also show the relationship between the A2 , A1 , A0 , SER/,.4 and the configuration of the APT7846. See the section of single-ended reference mode and differential reference mode for more details.
0.1uF
1 2
APT7846 +Vcc X+ Y+ XYGND VBAT IN DCLK CS DIN BUSY DOUT PENIRQ +Vcc VREF
16 15 14 13 12 11 10 9
To Touch Screen
3 4 5 6
Connect to Microprossor
Battery Input Auxiliary Input
7 8
0.1uF
100k ohm (optional)
FIGURE 1. Basic Operation of the APT7846
Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001
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APT7846
PENIRQ
TEMP 1 TEMP 0
+Vcc
VREF
A2-A0 (Shown 001B)
SER/DFR (Shown HIGH)
Ref ON/OFF X+ X-
Y+ Y-
+IN -IN
+REF CONVERTER -REF
2.65V Reference
VBAT
7.5K
2.5K
IN GND
Battery On
FIGURE 2. Simplified Diagram of Analog Input
A2 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 +IN
+IN(TEMP 1)
VBAT AUXIN
TEMP
+IN(TEMP 0)
Y-
X+ +IN
Y+ Y-POSITION Measure
XZ1Z2XYPOSITION POSITION POSITION DRIVERS DRIVERS OFF OFF OFF OFF Measure Measure X-,ON X-,ON ON OFF OFF ON OFF Y+,ON Y+,ON OFF OFF OFF
+IN +IN +IN +IN Measure
TABLE I. Input Configuration , Single-Ended Reference Mode (SER/ ,.4 HIGH).
A2 0 0 1 1 A1 0 1 0 0 A0 1 1 0 1 +REF -REF Y+ YY+ XY+ XX+ XYX+ +IN +IN Y+ Y-POSITION X-POSITION Z1-POSITION Z2-POSITION DRIVERS ON Measure Y+,YMeasure Y+,XMeasure Y+,XMeasure X+,X-
+IN +IN
TABLE II. Input Configuration , Differential Reference Mode (SER/ ,.4 LOW).
Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001
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APT7846
Single-Ended reference mode
Figure 3 shows the diagram of single-ended reference mode. This application shows the measurement of current Y poisition is made by connecting the X+ input to the A/D converter , turning on the Y+ and Y- drivers , and digitizing the voltage on X+. For this measurement , the resistance in the X+ lead does not affect the conversion. However , since the resistance between Y+ and Y- is fairly low , the on-resistance of the Y drivers does make a small difference. Under the situation outlined so far , it would not be possible to achieve a zero volt input or a full-scale input regardless of where the pointing device is on the touch screen because some voltage is lost across the internal switches. This situation can be remedied if use differential reference mode
+Vcc
+Vcc
Y+ Y+ X+
+IN +REF
Converter
-IN -REF
Y-
YY Switch ON
GND
Figure 4. Differential Reference Mode (SER/,.4 LOW , A2=Low , A1=Low , A0=High)
Serial Interface
Data is written to , and read from , the APT7846 via the serial port. The serial port has 4 pins - serial clock (DCLK) , chip select ( CS) , data in (DIN) and data out (DOUT). The DCLK acts on the rising edge. The CS acts as a reset for the serial port with +5 goes low initiating a conversion cycle. The cycle consists of 2 parts - a write followed by a read. Figure 5 shows the typical timing of the APT7846s serial interface. A total of 24 clock cycles will complete one conversion. Also shown in Figure 5 is the placement and order of the control bits within the control byte. Tables III and IV give detailed information about these bits. The first bit , the S bit , must always be HIGH and indicates the start of the control byte. The APT7846 will ignore inputs on the DIN pin until the start bit S detected. The next three bits (A2 - A0) select the active input channel or channels of the input multiplexer (see Tables I and II and Figure 2). The MODE bit determines the number of bits for each conversion , either 12 bits (LOW) or 8 bits (HIGH). The SER/,.4 bit controls the reference mode: either single-ended (HIGH) or differential (LOW). (The differential mode is also referred to as the ratiometric conversion mode.) The last two bits (PD1 - PD0) select the power- down mode as shown in Table V. If both inputs are HIGH , the device is always powered up. If both inputs are LOW , the device enters a power-down mode between conversions.
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Y+ VREF X+
+IN +REF
Converter
-IN -REF
Y-
GND
Y Switch ON
GND
FIGURE 3. Single-Ended Reference Mode (SER/,.4High , A2=Low , A1=Low , A0=High)
Differential reference mode
As shown in Figure 4 , by setting the SER/,.4 bit LOW , the +REF and -REF inputs are connected directly to Y+ and Y-. This makes the analog-to-digital conversion ratiometric. The result of the conversiong is always a percentage of the external resistance , reardless of how it changes in relation to the on-resistance of the internal switches. Note that there is an important consideration regarding power dissipation when using the ratiometric mode of operation , the external device should powered throughout the acquisition and conversion periods.
Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001
APT7846
CS
DCLK
1 tACQ
8
1
8
1
8
DIN
S
A2 A1 ldle
A0
MODE
SER/ DFR
2, 2,
(START) Acquire Conversion ldle
BUSY
DOUT
11 10 9
(MSB)
87
6
5
4
3
2
1
0
(LSB)
FIGURE 5. Conversion Timing , 24-Clocks per Conversion , 8-bit Bus Interface. No DCLK Delay Required with Dedicated Serial Port.
Bit 7 (MSB) S
Bit 6 A2
Bit 5 A1
Bit 4 A0
Bit 3
Bit 2
Bit 1 PD1
Bit 0 (LSB) PD0
PD1 0 0 1 1
PD0 0 1 0 1
PENIRQ DESCRIPTION Enabled Enabled Enabled Power-down between conversions. When each conversion is finished, the converter enters a low power mode. Reference is OFF. Reference is ON
MODE SER/DFR
TABLE III. Order of the Control Bits in the Control Byte.
BIT 7 NAME S DESCRIPTION Start Bit. Control byte starts with first HIGH bit on DIN. A new control byte can start every 15th clock cycle in 12-bit conversion mode or every 11th clock cycle in 8-bit conversion mode. A2-A0 Channel Select Bits. Along with the SER/DFR bit, these bits control the setting of the multiplexer input, switches, and reference inputs, as detailed in Tables I and II. MODE 12-Bit/8-Bit Conversion Select Bit. This bit controls the number of bits for the following conversion: 12bits(LOW) or 8-bits(HIGH). SER/DFR Single-Ended/Differential Reference Select Bit. Along with bits A2-A0, this bit controls the setting of the multiplexer input, switches, and reference inputs, as detailed in Tables I and II. PD1-PD0 Power-Down Mode Select Bits. See Table V for details.
No power-down between conversions, Disabled device is always powered.
6-4
TABLE V. Power-Down Selection.
3 2
1-0
TABLE IV. Descriptions of the Control Bits within the Control Byte.
Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001
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APT7846
TEMPERATURE MEASUREMENT
The temperature measurement technique used in the APT7846 relies on the characteristics of a semiconductor junction operation at a fixed current level. The forward bipolar transistor voltage (VBE ) has a well defined characteristic versus temperature. If you got 25C value of the VBE voltage then measured ambient temperature to monitor the voltage variance. There are two mode to measure temperature. The Temp 0 requires calibration at a known temperature , but only requires a single reading to predict the ambient temperature. The PENIRQ bipolar transistor is used during this measurement , the A/D with an address of A2=0 , A1=0 and A0=0 (see Table I and Figure 6). This voltage is typically 600mV at +25C , with a 20A current through it. The TC of temperature Temp 0 is very consistent at 2.1 mV/C. Catch the bipolar transistor voltage on room temperature , in memory , for calibration purposes by the user. The Temp 1 requires two steps to measure temperature. First step read Temp 0 voltage. Second step read address of A2=1 , A1=1 , and A0=1 , with an 82 times large current. The voltage difference between the Temp 0 and Temp 1 conversion using 82 times the bias. Current will be represented by kT/q ln (N) , where N is the current ratio = 82 , k = Boltzmanns constant (1.38054 10e23 electrons volts/degrees Kelvin) , q = the electron charge (1.602189 10e19 C) , and T = the temperature in degrees Kelvin. The resultant equation for solving for K is : K = q V / ( k In ( N ) ) V = V( 82 ) V ( 1 ) ( mV ) K = 2.30 V ( K / mV ) C = 2.30 V ( mV ) 273 K where , (1)
BATTERY MEASUREMENT
An added feature of the APT7846 is the ability to monitor the battery voltage , as shown in Figure7. The battery voltage can vary from 0.5V to 6V , while maintaining the voltage to the APT7846 at 2.7V , 3.3V , etc. The input voltage (VBAT ) is divided down by 4 so that a 6.0V battery voltage is represented as 1.5V to the ADC. This simplifies the multiplexer and control logic. In order to minimize the power consumption , the divider is only ON during the samling of DIN to A2=0 , A1=1 , and A0=0. Tables I and II show the relationship between the control bits and configuration of the APT7846.
Battery 0.5V to 6.0V
DC/DC Converter
MUX
A/D Converter
Vcc
VBAT 7.5k 2.5k
0.125V to 1.5V
FIGURE 6. Functional Block Diagram of Temperature Measurement Mode..1/URE
FIGURE 7. Battery Measurement Functional Block Diagram.
Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001
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APT7846
Calculating Touch Resistance
There are total of four measurements possible :
MEASURE X-position Y-position Z1-position Z2-position DRIVE X+,XY+,YY+,XY+,XPIN MEASURED Y+ X+ X+ YRESULT A B C D
FIGURE 8 is Pressure measurement diagram. where the result is a number from 0 to 4096. From simple network theory , RTHOUCH can be represented in many ways , 2 are given below :
RTHOUGH = RX * A 4096 * *( A 4096 D C -1 ) B 4096
where RX = X plate resistance where RY = Y plate resistance
or
RTHOUGH =
RX C
* ( 4096 - C ) - RY + RY *
X+ Touch
Y+
Measure X -Position
X-Position XYMeasure Z 1-Position
X+ Touch
Y+
Z1-Position X+ Touch Z2-Position XYY+ XY-
Measure Z 2-Position
FIGURE 8 is Pressure measurement diagram.
Internal Reference
The APT7846 has an internal 2.5V voltage reference that can be turned ON and OFF with the power-down address PD1=1(see table V). Typically , the internal reference voltage is only used in the single-ended mode for battery monitoring , temperature measurement , and for utilizing the auxiliary input. Optimal
Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2001 10
touch-screen performance is achieved when utilizing the differential mode. The internal reference voltage of the APT7846 must be commanded to be off to maintain compatibility with the APT7843. Therefore , after power-up , a write of PD1=0 is required to insure the reference is off.
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APT7846
+Vcc
Y+
100k PENORQ
this method could be used with field programmable gate arrays (FPGAs) or application specific integrated circuits (ASICs). (Note that this effectively increases the maximum conversion rate of the converter).
AC Timing
Figure 12 and Table VI provide detailed timing of the APT7846.
SYMBOL DESCRIPTION MIN TYP MAX UNIT
X+
Y-
Y+,Y- Driver
tACQ tDS tDH tDO tDV tTR tCSS tCSH tCH tCL tBD tBDV tBTR
Acquisition Time DIN Valid Prior to DCLK Rising DIN Hold After DCLK HIGH DCLK Falling to DOUT Vaild CS Falling to DOUT Enabled CS Rising to DOUT Disabled CS Falling to DCLK Rising CS Rising to DCLK lgnored DCLK HIGH DCLK LOW DCLK Falling to BUSY Rising CS Falling to BUSY Enabled CS Rising to BUSY Disable
1.5 100 10 200 200 200 100 0 200 200 200 200 200
s ns ns ns ns ns ns ns ns ns ns ns ns
ON
FIGURE 9. PERIRQ Functional Block Diagram
PENIRQ Output
The pen interrupt output function is detailed in Figure 9. By connecting a pull-up resistor to VCC (typically 100k) , the PENIRQ output is HIGH. While in the power-down mode , with PD0 = PD1 = 0 , the Y driver is ON and connected to GND and the PENIRQ . output is connected to the X+ input. When the panel is touched , the X+ input is pulled to ground through the touch screen and PENIRQ output goes LOW due to the current path through the panel to GND , initiating an interrupt to the processor. During the measurement cycles for X- and Y-Position , the PENIRQ output diode will be internally connected to GND and the X+ input disconnected from the PENIRQ diode to eliminate any leakage current from the pull-up resistor to flow through the touch screen , thus causing no errors.
TABLE VI. Timing Specifications (+Vcc=+2.7V and Above , TA=-40C to +85C , CLOAD=50pF).
16-Clocks or 15-Clocks per Conversion
The APT7846 will alow a conversion every 16 clock cycles , as shown in Figure 10. This figure shows possible serial communication occurring with other serial peripherals between each byte transfer between the processor and the converter. Figure 11 provides the fastest way to clock the APT7846. This method will not work with the serial interface of most microcontrollers and digital signal processors as they are generally not capable of providing 15 clock cycles per serial transfer. However ,
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APT7846
CS
DCLK 1 DIN S
CONTROL BITS
8
1
8
1 S
CONTROL BITS
8
1
BUSY
DOUT
11 10 9 8 7 6 5
43210
11 10 9
FIGURE 10. Conversion Timing , 16-Clocks per Conversion , 8-bit Bus Interface. No DCLK Delay Required with Dedicated Serial Port.
CS
DCLK 1 DIN S
) ) ) MODE SGL/ 2, 2, DIF
15 1 S
) ) ) MODE SGL/ 2, 2, DIF
15 1 S
) ) )
BUSY
DOUT
11 10 9 8 7 6 5 4 3 2 1 0
11 10 9 8 7 6 5 4 3 2
FIGURE 11. Maximum Conversion Rate , 15-Clocks per Conversion.
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APT7846
CS tCSS DCLK tDS DIN tBDV tDH
2,
tCH
tCL
tBD
tBD
tBD
tCSH
BUSY
tBTR
DOUT
tDV 11 10
tTR
FIGURE 12. Detailed Timing Diagram.
Customer Service
Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
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APT7846
Packaging Information
SSOP
D N
H
E
GAUGE PLANE
123 A e B A1 L 1
Millimeters Dim A A1 B D E e H L N 1 Min. 1.350 0.10 0.20 3.75 5.75 0.4 0 Max. 1.75 0.25 0.30 4.05 6.25 1.27 8
Variations- D Variations SSOP-16 Min. 4.75 Max. 5.05 Dim A A1 B D E e H L N 1
Inches Min. 0.053 0.004 0.008 0.147 0.226 0.016 0 0.069 0.010 0.012 0.160 0.246 0.050 8
Variations- D Min. 0.187 Max. 0.199 SSOP-16
Max. Variations
See variations 0.625 TYP.
See variations 0.025 TYP.
See variations
See variations
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APT7846
Packaging Information
TSSOP
e N
2x E/2 E1 E ( 2)
GAUGE PLANE
123
e/2
D
A2 A
0.25
L
1
b
A1
( 3)
Dim A A1 A2 b D e E E1 L 1 2 3
Max. 1.2 0.00 0.15 0.80 1.05 0.19 0.30 5.1 (N=16PIN) 4.9 (N=16PIN) 6.6 (N=20PIN) 6.4 (N=20PIN) 7.9 (N=24PIN) 7.7 (N=24PIN) 9.8 (N=28PIN) 9.6 (N=28PIN) 0.65 BSC 6.40 BSC 4.30 4.50 0.45 0.75 0 8 12 REF 12 REF
Min.
Millimeters
Max. 0.047 0.000 0.006 0.031 0.041 0.007 0.011 0.201 (N=16PIN) 0.193 (N=16PIN) 0.260 (N=20PIN) 0.252 (N=20PIN) 0.311 (N=24PIN) 0.303 (N=24PIN) 0.386 (N=28PIN) 0.378 (N=28PIN) 0.026 BSC 0.252 BSC 0.169 0.177 0.018 0.030 0 8 12 REF 12 REF
Min.
Inches
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