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FAN7711 Ballast Control IC March 2007 FAN7711 Ballast Control IC Features Floating Channel for Bootstrap Operation to +600V Low Start-up and Operating Current: 120A, 3.2mA Under-Voltage Lockout with 1.8V of Hysteresis Adjustable Run Frequency and Preheat Time Internal Active ZVS Control Internal Protection Function (Latch Mode) Internal Clamping Zener Diode High Accuracy Oscillator Soft-Start Functionality Description The FAN7711, developed using Fairchild's unique highvoltage process, is a ballast control integrated circuit (IC) for a fluorescent lamp. FAN7711 incorporates a preheating / ignition function, controlled by an userselected external capacitor, to increase lamp life. The FAN7711 detects switch operation from after ignition mode through an internal active Zero-Voltage Switching (ZVS) control circuit. This control scheme enables the FAN7711 to detect an open-lamp condition, without the expense of external circuitry, and prevents stress on MOSFETs. The high-side driver built into the FAN7711 has a common-mode noise cancellation circuit that provides robust operation against high-dv/dt noise intrusion. Applications Electronic Ballast 8-SOP 8-DIP Ordering Information Part Number FAN7711N FAN7711M FAN7711MX Package 8-DIP 8-SOP Pb-Free Yes Operating Temperature Range -25C ~ 125C Packing Method Tube Tube Tape & Reel (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 www.fairchildsemi.com FAN7711 Ballast Control IC Typical Application Diagrams D5 R1 U1 D1 D2 D6 R3 VDD C1 Main Supply 1 2 FAN7711 3 4 8 7 6 5 VB HO VS LO R5 Q2 R4 Q1 C4 D7 C5 L1 C6 RT CPH D3 D4 GND C2 R2 C3 Lamp C7 FAN7711 Rev. 1.00 Figure 1. Typical Application Circuit for Compact Fluorescent Lamp Internal Block Diagram VDD 1 HIGH-SIDE DRIVER 10V REG VDD sense 15V SHUNT REGULATOR VB UVLO 8 VB Reference IPH=0.6*IRT IRT BIAS & SYSTEM LATCH UVLO SDH R S Q Noise Canceller S R Q Q 7 HO 6 VS 4V IPH IPH* CPH 3V 5V IPH* BGR UVLO BIAS TSD SHORT-PULSE GENERATOR RT 2 IRT Q SDL PRE-HEAT Control CPH<3V Yes 2A 12A No CPH 0A SYSHALT SET RESET DEAD-TIME Control OSCILLATOR VDDH/VDD LSH VDDH/VDD LSH SDL SDH LOW-SIDE GATE DRIVER DELAY 5 LO CPH 3 S SDL SDH R Q Q RESET SYSHALT 5V/3V ADAPTIVE ZVS ENABLE LOGIC ADAPTIVE ZVS CONTROLLER OUTPUT TRANSITION SENSING 4 GND FAN7711 Rev. 1.00 Figure 2. Functional Block Diagram (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 2 www.fairchildsemi.com FAN7711 Ballast Control IC Pin Configuration VB 8 HO 7 VS 6 LO 5 FAN7711 YWW (YWW : Work Week Code) 1 VDD 2 RT 3 CPH 4 GND FAN7711 Rev. 1.00 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # 1 2 3 4 5 6 7 8 Name VDD RT CPH GND LO VS HO VB Supply voltage Oscillator frequency set resistor Preheating time set capacitor Ground Low-side output High-side floating supply return High-side output High-side floating supply Description (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 3 www.fairchildsemi.com FAN7711 Ballast Control IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified. Symbol VB VS VIN ICL dVS/dt TA TSTG PD JA Note: High-side floating supply Parameter High-side floating supply return RT, CPH pins input voltage Clamping current level Allowable offset voltage slew rate Operating temperature range Storage temperature range Power dissipation Thermal resistance (junction-to-air) 8-SOP 8-DIP 8-SOP 8-DIP Min. -0.3 -0.3 -0.3 Typ. Max. 625 600 8 25 Unit V V V mA V/s C C W C/W 50 -25 -65 0.625 1.2 200 100 125 150 1. Do not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the VDD pin of this device. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 4 www.fairchildsemi.com FAN7711 Ballast Control IC Electrical Characteristics VBIAS (VDD, VBS) = 15.0V, TA = 25C, unless otherwise specified. Symbol Characteristics Condition VDD increasing VDD decreasing IDD =10mA VDD = 10V 50kHz, CL = 1nF Min. Typ. Max. Unit 12.4 10.8 14.8 13.4 11.6 1.8 15.2 120 3.2 8.5 7.9 9.2 8.6 0.6 50 1 45 2.5 3.0 2.00 12 7.0 85 53.0 3.1 1.0 3.5 2.85 16 V 98 57.3 kHz kHz s s A mA A V A 10.0 9.5 V 200 A mA 14.4 12.4 V Supply Voltage Section VDDTH(ST+) VDD UVLO positive going threshold VDDTH(ST-) VDD UVLO negative going threshold VDDHY(ST) VCL IST IDD VDD-side UVLO hysteresis Supply clamping voltage Start-up supply current Dynamic operating supply current High-Side Supply Section (VB-VS) VHSTH(ST+) High-side UVLO positive going threshold VBS increasing VHSTH(ST-) High-side UVLO negative going threshold VBS decreasing VHSHY(ST) High-side UVLO hysteresis IHST IHD ILK VMPH IPH IIG VMO fPRE fOSC DTMAX DTMIN High-side quiescent supply current High-side dynamic operating supply current Offset supply leakage current CPH pin preheating voltage range CPH pin charging current during preheating CPH pin charging current during ignition CPH pin voltage level at running mode Preheating frequency Running frequency Maximum dead time Minimum dead time RT = 80k, VCPH = 2V RT = 80k VCPH = 1V, VS = GND during preheat mode VCPH = 6V, VS = GND during run mode PW = 10s PW = 10s PW = 10s PW = 10s CL = 1nF, VBS = 15V CL = 1nF, VBS = 15V CL = 1nF, VBS = 15V CL = 1nF, VBS = 15V 250 500 250 500 72 48.7 VCPH = 1V VCPH = 4V VBS = 14V 50kHz, CL = 1nF VB = VS = 600V Oscillator Section 1.25 8 Output Section IOH+ IOHIOL+ IOLtHOR tHOL tLOR tLOL VS(2) High-side driver sourcing current High-side driver sinking current Low-side driver sourcing current Low-side driver sink current High-side driver turn-on rising time High-side driver turn-off rising time Low-side driver turn-on rising time Low-side driver turn-off rising time Maximum allowable negative VS swing range for signal propagation to high-side output 350 650 350 650 45 25 45 25 -9.8 V ns mA (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 5 www.fairchildsemi.com FAN7711 Ballast Control IC Electrical Characteristics (Continued) VBIAS (VDD, VBS) = 15.0V, TA = 25C, unless otherwise specified. Symbol Protection Section VCPHSD ISD TSD Characteristics Shutdown voltage Shutdown current Thermal shutdown (2) Condition Min. Typ. Max. Unit 2.6 250 165 V A C VRT = 0 after run mode Note: 2. This parameter, although guaranteed, is not 100% tested in production. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 6 www.fairchildsemi.com FAN7711 Ballast Control IC Typical Characteristics 200 180 3.0 2.5 IST [A] IPH [A] 160 140 120 100 80 -40 -20 0 20 40 60 80 100 120 2.0 1.5 1.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 4. Start-Up Current vs. Temp. Figure 5. Preheating Current vs. Temp. 16 14 12 10 8 -40 4.0 3.5 IDD [mA] -20 0 20 40 60 80 100 120 IIG [A] 3.0 2.5 2.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 6. Ignition Current vs. Temp. Figure 7. Operating Current vs. Temp. 100 80 400 300 IHST [A] 60 40 20 0 -40 ISD [A] -20 0 20 40 60 80 100 120 200 100 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 8. High-Side Quiescent Current vs. Temp. Figure 9. Shutdown Current vs. Temp. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 7 www.fairchildsemi.com FAN7711 Ballast Control IC Typical Characteristics (Continued) 14.4 14.0 13.6 13.2 12.8 12.4 12.0 11.6 11.2 10.8 10.4 -40 10.0 VDDTH [V] VHSTH [V] ST+ 9.6 ST+ 9.2 8.8 8.4 8.0 -40 ST- ST- -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 10. VDD UVLO vs. Temp. Figure 11. VBS UVLO vs. Temp. 16.2 16.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 -20 0 20 40 60 80 100 120 1.2 -40 -20 0 20 40 60 80 100 120 15.6 15.4 15.2 15.0 14.8 -40 VCPHSD [V] 15.8 VCL [V] Temperature [C] Temperature [C] Figure 12. VDD Clamp Voltage vs. Temp. Figure 13. Shutdown Voltage vs. Temp. 58 56 100 95 fOSC [kHz] fPRE [kHz] 54 52 50 48 -40 90 85 80 75 -20 0 20 40 60 80 100 120 70 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 14. Running Frequency vs. Temp. Figure 15. Preheating Frequency vs. Temp. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 8 www.fairchildsemi.com FAN7711 Ballast Control IC Typical Characteristics (Continued) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -40 -20 0 20 40 60 80 100 120 4.0 3.6 DTMAX [s] DTMIN [s] 3.2 2.8 2.4 2.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 16. Minimum Dead Time vs. Temp. Figure 17. Maximum Dead Time vs. Temp. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 9 www.fairchildsemi.com FAN7711 Ballast Control IC Typical Application Information 1. Under-Voltage Lockout (UVLO) Function The FAN7711 has UVLO circuits for both high-side and low-side circuits. When VDD reaches VDDTH(ST+), UVLO is released and the FAN7711 operates normally. At UVLO condition, FAN7711 consumes little current, noted IST. Once UVLO is released, FAN7711 operates normally until VDD goes below VDDTH(ST-), the UVLO hysteresis. At UVLO condition, all latches that determine the status of the IC are reset. When the IC is in the shutdown mode, the IC can restart by lowering VDD voltage below VDDTH(ST-). FAN7711 has a high-side gate driver circuit. The supply for the high-side driver is applied between VB and VS. To protect the malfunction of the driver at low supply voltage, between VB and VS, FAN7711 provides an additional UVLO circuit between the supply rails. If VBVS is under VHSTH(ST+), the driver holds low-state to turn off the high-side switch, as shown in Figure 18. As long as VB-VS is higher than VHSTH(ST-) after VB-VS exceeds VHSTH(ST+), operation of the driver continues. Before the lamp is ignited, the lamp impedance is very high. Once the lamp is turned on, the lamp impedance significantly decreases. Since the resonant peak is very high due to the high-resistance of the lamp at the instant of turning on the lamp, the lamp must be driven at higher frequency than the resonant frequency, shown as (A) in Figure 19. In this mode, the current supplied by the inverter mainly flows through CP. CP connects both filaments and makes the current path to ground. As a result, the current warms up the filament for easy ignition. The amount of the current can be adjusted by controlling the oscillation frequency or changing the capacitance of CP. The driving frequency, fPRE, is called preheating frequency and is derived by: fPRE = 1.6 x fOSC (EQ 1) 2. Oscillator The ballast circuit for a fluorescent lamp is based on the LCC resonant tank and a half-bridge inverter circuit, as shown in Figure 18. To accomplish Zero-Voltage Switching (ZVS) of the half-bridge inverter circuit, the LCC is driven at a higher frequency than its resonant frequency, which is determined by L, CS, CP, and RL, where RL is the equivalent lamp's impedance. After the warm-up, the FAN7711 decreases the frequency, shown as (B) of Figure 19. This action increases the voltage of the lamp and helps the fluorescent lamp ignite. The ignition frequency is described as a function of CPH voltage, as follows: fIG = 0.3 x ( 5-VCPH ) + 1 x fOSC (EQ 2) where VCPH is the voltage of CPH capacitor. Equation 2 is valid only when VCPH is between 3V to 5V before FAN7711 enters running mode. Once VCPH reaches 5V, the internal latch records the exit from ignition mode. Unless VDD is below VDDTH(ST-), the preheating and ignition modes appear only once during lamp start transition. Finally, the lamp is driven at a fixed frequency by an external resistor, RT, shown as (C) of Figure 19. If VDD is higher than VDDTH(ST+) and UVLO is released, the voltage of RT pin is regulated to 4V. This voltage adjusts the oscillator's control current according to the resistance of RT. Because this current and an internal capacitor set the oscillation frequency, the FAN7711 does not need any external capacitors. The proposed oscillation characteristic is given by: VDC FAN7711 VDD RT RT CPH CPH GND FAN7711 Rev. 1.00 Dead-time controller Low-side driver Oscillator High-side driver VB HO LCC resonant tank VS LO equivalent lamp impedance L CS RL Filament VDD CP Figure 18. Resonant Inverter Circuit Based on LCC Resonant Tank The transfer function of LCC resonant tank is heavily dependent on the lamp impedance, RL, as illustrated in Figure 19. The oscillator in FAN7711 generates effective driving frequencies to assist lamp ignition and improve lamp life longevity. Accordingly, the oscillation frequency is changed in the following sequence: Preheating freq.->Ignition freq.-> Normal running freq. fOSC = 4 x 10 9 RT (EQ 3) Even in the active ZVS mode, shown as (D) in Figure 19, the oscillation frequency is not changed. The dead-time is varied according to the resonant tank characteristic. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 10 www.fairchildsemi.com FAN7711 Ballast Control IC CPH voltage [V] 40dB (C) Active ZVS Mode CPH voltage varies by active ZVS control circuit 8 7 6 DTMAX RL=100k (B) Ignition Mode 5 4 DTMIN 3 2 1 0 Preheating Frequency:fPRE Preheating Mode Ignition Mode t0 FAN7711 Rev. 1.00 (A) Preheating Mode 20dB RL=10k Preheating frequency (B) (D) Shutdown mode 321 Dead Time[s] 0 time 0dB RL=1k Running frequency RL=500 (C) (A) Oscillation Frequency Running Frequency: fOSC Running Mode t1 t2 t3 time FAN7711 Rev. 1.00 (D) Dead-time control mode at fixed frequency Figure 20. Operation Modes 3.1 Preheating Mode (t0~t1) When VDD exceeds VDDTH(ST+), the FAN7711 starts operation. At this time, an internal current source (IPH) charges CPH. CPH voltage increases from 0V to 3V in preheating mode. Accordingly, the oscillation frequency follows the Equation 4. In this mode, the lamp is not ignited, but warmed up for easy ignition. The preheating time depends on the size of CPH: fpreheat = 3 x CPH IPH [Sec.] Figure 19. LCC Transfer Function in Terms of Lamp Impedance 3. Operation Modes FAN7711 has four operation modes: (A) preheating mode, (B) ignition mode, (C) active ZVS mode, and (D) shutdown mode, depicted in Figure 20. The modes are automatically selected by the voltage of CPH capacitor, shown in Figure 20. In modes (A) and (B), the CPH acts as a timer to determine the preheating and ignition times. After the preheating and ignition modes, the role of the CPH is changed to stabilize the active ZVS control circuit. In this mode, the dead time of the inverter is selected by the voltage of CPH. Only when FAN7711 is in active ZVS mode is it possible to shut off the whole system using CPH pin. Pulling the CPH pin below 2V in active ZVS mode, causes the FAN7711 to enter shutdown mode. In shutdown mode, all active operation is stopped, except UVLO and some bias circuitry. The shutdown mode is triggered by the external CPH control or the active ZVS circuit. The active ZVS circuit automatically detects lamp removal (open-lamp condition) and decreases CPH voltage below 2V to protect the inverter switches from damage. (EQ 4) According to preheating process, the voltage across the lamp to ignite is reduced and the lifetime of the lamp is increased. In this mode, the dead time is fixed at its maximum value. 3.2 Ignition Mode (t1~t2) When the CPH voltage exceeds 3V, the internal current source to charge CPH is increased about six times larger than IPH, noted as IIG, causing rapid increase in CPH voltage. The internal oscillator decreases the oscillation frequency from fPRE to fOSC as CPH voltage increases. As depicted in Figure 20, lowering the frequency increases the voltage across the lamp. Finally, the lamp ignites. Ignition mode is defined when CPH voltage lies between 3V and 5V. Once CPH voltage reaches 5V, the FAN7711 does not return to ignition mode, even if the CPH voltage is in that range, until the FAN7711 restarts from below VDDTH(ST-). Since the ignition mode continues when CPH is from 3V to 5V, the ignition time is given by: t ignition = 2 x CPH IIG [Sec.] (EQ 5) In this mode, dead time varies according to the CPH voltage. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 11 www.fairchildsemi.com FAN7711 Ballast Control IC 3.3 Running and Active Zero-Voltage Switching (AZVS) Modes (t2~) When CPH voltage exceeds 5V, the operating frequency is fixed to fOSC by RT. However, active ZVS operation is not activated until CPH reaches ~6V. The FAN7711 prepares for active ZVS operation from the instant CPH exceeds 5V during t2 to t3. When CPH becomes higher than ~6V at t3, the active ZVS operation is activated. To determine the switching condition, FAN7711 detects the transition time of the output (VS pin) of the inverter. From the output-transition information, FAN7711 controls the dead time to meet the ZVS condition. If ZVS is satisfied, the FAN7711 slightly increases the CPH voltage to reduce the dead time and to find optimal dead time, which increases the efficiency and decreases the thermal dissipation and EMI of the inverter switches. If ZVS fails, the FAN7711 decreases CPH voltage to increase the dead time. CPH voltage is adjusted to meet optimal ZVS operation. During the active ZVS mode, the amount of the charging/discharging current is the same as IPH. Figure 21 depicts normal operation waveforms. VDD VDDTH(ST+) VDDTH(ST-) 3.4 Shutdown Mode If the voltage of capacitor CPH is decreased below ~2.6V by an external application circuit or internal protection circuit, the IC enters shutdown mode. Once the IC enters shutdown mode, this status continues until an internal latch is reset by decreasing VDD below VDDTH(ST-). Figure 22 shows an example of external shutdown control circuit. 3 Shutdown Q1 CPH 4 CPH FAN7711 GND FAN7711 Rev. 1.00 Figure 22. External Shutdown Circuit The amount of the CPH charging current is the same as IPH, making it possible to shut off the IC using small signal transistor. FAN7711 provides active ZVS operation by controlling the dead time according to the voltage of CPH. If ZVS fails, even at the maximum dead time, FAN7711 stops driving the inverter. The FAN7711 thermal shutdown circuit senses the junction temperature of the IC. If the temperature exceeds ~160C, the thermal shutdown circuit stops operation of the FAN7711. The current usages of shutdown mode and undervoltage lockout status are different. In shutdown mode, some circuit blocks, such as bias circuits, are kept alive. Therefore, the current consumption is slightly higher than during under-voltage lockout. 4. Automatic Open-Lamp Detection CPH 6V 5V 3V 2V Lamp Voltage 0V Active ZVS activated time Dead time settling Ignition Running mode Active ZVS mode time time Preheating period (Filament warm-up) OUT 0V Zoom-in time Perfect ZVS t=1/fOSC Dead time FAN7711 Rev. 1.00 t=1/fOSC t=1/fOSC t=1/fOSC Figure 21. Typical Transient Waveform from Preheating to Active ZVS Mode FAN7711 can automatically detect the open-lamp condition. When the lamp is opened, the resonant tank fails to make a closed-loop to the ground, as shown in Figure 23. The supplied current from the VS pin is used to charge and discharge the charge pump capacitor, CP. Since the open-lamp condition means resonant tank absence, it is impossible to meet ZVS condition. In this condition, the power dissipation of the FAN7711, due to capacitive load drive, is estimated as: PDissipation = 1 x CP x VDC 2 x f 2 [W ] (EQ 6) where f is driving frequency and VDC is DC-link voltage. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 12 www.fairchildsemi.com FAN7711 Ballast Control IC 5. Power Supply DB FAN7711 VDD CVDD RT CPH CPH GND Dead-time controller Low-side driver VDC VB Oscillator High-side driver CB LCC resonant tank RT HO VS LO CCP Dp1 Dp2 equivalent lamp impedance L CS RL Filament Open CP When VDD is lower than VDDTH(ST+), it consumes very little current, IST, making it possible to supply current to the VDD pin using a resistor with high resistance (Rstart in Figure 25). Once UVLO is released, the current consumption is increased and whole circuits are operated, which requires additional power supply for stable operation. The supply must deliver at least several mA. A charge pump circuit is a cost-effective method to create an additional power supply and allows CP to be used to reduce the EMI. FAN7711 Rev. 1.00 Charge Pump DB Rstart VDC Figure 23. Current Flow When the Lamp is Open Assuming that CP, VDC, and f are 1nF, 311V, and 50kHz, respectively; the power dissipation reaches about 2.4W and the temperature of FAN7711 is increased rapidly. If no protection is provided, the IC can be damaged by the thermal attack. Note that hard-switching condition during the capacitive-load drive causes lots of EMI. Figure 24 illustrates the waveforms during the openlamp condition. In this condition, the charging and discharging current of CP is directly determined by FAN7711 and considered hard-switching condition. The FAN7711 tries to meet ZVS condition by decreasing CPH voltage to increase dead time. If ZVS fails and CPH goes below 2V, even though the dead time reaches its maximum value, FAN7711 shuts off the IC to protect against damage. To restart FAN7711, VDD must be below VDDTH(ST-) to reset an internal latch circuit, which remembers the status of the IC. Shutdown Release Restart VDD + CVDD CPH GND (1) FAN7711 Rev. 1.00 RT FAN7711 VB HO CB dv/dt (2) LCC resonant tank L CS Filament Open RL CP Shunt regulator VS LO Ccp Dp1 Dp2 equivalent lamp impedance Charge Pump Figure 25. Local Power Supply for VDD Using a Charge Pump Circuit As presented in Figure 25, when VS is high, the inductor current and CCP create an output transition with the slope of dv/dt. The rising edge of VS charges CCP. At that time, the current that flows through CCP is: I CCP x dv dt (EQ 7) VDD VDDTH(ST+) VDDTH(ST-) CPH 6V 5V 3V 2V Active ZVS activated Automatic Shutdown time This current flows along the path (1). It charges CVDD, which is a bypass capacitor to reduce the noise on the supply rail. If CVDD is charged over the threshold voltage of the internal shunt regulator, the shunt regulator is turned on and regulates VDD with the trigger voltage. When VS is changing from high to low state, CCP is discharged through Dp2, shown as path (2) in Figure 26. These charging/discharging operations are continued until FAN7711 is halted by shutdown operation. The charging current, I, must be large enough to supply the operating current of FAN7711. The supply for the high-side gate driver is provided by the boot-strap technique, as illustrated in Figure 26. When the low-side MOSFET connected between VS and GND pins is turned on, the charging current for VB flows through DB. Every low VS gives the chance to charge the CB. Therefore CB voltage builds up only when FAN7711 operates normally. time Running mode OUT Active ZVS mode 0V Preheating period (Filament warm-up) Shutdown Ignition period mode time FAN7711 Rev. 1.00 Figure 24. CPH Voltage Variation in Open-Lamp Condition (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 13 www.fairchildsemi.com FAN7711 Ballast Control IC When VS goes high, the diode DB is reverse-biased and CB supplies the current to the high-side driver. At this time, since CB discharges, VB-VS voltage decreases. If VB-VS goes below VHSTH(ST-), the high-side driver cannot operate due to the high-side UVLO protection circuit. CB must be chosen to be large enough not to fall into UVLO range due to the discharge during a half of the oscillation period, especially when the high-side MOSFET is turned on. DB Bootstrap circuit Rstart VDD + CVDD RT CPH GND Shunt regulator FAN7711 VB HO VDC CB LCC resonant tank L CS Filament Open RL CP Charging path VS LO CCP Dp1 Dp2 equivalent lamp impedance FAN7711 Rev. 1.00 Charge Pump Figure 26. Implementation of Floating Power Supply Using the Bootstrap Method (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 14 www.fairchildsemi.com FAN7711 Ballast Control IC Design Guide 1. Start-up Circuit The start-up current (IST) is supplied to the IC through the start-up resistor, Rstart. Once operation starts, the power is supplied by the charge pump circuit. To reduce the power dissipation in Rstart, select Rstart as high as possible, considering the current requirements at startup. For 220VAC power, the rectified voltage by the fullwave rectifier makes DC voltage, as shown in Equation 8. The voltage contains lots of AC component due to poor regulation characteristic of the simple full-wave rectifier: VDC = 2 x 220[V ] 311[V ] If Rstart meets Equation 14, restart operation is possible. However, it is not recommended to choose Rstart at that range because VDD rising time could be long and it increases the lamp's turn-on delay time, as depicted in Figure 27. VDD VCL VDDTH(ST+) VDDTH(ST-) tstart (EQ 8) 0 FAN7711 Rev. 1.00 Considering the selected parameters, Rstart must satisfy the following equation: VDC - VDDTH (ST + ) R start > IST time (EQ 9) Figure 27. VDD Build-up Figure 28 shows the equivalent circuit for estimating tstart. From the circuit analysis, VDD variation versus time is given by: VDD (t ) = (VDC - Rstart IST ) 1 - e -t /(Rstart CVDD ) From Equation 9, Rstart is selected as: VDC - VDDTH (ST + ) IST > R start (EQ 10) ( ) (EQ 15) Note that if choosing the maximum Rstart, it takes long time for VDD to reach VDDTH(st+). Considering VDD rising time, Rstart must be selected as shown in Figure 30. Another important concern for choosing Rstart is the available power rating of Rstart. To use a commercially available, low-cost 1/4 resistor, Rstart must obey the following rule: where CVDD is the total capacitance of the bypass capacitors connected between VDD and GND. From Equation 15, it is possible to calculate tstart by substituting VDD(t) with VDDTH(ST+): tstart = -Rstart CVDD ln VDC - Rstart IST - VDDTH (ST + ) VDD - Rstart IST (EQ 16) (VDC - VCL ) 2 R start < 1 [W ] 4 (EQ 11) In general, Equation 16 can be simplified as: tstart Rstart CVDD VDDTH (ST + ) VDC - Rstart IST - VDDTH (ST + ) Assuming VDC=311V and VCL=15V, the minimum resistance of Rstart is about 350k. When the IC operates in shutdown mode due to thermal protection, open-lamp protection, or hard-switching protection, the IC consumes shutdown current, ISD, which is larger than IST. To prevent restart during this mode, Rstart must be selected to cover ISD current consumption. The following equation must be satisfied: VDC - VDDTH (ST + ) ISD > R start (EQ 17) Accordingly, tstart can be controlled by adjusting the value of Rstart and CVDD. For example, if VDC=311V, Rstart=560k, CVDD=10F, Ist=120A, and VDDTH(ST+)= 13.5V, tstart is about 0.33s. Rstart IST VDD RT CVDD CPH GND FAN7711 Rev. 1.00 (EQ 12) From Equations 10 - 12; it is possible to select Rstart: (1) For safe start-up without restart in shutdown mode: 4 (VDC - VCL ) < Rstart < 2 VDC - VDDTH (ST + ) ISD VDC - VDDTH (ST + ) IST (EQ 13) (2) For safe start-up with restart from shutdown mode: VDC - VDDTH (ST + ) ISD < Rstart < (EQ 14) Figure 28. Equivalent Circuit During Start (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 15 www.fairchildsemi.com FAN7711 Ballast Control IC 2. Current Supplied by Charge Pump For the IC supply, the charge pump method is used in Figure 29. Since CCP is connected to the half-bridge output, the supplied current by CCP to the IC is determined by the output voltage of the half-bridge. When the half-bridge output shows rising slope, CCP is charged and the charging current is supplied to the IC. The current can be estimated as: I = CCP V dV CCP DC dt DT 3. Lamp Turn-on Time The turn-on time of the lamp is determined by supply build-up time tstart, preheating time, and ignition time; where tstart has been obtained by Equation 17. When the IC's supply voltage exceeds VDDTH(ST+) after turn-on or restart, the IC operates in preheating mode. This operation continues until CPH pin's voltage reaches ~3V. In this mode, CPH capacitor is charged by IPH current, as depicted in Figure 30. The preheating time is achieved by calculating: (EQ 18) where DT is the dead time and dV/dt is the voltage variation of the half-bridge output. When the half-bridge shows falling slope, CCP is discharged through Dp2. Total supplied current, Itotal, to the IC during switching period, t, is: Itotal = I DT = CCP VDC t preheat = 3 CPH IPH (EQ 21) The preheating time is related to lamp life (especially filament); therefore, the characteristics of a given lamp should be considered when choosing the time. VDD (EQ 19) From Equation 19, the average current, Iavg, supplied to the IC is obtained by: RT IPH CPH Iavg = Itotal CCP VDC = = CCP VDC f t t (EQ 20) CPH GND FAN7711 Rev. 1.00 For the stable operation, Iavg must be higher than the required current. If Iavg exceeds the required current, the residual current flows through the shunt regulator implemented on the chip, which can cause unwanted heat generation. Therefore, CCP must be selected considering stable operation and thermal generation. For example, if CCP=0.5nF, VDC=311V, and f=50kHz, Iavg is ~7.8mA; it is enough current for stable operation. Figure 30. Preheating Timer Compared to the preheating time, it is almost impossible to exactly predict the ignition time, whose definition is the time from the end of the preheating time to ignition. In general, the lamp ignites during the ignition mode. Therefore, assume that the maximum ignition time is the same as the duration of ignition mode, from 3V until CPH reaches 5V. Thus, ignition time can be defined as: tignition = (5 - 3 ) CPH CPH =2 IIG IIG Charging mode CCP Dp1 Idp1 Dp2 To VDD Discharging mode CCP Dp1 Idp1=0 Dp2 To VDD CVDD (EQ 22) CVDD f=1/t Note that, at ignition mode, CPH is charged by IIG, which is six times larger than IPH. Consequently, total turn-on time is approximately: VDD Build-Time + Preheating Time + Ignition Time = VDC DT:dead time Half-bridge output tignition = (5 - 3 ) CPH CPH [Sec.] =2 IIG IIG (EQ 23) Idp1 FAN7711 Rev. 1.00 Figure 29. Charge Pump Operation (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 16 www.fairchildsemi.com FAN7711 Ballast Control IC 4. PCB Guide line Component selection and placement on the PCB is very important when using power control ICs. Bypass the VCC to GND as close to the IC terminals as possible with a low-ESR/ESL capacitor, as shown in Figure 31. This bypassed capacitor (Cbp) can reduce the noise from the power supply parts, such as start-up resistor and charge pump. The signal GND must be separated from the power GND. So, the signal GND should be directly connected to the rectify capacitor using an individual PCB trace. HT O In addition, the ground return path of the timing components (CPH, RT) and VDD decoupling capacitor should be connected directly to the IC GND lead and not via separate traces or jumpers to other ground traces on the board. These connection techniques prevent highcurrent ground loops from interfering with sensitive timing component operations and allow the entire control circuit to reduce common-mode noise due to output switching. C bp R T C ph O point SG D ne N SG D N PG D N Figure 31. Preheating Timer (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 17 www.fairchildsemi.com FAN7711 Ballast Control IC Typical Application Diagram Rectified Waveform D5 L1 D6 VDC ZD 1 R1 D7 C6 R3 R10 D1 FUSE NTC D2 R4 R2 R11 1 2 INV VCC 8 R5 FAN7529 AC INPUT C3 TNR C1 C2 C4 C5 COMP OUT 7 6 5 R8 M1 C11 R13 3 R6 MOT GND 4 D3 D4 R7 C7 C8 C9 C10 CS ZCD R12 R9 Rectified Waveform D50 R50 R51 R52 D51 R54 L2 C55 Lamp 1 VDD VB C56 8 7 6 5 R57 R58 R55 FAN7711 2 RT 3 CPH R53 C51 C50 C52 HO VS LO M2 R56 C53 D52 C54 L3 C57 5 GND M3 Lamp C58 FAN7711 Rev. 1.00 Figure 32. Application Circuit of 32W Two Lamps (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 18 www.fairchildsemi.com FAN7711 Ballast Control IC Component List for 32W Two Lamps Part R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R50 R51 R52 R53 R54 R55 R56 R57 R58 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C50 C51 C52 C53 C54 Value Resistor 330k 750k 100 20k 47 10k 50k 47k 0.3 1M 1M 12.6k 220k 150k 150k 150k 90k 10 47 47k 47 47k Capacitor 47nF/275VAC 150nF/275VAC 2200pF/3kV 2200pF/3kV 0.22F/630V 12nF/50V 22F/50V 1F/50V 1F/50V 0.1F/50V 47F/450V 10F/50V 1F/50V 0.47F/25V 100nF/50V 470pF/1kV Note 1/2W 1/4W 1/2W 1/4W 1/4W 1/4W 1/4W 1/4W 1W 1/4W 1/4W 1/4W,1% 2W 1/4W 1/4W 1/4W 1/4W,1% 1/4W 1/4W 1/4W 1/4W 1/4W Part C55 C56 C57 C58 D1 D2 D3 D4 D5 D6 D7 D50 D51 D52 ZD1 M1 M2 M3 Fuse TNR Value 15nF/630V 2.2nF/1kV 15nF/630V 2.2nF/1kV Diode 1N4007 1N4007 1N4007 1N4007 UF4007 UF4007 1N4148 UF4007 UF4007 UF4007 IN4746A MOSFET FQPF5N60C FQPF5N50C FQPF5N50C Fuse 3A/250V TNR 471 NTC Note Miller Capacitor Miller Capacitor Miller Capacitor Miller Capacitor 1kV,1A 1kV,1A 1kV,1A 1kV,1A Ultra Fast,1kV,1A Ultra Fast,1kV,1A 100V,1A Ultra Fast,1kV,1A Ultra Fast,1kV,1A Ultra Fast,1kV,1A Zener 18V, 1W 500V,6A 500V,5A 500V,5A Box Capacitor Box Capacitor Ceramic Capacitor Ceramic Capacitor Miller Capacitor Ceramic Capacitor Electrolytic Capacitor Ceramic Capacitor Ceramic Capacitor Ceramic Capacitor Electrolytic Capacitor Electrolytic Capacitor Ceramic Capacitor Ceramic Capacitor,5% Ceramic Capacitor Ceramic Capacitor U1 U2 FAN7711 FAN7529 L2 L3 L1 LF1 NTC 10D-09 Line Filter 40mH Transformer 0.94mH(75T:10T) Inductor 3.2mH(130T) 3.2mH(130T) IC Fairchild Semiconductor Fairchild Semiconductor EI2820 EI2820 EI2820 (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 19 www.fairchildsemi.com FAN7711 Ballast Control IC Component List for 20W CFL Part R1 R2 R3 R4 R5 Value Resistor 560k 90k 10 47 47 Capacitor Note 1/4W 1/4W 1/4W 1/4W 1/4W Part D1 D2 D3 D4 D5 D6 D7 Value Diode 1N4007 1N4007 1N4007 1N4007 UF4007 UF4007 UF4007 Inductor 2.5mH (280T) MOSFET FQPF1N50C FQPF1N50C IC FAN7711 Note 1kV/1A 1kV/1A 1kV/1A 1kV/1A 1kV/1A,Ultra Fast 1kV/1A,Ultra Fast 1kV/1A,Ultra Fast EE1616S 500V,1A 500V,1A Fairchild Semiconductor C1 C2 C3 C4 C5 C6 C7 22F/250V 10F/50V 470nF/25V 100nF/25V 470pF/630V 33nF/630V 3.9nF/1kV Electrolytic Capacitor Electrolytic Capacitor Miller Capacitor Miller Capacitor Miller Capacitor Miller Capacitor Miller Capacitor U1 Q1 Q2 L1 Note: 3. Refer to the typical application circuit provided in Figure 1. (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 20 www.fairchildsemi.com FAN7711 Ballast Control IC Package Dimensions 8-SOP Dimensions are in millimeters unless otherwise noted. 1.55 0.20 0.061 0.008 MIN 0.1~0.25 0.004~0.001 0.56 ) 0.022 #1 #8 4.92 0.20 0.194 0.008 5.13 MAX 0.202 ( #4 #5 6.00 0.30 0.236 0.012 +0.10 0.15 -0.05 +0.004 0.006 -0.002 1.80 MAX 0.071 MAX0.10 MAX0.004 3.95 0.20 0.156 0.008 5.72 0.225 0.50 0.20 0.020 0.008 0~ 8 January 2001, Rev. A sop8_dim.pdf Figure 33. 8-Lead Small Outline Package (SOP) (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 21 1.27 0.050 0.41 0.10 0.016 0.004 www.fairchildsemi.com FAN7711 Ballast Control IC Package Dimensions 8-DIP Dimensions are in inches and [millimeters] unless otherwise noted. Figure 34. 8-Lead Dual In-Line Package (DIP) (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 22 www.fairchildsemi.com FAN7711 Ballast Control IC (c) 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 www.fairchildsemi.com 23 |
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