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 Preliminary
RT9205/A
Dual Regulators - Synchronous Buck PWM DC-DC and Linear Controller
General Description
The RT9205/A is a dual-output power controllers designed for high performance graphics cards and personal computers. The IC integrates a synchronous buck controller, a linear controller and protection functions into a small 14-pin package. The RT9205/A uses an internal compensated voltage mode PWM control for simplying design. An internal 0.8V reference allows the output voltage to be precisely regulated to meet low output voltage requirement. A fixed 300kHz oscillation frequency reduces the component size for saving board area. The RT9205/A also features over voltage protection (OVP) and under voltage lock-out (UVLO).
Features
Operates at 5V 0.8V Internal Reference Drives Two N-channel MOSFET Voltage Mode PWM Control Fast Transient Response Fixed 300kHz Oscillator Frequency Dynamic 0~100% Duty Cycle Internal PWM Loop Compensation Internal Soft-Start Adaptive Non-overlapping Gate Driver Over-voltage Protection Uses Lower MOSFET
Pin Configurations
Part Number RT9205/ACS (Plastic SOP-14) Pin Configurations TOP VIEW
LGATE 1 PGND 2 GND 3 VCC 4 DRV 5 FBL 6 NC 7
14 13 12 11 10 9 8
Applications
PC Motherboard Cable Modems, Set-Top-Box, and XDSL Modems DSP and Core Communications Processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V Input DC-DC Regulators Low Voltage Distributed Power Supplies Graphic Cards
UGATE BOOT NC NC NC FB NC
Ordering Information
RT9205/A Package Type S : SOP-14 Operating Temperature Range C : Commercial Standard UVP : Hiccup Mode UVP : Latch Mode
DS9205/A-03 May 2003
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1
2
5V 5V L1 1H Be Careful during La you t pha se C1 1F
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4 VCC 5 DRV UGATE
0.8V D1 1N5819 C3 0.1F
RT9205/A
Typical Application Circuit
5V
+ CE1
100 F
Q1 2SD180 2
BOOT 14 G1 S2 G2
R3 200 R4 200 C7 10n F VOUT1 = 0.8V*(1+R3/R4)
13 2 D1 D2 D2 5
pha se
1 S1 7 6
C2 1F
PHKD6N02LT
D1
8
+
R1 390
CE2 680 F L2 5H
VOUT1 1.6V
Preliminary
6 FBL LGATE 1 4 9
VOUT2 3.4V VOUT2 = 0.8*(1+R1/R2) R2 120
3
Fig.1 RT9205/A powered form 5V
RT9205/A FB
PGND GND 3 2 R2 < 1K
R4 < 1K C5 1F
C6 1F
+
CE5 470 F
C4 10n F
+
CE3 680 F LE SR
+
CE4 680 F LE SR
Pull FB tra ce out after C OUT
DS9205/A-03 May 2003
DS9205/A-03 May 2003
5V 12V 5V R5 2.2 R6 10 L1 1uH
Be Careful dur ing Layout
3.3V
+
CE 1 100uF 4 VCC 13 BOOT
C1 1uF C2 0.1uF
+
+
Q1 2SD5706 5 DRV UGATE 14
PHB66NQ03LT
C3 1uF
CE2 1000uF
CE3 L2 1000uF 5uH C5 1uF
CE5 1000uF LESR
VOU T1 1.7V
Suggest use Transistor
+
CE4
+
+
R1 0.8V 6 430 FB RT9205/A C4 10nF R3 200 R4 200 C7 10nF
VO UT 1 = 0.8V*(1+R3/R4)
Preliminary
V OUT2 = 0.8V*(1+R1/R2)
VOUT2 2.5V 9 GND 3
FBL
LGATE
1
PHB108NQ03LT
Phase
+
C6 1uF
CE7
CE5 CE4 1000uF LESR 1000uF LESR
Pull FB tr ace out after COUT
Fig.2 RT9205/A powered from 12V
PGND R2 200 R2<1K
470uF
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RT9205/A
3
RT9205/A
Preliminary
Layout Placement
MU
+C OUT 100 0F
D
L 5H
G
S
C1 1F + C2 470 F
C VCC 1 F
GND VCC BOOT
C BOOT 0.1F
ML D G S
GND Return
RT9205/A
Layout Notes 1. Put C1 & C2 to be near the MU drain and ML source nodes. 2. Put RT9205/A to be near the COUT 3. Put CBOOT as close as to BOOT pin 4. Put CVCC as close as to VCC pin
Function Block Diagram
VCC V CC DRV FBL _ 0.8V Reference 1V
UVP
6.0V Regulator Pow er on Reset
BOOT
LDO
++
_
Soft Start
+
0.5 V 0.8V Error Amp
+
GND
300kHz Oscillator
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4
_
_
FB
_ _ _
OVP
UGATE
+ + +
UVP
Control Logic
++ ++
SS
PWM
VCC LGATE
DS9205/A-03 May 2003
Preliminary Absolute Maximum Ratings
Supply Voltage VCC BOOT & UGATE to GND Input, Output or I/O Voltage Package Thermal Resistance SOP-14, JA Ambient Temperature Range Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec.)
RT9205/A
7V 19V GND-0.3V ~ 7V 160C/W 0C ~ +70C -40C ~ +125C -65C ~ +150C 260C
CAUTION: Stresses beyond the ratings specified in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Characteristics
(VCC = 5V, TA = 25C, Unless otherwise specified.) Parameter VCC Supply Current Nominal Supply Current VCC Regulated Voltage Power-On Reset Rising VCC Threshold VCC Threshold Hysteresis Reference Reference Voltage Oscillator Free Running Frequency Ramp Amplitude PWM Error Amplifier DC gain PWM Controller Gate Driver Upper Drive Source Upper Drive Sink Lower Drive Source Lower Drive Sink Linear Regulator DRV Driver Source Protection FB Over-Voltage Trip FB & FBL Under-Voltage Trip Soft-Start Interval FB Rising FB & FBL Falling 0.9 --1 0.5 2.5 -0.65 -V V mS VDRV = 2V 100 --mA RUGATE RUGATE RLGATE RLGATE BOOT= 12V BOOT-VUGATE = 1V VUGATE = 1V VCC - VLGATE = 1V, VLGATE = 1V ----7.5 5 3.5 2 11 8 6 5 32 35 38 dB VOSC 250 -300 1.75 350 -KHz VP-P VFB Both PWM and linear regulator 0.784 0.8 0.816 V 3.8 -4.1 0.5 4.4 -V V ICC ICC UGATE, LGATE open VBOOT = 12V -5 3 6 -7 mA V Symbol Test Conditions Min Typ Max Units
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RT9205/A
Functional Pin Description
Preliminary
LGATE (Pin 1) Connect the LGATE pin to the gate of lower MOSFET. This pin provides the gate drive for the lower MOSFET. PGND/GND (Pin 2, 3) Signal and power ground for the IC. All voltage levels are measured with respect to this pin. VCC (Pin 4) This is the main bias supply for the RT9205/A. This pin also provides the gate bias charge for the gate of lower MOSFET. The voltage at this pin is monitored for ensuring a proper power-on reset (POR). This pin is also the out of an internal 6.0V regulator that powered from the BOOT pin when the BOOT pin is directly powered from ATX 12V. DRV (Pin 5) This pin is the output of a linear controller. It should be connected to the base of an external bypass NPN transistor or the gate of a N-MOSFET to form a linear low dropout regulator. FBL (Pin 6) This pin is connected to the output resistor-divider of an external power transistor or a N-MOSFET based low dropout regulator for regulating and monitoring the output voltage. This pin is also connected to the protection monitor and the invertering input of error amplifier of internal linear regulator inside the IC. FB (Pin 9) This pin is connected to the PWM converter's output - divider for regulating and monitoring the output voltage of buck converter. This pin also connects to the protection monitor and the inverting input of internal PWM error amplifier inside the IC. BOOT (Pin 13) This pin provides ground referenced bias voltage to the upper MOSFET driver. A bootstrap circuit is used to create a voltage that is suitable for driving a logic-level N-channel MOSFET when operating at a single 5V power supply. This pin also could be powered from ATX 12V, in this situation, an internal 6.0V regulator will supply to VCC pin for generating bias required inside the IC.
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UGATE (Pin 14) Connect the UGATE pin to the gate of upper MOSFET. This pin provides the gate drive for the upper MOSFET.
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Preliminary Typical Operating Charateristics
Dead Time
VCC = 5V UGATE
RT9205/A
Dead Time
VCC = 5V
UGATE
LGATE
LGATE
Time
Time
Power On
VCC = 5V VOUT1 = 2.5V VOUT2 = 1.8V VCC VCC
Power Off
VCC = 5V VOUT1 = 2.5V VOUT2 = 1.8V
VOUT1 VOUT2
VOUT1 VOUT2
Time
Time
Load Transient
UGATE
Load Transient
UGATE VCC = 5V VOUT = 2.2V COUT = 3000F VOUT
VOUT VCC = 5V VOUT = 2.2V COUT = 3000F
Time
Time
DS9205/A-03 May 2003
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7
RT9205/A
Short Hiccup (Latch Mode)
VCC = 5V VOUT = 2.2V
Preliminary
Short Hiccup
VCC = 5V VOUT = 2.2V VOUT
VOUT
UGATE UGATE
RT9205 Time (2ms/Div) Time (2ms/Div)
RT9205A
Bootstrap Wave Form
VCC = 5V; VOUT = 2.2V
Reference vs. Temperature
0.803 0.802 0.801
UGATE
Reference (V)
0.800 0.799 0.798 0.797 0.796
LGATE
PHASE
Time
-50
0
Temperature ( C)
50
100
150
IOCSET vs. Temperature
55 50 45
4.3 4.2 4.1
POR (Rising/Falling) vs. Temperature
Rising
IOCSET ( A)
POR (V)
40 35 30 25 20 -40 -10 20 50 80 110 140
4.0 3.9 3.8
Falling
3.7 3.6 -50 0 50 100 150
Temperature ( C)
Temperature ( C)
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DS9205/A-03 May 2003
8
Preliminary
RT9205/A
Oscillator Frequency vs. Temperature
315 310 305
Frequency (kHz)
300 295 290 285 280 275 270 -50 0 50 100 150
Temperature ( C)
DS9205/A-03 May 2003
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9
RT9205/A
Functional Description
Preliminary
R C 1uF UGATE 10
The RT9205/A operates at either single 5V power supply with a bootstrap UGATE driver or a 5V/12V dual-power supply form the ATX SMPS. The dualpower supply is recommended for high current applications, the RT9205/A can deliver higher gate driving current while operating with ATX SMPS based on a dual-power supply. The Bootstrap Operation In a single power supply system, the UGATE driver of RT9205/A is powered by an external bootstrap circuit, as shown in the Fig.3. The boot capacitor, CBOOT, generates a floating reference at the PHASE pin. Typically a 0.1F CBOOT is enough for most of MOSFETs used with the RT9205/A. The voltage drop between BOOT and PHASE is refreshed to a voltage of VCC - diode drop (VD) while the lower MOSFET turning on.
R1
VCC
6.0V Regulation
BOOT
12V 5V
+
VCC LGATE
C2 1uF RT9205/A
Fig.4 Dual Power Supply Operation Power On Reset The Power-On Reset (POR) monitors the supply voltage (normal +5V) at the VCC pin and the input voltage at the OCSET pin. The VCC POR level is set to 4.1V with 0.5V hysteresis and the normal level at OCSET pin is set to 1.5V (see over-current protection). The POR function initiates soft-start operation after all supply voltages exceed their POR thresholds. Soft Start A built-in soft-start is used to prevent surge current from power supply input during powering on. The soft-start voltage is controlled by an internal digital counter. It slows down and clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver. The typical softstart duration is 2.5mS. Under Voltage and Over Voltage Protection The voltage presents at FB pin is monitored and protected against OC (over current), UV (under voltage), and OV (over voltage). The UV threshold is 0.56V and OV-threshold is 1.0V. Both UV and OV detection are with 30S delay after triggered. When OC or UV trigged, a hiccup re-start sequence will be initialized, as shown in Fig.5. For RT9205, only 3 times of trigger are allowed before latching off. But for RT9205A, UVP will be kept in hiccup mode. Hiccup is disabled during soft-start interval.
C2 1F
VCC
BOOT UGATE PHASE
D1 0.1F +
5V
VCC LGATE
RT9205/A
Fig.3 Single 5V power Supply Operation Dual Power Operation The RT9205/A was designed to supply a regulated 6.0V at VCC pin automatically when BOOT pin is powered by a 12V. In a system with ATX 5V/12V power supply, the RT9205/A is ideal for higher current applications due to the higher gate driving capability, VUGATE = 12V and VLGATE = 6.0V. A RC (10/1F) filter is also recommended at BOOT pin to prevent the ringing induced from fast power-on, as shown in Fig.4.
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DS9205/A-03 May 2003
10
Preliminary
COUNT = 1 COUNT = 2 Internal SS 4V 2V 0V OVERLOAD APPLIED
VI D
RT9205/A
Q L VL C R VO
COUNT = 3
INDUCTOR CURRENT
0A T0T1 T2 TIME T3
C.C.M.
TS
Fig. 5
TON VI
TOFF
- VO - VO
Applications Information
Inductor Selection The RT9205/A was designed for VIN = 5V, step-down application mainly. Fig.6 shows the typical topology and waveforms of step-down converter. The ripple current of inductor can be calculated as follows: ILRIPPLE = (5V - VOUT)/L x TON Because operation frequency is fixed at 300kHz, TON = 3.33 x VOUT/5V The VOUT ripple is VOUT RIPPLE = ILRIPPLE x ESR ESR is the equivalent series resistor of output capacitor Table 1 shows the ripple voltage of VOUT at VIN = 5V Table 1
VL
iL IL
Q IL = IO
iQ IQ
iD ID
Fig. 6
VOUT Inductor 1000F (ESR=53m) 1500F (ESR=33m) 3000F (ESR=21m) 2H
3.3V 5H 40mV 25mV 16mV 2H 100mV 62mV 40mV
2.5V 5H 44mV 28mV 18mV 2H 93mV 58mV 37mV 110mV 68mV 43mV
1.5V 5H 37mV 23mV 15mV
*Refer to Sanyo low ESR series (CE, DX, PX...) The suggested L and C are as follows: 2H with 1500F COUT 5H with 1000F COUT
DS9205/A-03 May 2003
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11
RT9205/A
Preliminary
Input / Output Capacitor High frequency/long life decoupling capacitors should be placed as close to the power pins of the load as physically possible. Be careful not to add inductance to the PCB trace, as it could eliminate the performance from utilizing these low inductance components. Consult with the manufacturer of the load on specific decoupling requirements. The output capacitors are necessary for filtering output and stabilizing the close loop (see the PWM loop stability). For powering advanced high-speed processors, it is required to meet fast load transient requirement. Also high ESR usually induces ripple that may trigger UV or OV protections. So High frequency capacitors with low ESR/ESL capacitors are recommended here. Linear Regulator Driver The linear controller of RT9205/A was designed to drive an external bipolar NPN transistor or a Nchannel MOSFET. For a N-channel MOSFET, normally DRV need to provide minimum VOUT2+VT+gate-drive voltage to keep VOUT2 as the set voltage. When driving MOSFET operating at a 5V power supply, the gate-drive will be limited at 5V. At this situation, as shown in Fig.7, a MOSFET with low VT threshold (VT = 1V) and set Vout2 below 2.5V are suggested. In VBOOT = 12V operation condition, as Fig.8 shown, VCC is regulated higher than 6V, which providing higher gate-drive capability for driving the MOSFET, VOUT2 can be set as VOUT2 3.3V.
Max. 6V
Suggest Low VT MOSFET VO UT2 3.3V
VBO OT = 12V 6V
DRV BOOT FBL VCC RT9205/A R4 R4 < 1K R3 +
Fig. 8 PWM Loop Stability The RT9205/A is a voltage mode buck controller designed for 5V step-down applications. The gain of error amplifier is fixed at 35dB for simplifying design. The output amplitude of ramp oscillator is 1.6V, the loop gain and loop pole/zero are calculated as follows: DC loop gain GA = 35dB x LC filter pole PO = ESR zero ZO =
1 2 LC
0.8 5 x VOUT 1.75
Error Amp pole PA = 300kHz
1 2 ESR x C
The RT9205/A Bode plot is as shown in Fig.9. It is stable in most of application conditions.
VOUT = 3.3V COUT = 1500F(33m) L=2H 40 VOUT = 1.5V VOUT = 2.5V VOUT = 3.3V PO = 2.9kHz ZO = 3.2kHz
Max. 5V
Suggest Low VT MOSFET VO UT2 2.5V
30
DRV BOOT FBL VCC = 5V VCC RT9205/A R4 R4 < 1K
100 1k 10k 100k 1M
R3
+
20 Loop Gain
10
Fig. 9 Fig. 7
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DS9205/A-03 May 2003
12
Preliminary
Reference Voltage Because RT9205/A uses a low 35dB gain error amplifier, as shown in Fig.10. The voltage regulation is dependent on VIN and VOUT settings. The FB reference voltage of 0.8V were trimmed at VIN = 5V and VOUT = 2.5V. In a fixed VIN = 5V application, the FB reference voltage vs. VOUT voltage can be calculated as Fig.11.
I3 56K 1K REP 0.8V _ FB I2 EA +
PWM
RT9205/A
VIN L VO UT + COUT R1
R1 VOUT = VFB x (1+ ) R2
C1 RT9205/A FB R2 < 1K
Fig. 12 PWM Layout Considerations MOSFETs switch very fast in efficiency. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency and radiate noise, that results in over-voltage stress on devices. Careful the layout for component placement layout and printed circuit design can minimize the voltage spikes induced in the converter. Consider, as an example, the turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the lower MOSFET or Schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Care with component selections, layout of the critical components, and use shorter and wider PCB traces that help in minimizing the magnitude of voltage spikes. There are two sets of critical components in a DC-DC converter using the RT9205/A. The switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the
_
+ _
Fig. 10
+
RAMP 1.75V
0.82 0.81 FB (V) 0.80 0.79 0.78 10 VIN = 5V
Duty - 50 VFB = 0.8V - x 6.25mV 100
20 30 40 50 Duty (%) 60 70 80 90
Fig. 11 Feedback Divider The reference of RT9205/A is 0.8V. The output voltage can be set using a resistor-divider as shown in Fig.12. Put the R1 and R2 as close as possible to FB pin. R2 value should be less than 1 k to avoid noise coupling issue. The C1 capacitor is a speed-up capacitor for reducing output ripple to meet with the requirement of fast transient load. Typically, value between 1nF and 0.1F is enough for C1.
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13
RT9205/A
Preliminary
MOSFETs and the load. Also locate the PWM controller near by MOSFETs. A multi-layer printed circuit board is recommended. Fig.13 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT represent numerous physical capacitors. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node, but it is not necessary to oversize this particular island. Since the PHASE node is subjected to very high dV/dt voltages, the stray capacitance formed between these islands and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal routing. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents.
IQ1 5V + Q1 IQ2 Q2 GND + IL VO UT +
LOAD
LGATE VCC GND RT9205/A UGATE FB
Fig. 13
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DS9205/A-03 May 2003
14
Preliminary Package Information
RT9205/A
A
H M
J
B
F
C I D
Symbol A B C D F H I J M
Dimensions In Millimeters Min 8.534 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 Max 8.738 3.988 1.753 0.508 1.346 0.254 0.254 6.198 1.270
Dimensions In Inches Min 0.336 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 Max 0.344 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050
14-Lead SOP Plastic Package
DS9205/A-03 May 2003
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15
RT9205/A
Preliminary
RICHTEK TECHNOLOGY CORP.
Headquarter
5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
RICHTEK TECHNOLOGY CORP.
Taipei Office (Marketing)
8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
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DS9205/A-03 May 2003
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