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BQ2406X
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SLUS689 - JUNE 2006
1A SINGLE-CHIP Li-Ion/Li-Pol CHARGE MANAGEMENT IC WITH THERMAL REGULATION
FEATURES
* * Thermal Regulation Maximizes Charge Rate Ideal for Low-Dropout Designs for Single-Cell Li-Ion or Li-Pol Packs in Space Limited Applications Integrated Power FET and Current Sensor for up to 1-A Charge Applications Reverse Leakage Protection Prevents Battery Drainage 0.5% Voltage Regulation Accuracy Charge Termination by Minimum Current and Time Precharge Conditioning With Safety Timer Status Outputs for LED or System Interface Indicate Charge, Fault, and Power Good Outputs Short-Circuit and Thermal Protection Automatic Sleep Mode for Low Power Consumption Small 3x3 mm MLP Package Selectable Battery Insertion and Battery Absent Detection Input Over-Voltage Protection
DESCRIPTION
The BQ2406X series are highly integrated Li-Ion and Li-Pol linear chargers, targeted at space-limited portable applications. The BQ2406X series offers a variety of safety features and functional options, while still implementing a complete charging system in a small package. The battery is charged in three phases: conditioning, constant or thermally regulated current, and constant voltage. Charge is terminated based on minimum current. An internal programmable charge timer provides a backup safety feature for charge termination and is dynamically adjusted during the thermal regulation phase. The BQ2406X automatically re-starts the charge if the battery voltage falls below an internal threshold; sleep mode is set when the external input supply is removed. Multiple versions of this device family enable easy design of the BQ2406X in cradle chargers or in the end equipment, while using low cost or high-end AC adapters.
* * * * * *
* * * * * * *
PINOUT (TOP VIEW)
bq24061/66 IN TMR STAT1 STAT2 VSS
1 2 3 4 5 10 9 8 7 6
OUT BAT CE PG ISET
APPLICATIONS
PDA, MP3 Players, Digital Cameras Internet Appliances and Handheld Devices
TYPICAL APPLICATION CIRCUIT
bq24061/66 Input Power 1 RTMR 2 4.7 mF 1.5 kW 1.5 kW 49.9 kW 3 STAT1 4 STAT2 5V SS CE PG ISET IN TMR OUT BAT 10 9 8 7 6 0.47 mF RSET 1.13 kW Charge Enable and Input Power Status RBAT 200 4.7 mF Li-lon or Li-Pol Battery Pack Pack+ + Pack-
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2006, Texas Instruments Incorporated
BQ2406X
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SLUS689 - JUNE 2006
AVAILABLE OPTIONS
Charge Input Over Voltage Voltage 4.2 V 4.2 V 4.2 V 4.2 V (1) (2) 6.5 V 6.5 V 6.5 V 10.5 V Termination Enable TMR pin TMR pin TE pin TMR pin Safety Timer Enable TMR pin TMR pin TMR pin TMR pin Power Good Status PG pin PG pin No PG pin IC Enable No CE pin CE pin No Pack Temp TS pin No No TS pin Pack Voltage Detection (Absent) With timer enabled With timer enabled With termination enabled With timer enabled Devices (1) (2) Marking
bq24060 bq24061 bq24063 bq24064
BPG BPH Preview BSA
The BQ2406X are only available taped and reeled. Add suffix R to the part number for quantities of 3,000 devices per reel (e.g., bq24060BPGR). Add suffix T to the part number for quantities of 250 devices per reel (e.g., bq24060DRCT). This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
ABSOLUTE MAXIMUM RATINGS (1)
BQ2406X Supply voltage (IN with respect to Vss) Input voltage on IN, STATx, PG, TS, CE, TE, TMR (all with respect to Vss) Input voltage on OUT, BAT, ISET (all with respect to Vss) Output sink current (STATx) + PG Output current (OUT pins) TA Tstg TJ Operating free-air temperature range Storage temperature range Junction temperature range Lead temperature (Soldering, 10 sec) (1) (2) -0.3 V to 18 V (2) -0.3 V to V(IN) -0.3 V to 7 V 15 mA 1.5 A -40C to 125C -65C to 150C -40C to 150C 300C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability The BQ2406X device can withstand up to 26 V for a maximum of 87 hours.
RECOMMENDED OPERATING CONDITIONS
MIN V(IN) V(IN) TJ Supply voltage range Supply voltage range Junction temperature Battery absent detection not functional Battery absent detection functional 3.5 4.35 0 TYP MAX 16.5 16.5 125 UNIT V V C
DISSIPATION RATINGS (1)
PACKAGE 10-pin DRC (1) JC (C/W) 3.21 JA (C/W) 46.87
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. This is connected to the ground plane by a 2x3 via matrix.
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ELECTRICAL CHARACTERISTICS
over recommended operating, TJ : 0 -125C range, See the Application Circuits section, typical values at TJ: 25C (unless otherwise noted)
PARAMETER POWER-ON-RESET V(PDWN) Power down threshold V(IN) = 0 V, increase V(OUT): 0 3 V OR V(OUT) = 0 V, increase V(IN): 0 3 V, CE = LO (1) V(IN) detected at [V(IN) - V(OUT)] > VIN(DT) Input power not detected at [V(IN)- V(OUT)] < [VIN(DT)- VHYS(INDT)] PG:HI LO, Thermal regulation loop not active, RTMR = 50 K or V(TMR) = OPEN 30 1.5 3.5 10 28 32 1.5 3.0 V TEST CONDITIONS MIN TYP MAX UNIT
INPUT POWER DETECTION, CE = HI or LOW, V(IN) > 3.5 V VIN(DT) VHYS(INDT) TDGL(INDT1) TDGL(NOIN) TDLY(CHGOFF) Input power detection threshold Input power detection hysteresis Deglitch time, input power detected status 130 mV mV ms s ms
Delay time, input power not detected PG: LO HI after TDGL(NOIN) status Charger off delay Charger turned off after TDLY(CHGOFF), Measured from PG: LO HI; Timer reset after TDLY(CHGOFF) bq24060/61/63/65/66 bq24064 bq24060/61/63/65/66 bq24064
INPUT OVER-VOLTAGE PROTECTION V(OVP) VHYS(OVP) TDGL(OVDET) TDGL(OVNDET) Input over-voltage detection threshold Input over-voltage hysteresis Input over-voltage detection delay Input over-voltage not detected delay V(IN) increasing V(IN) decreasing 6.2 10.2 0.1 0.3 10 10 6.5 10.5 7.0 11.7 0.2 0.5 100 100 V V s s
CE = HI or LO, Measured from V(IN) > V(OVP) to PG: LO HI; VIN increasing CE = HI or LO, Measured from V(IN) < V(OVP) to PG: HI LO; V(IN) decreasing V(IN) = 6 V V(IN) = 16.5 V
QUIESCENT CURRENT ICC(CHGOFF) ICC(CHGON) IBAT(DONE) IBAT(CHGOFF) IN pin quiescent current, charger off IN pin quiescent current, charger on Battery leakage current after termination into IC Battery leakage current into IC, charger off Lower voltage temperature threshold Upper voltage temperature threshold Hysteresis Input power detected, CE = HI 100 300 4 1 1 6 5 5 200 A mA A A
Input power detected, CE = LO, VBAT = 4.5 V Input power detected, charge terminated, CE = LO Input power detected, CE = HI OR input power not detected, CE = LO
TS PIN COMPARATOR V(TS1) V(TS2) VHYS(TS) CE INPUT VIL VIH VOL T(SHUT) T(SHUTHYS) (1) Input (low) voltage Input (high) voltage Output (low) saturation voltage Temperature trip Thermal hysteresis V(CE) increasing V(CE) decreasing Ioutput = 5 mA (sink) Junction temperature Junction temperature 155 20 0 2.0 0.5 1 V V V C C Hot detected at V(TS) < V(TS1); NTC thermistor Cold detected at V(TS) > V(TS2); NTC thermistor Temp OK at V(TS) > [ V(TS1) + VHYS(TS) ] OR V(TS) < [ V(TS2)- VHYS(TS) ] 29 60 30 61 2 31 %V(IN) 62 %V(IN) %V(IN)
STAT1, STAT2 AND PG OUTPUTS , V(IN) VO(REG) + V(DO-MAX) THERMAL SHUTDOWN
Specified by design, not production tested.
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ELECTRICAL CHARACTERISTICS (Continued)
over recommended operating, TJ : 0-125C range, See the Application Circuits section, typical values at TJ : 25C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOLTAGE REGULATION, V(IN) VO(REG) + V(DO-MAX), I(TERM) < I(OUT) < IO(OUT), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED VO(REG) VO(TOL) V(DO) Output voltage Voltage regulation accuracy Dropout voltage, V(IN) - V(OUT) bq24060/61/62/63/64 bq24065/66 versions only TA = 25C I(OUT) = 1 A V(BAT) > V(LOWV), IO(OUT) = I(OUT) = K(SET)x V(SET)/RSET V(ISET) = V(SET), V(LOWV) < V(BAT) VO(REG) 100 mA IO(OUT) 1000 mA 10 mA IO(OUT) < 100 mA Resistor connected to ISET pin -0.5% -1% 4.20 4.36 0.5% 1% 750 mV V
CURRENT REGULATION , V(IN) > V(OUT) > V(DO-MAX), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED IO(OUT) V(SET) K(SET) RISET Output current range Output current set voltage Output current set factor External resistor range 100 2.45 315 315 0.7 2.50 335 372 1000 2.55 355 430 10 k mA V
mA kW Volts
VOLTAGE AND CURRENT REGULATION TIMING, V(IN) > V(OUT) + V(DO-MAX), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, RTMR = 50K or V(TMR) = OPEN; Thermal regulation loop not active TPWRUP(CHG) TPWRUP(EN) Input power detection to full charge current time delay Charge enable to full charge current delay Input power detection to voltage regulation delay, LDO mode set, no battery or load connected Measured from PG:HI LO to I(OUT) > 100 mA, CE = LO, IO(OUT) = 1 A, V(BAT) = 3.5 V Measured from CE:HI LO to I(OUT) >100 mA, IO(OUT) = 1A, V(BAT)= 3.5 V, V(IN) = 4.5 V, Input power detected Measured from PG:HI LO to V(OUT) > 90% of charge voltage regulation; V(TMR) = OPEN, LDO mode set, no battery and no load at OUT pin, CE = LO 25 25 35 35 ms ms
TPWRUP(LDO)
25
35
ms
PRECHARGE AND OUTPUT SHORT-CIRCUIT CURRENT REGULATION, V(IN)-V(OUT) > V(DO-MAX) , V(IN) 4.5V, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, RTMR = 50K or V(TMR)=OPEN; Thermal regulation loop not active V(LOWV) V(SCIND) V(SC) IO(PRECHG) V(PRECHG) Precharge to fast-charge transition V(BAT) increasing threshold Short-circuit indication Precharge to short-circuit transition threshold Precharge current range Precharge set voltage V(BAT) decreasing V(BAT) decreasing V(SC) < VI(BAT) < V(LOWV), t < T(PRECHG) IO(PRECHG) = K(SET)x V(PRECHG)/R(ISET) V(ISET) = V(PRECHG), V(SC) < VI(BAT) < V(LOWV), t < T(PRECHG) VPOR < VIN < 6.0 IO(SHORT) = I(OUT), V(BAT)= VSS V 6.0 V < VIN V(IN) = 5.5 V, V(BAT) = 3.2 V, Fast charge current set to 1A V(LOWV) < V(BAT) < VO(REG), 0.7k < RISET < 3.5k 2.8 1.2 1.6 10 225 15 250 22 25 2.95 1.4 1.8 3.15 1.6 2.0 100 280 30 V V
mA mV
IO(SHORT)
Output shorted regulation current
mA
TEMPERATURE REGULATION (Thermal regulationTM), CHARGER ENABLED, NO FAULT CONDITIONS DETECTED TJ(REG) I(MIN_TJ(REG)) Temperature regulation limit Minimum current in thermal regulation 101 112 200 125 250 C mA
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ELECTRICAL CHARACTERISTICS (Continued)
over recommended operating, TJ : 0-125C range, See the Application Circuits section, typical values at TJ : 25C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CHARGE TERMINATION DETECTION, VO(REG) = 4.2 V or VO(REG) = 4.36 V, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, Thermal regulation LOOP NOT ACTIVE, RTMR = 50K or TMR pin OPEN I(TERM) V(TERM) TDGL(TERM) Termination detection current range Charge termination detection set voltage Deglitch time, termination detected Recharge threshold detection Deglitch time, recharge detection Charge safety timer range Charge safety timer constant Pre-charge safety timer range Pre-charge safety timer constant Charge timer and termination enable threshold Charge timer enable threshold ITMR(OFF) TMR pin pull-up current V(BAT) > V(RCH), t < TTDGL(TERM), I(TERM) = K(SET)x V(TERM)/RISET V(BAT) > V(RCH) V(ISET) decreasing 10 225 15 250 25 100 275 35 mA mV ms
BATTERY RECHARGE THRESHOLD V(RCH) TDGL(RCH) [VO(REG)-V(BAT) ] > V(RCH) V(BAT) decreasing T(CHG) = K(CHG)x RTMR ; thermal loop not active V(BAT) > V(LOWV) T(PCHG) = K(PCHG)x T(CHG)x K(CHG); Thermal regulation loop not active V(BAT) < V(LOWV) [Charge timer AND bq24060/61/62/64/ termination disabled] at V(TMR) 65/66 > VTMR(OFF) [Charge timer disabled] at V(TMR) > VTMR(OFF) bq24063 1 6 A 75 15 100 25 135 35 mV ms
TIMERS, CE = LO, CHARGER ENABLED, NO FAULT CONDITIONS DETECTED, V(TMR) < 3 V, TIMERS ENABLED T(CHG) K(CHG) T(PCHG) K(PCHG) 3 0.08 1080 0.08 0.1 0.1 10 0.12 3600 0.12 hours hr/k sec
VTMR(OFF)
2.5
3.0
3.5
V
ITMR(OFF) = I(TMR), V(TMR) = 3.5 V, V(IN) = 4.5 V, safety timer off, all other timers set to zero. 2 V < V(BAT) < VO(REG) 2 V < V(BAT) < VO(REG) 2 V < V(BAT) < VO(REG), Thermal regulation loop not active; RTMR = 50 k V(OUT) < V(RCH)
BATTERY DETECTION THRESHOLDS IDET(DOWN) IDET(UP) T(DETECT) Battery detection current (sink) Battery detection current (source) Battery detection time 1 2 IO(PRECHG) 85 120 150 3.2 mA mA ms
TIMER FAULT RECOVERY I(FAULT) Fault Current (source) Charge over-current detection threshold Over current detection delay time -12 -10 -8 mA CHARGE OVER-CURRENT DETECTION, V(IN) 4.5 V, CHARGER ENABLED ICH(OVC) TDGL(CHOVC) V(ISET) = VSS Measured from V(ISET) = VSS to IO(OUT) = 0 2 100 A s
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DEVICE INFORMATION PIN ASSIGNMENT
VSS 5 STAT 2 4 STAT 1 3 TMR 2 IN 1 VSS 5 STAT 2 4 STAT 1 3 TMR 2 IN 1 VSS 5 STAT 2 4 STAT 1 3 TMR 2 IN 1 VSS 5 STAT 2 4 STAT 1 3 TMR 2 IN 1
bq24060/64/65 DRC (TOP VIEW)
bq24061/66 DRC (TOP VIEW)
bq24062 DRC (TOP VIEW)
bq24063 DRC (TOP VIEW)
6 ISET
7 PG
8 TS
9 BAT
10 OUT
6 ISET
7 PG
8 CE
9 BAT
10 OUT
6 ISET
7 CE
8 TS
9 BAT
10 OUT
6 ISET
7 CE
8 TE
9 BAT
10 OUT
TERMINAL FUNCTIONS, REQUIRED COMPONENTS
TERMINAL NO. NAME IN TMR STAT1 STAT2 VSS ISET PG CE TE bq24060/64/65 1 2 3 4 5 6 7 -- -- bq24061/66 1 2 3 4 5 6 7 8 -- bq24062 1 2 3 4 5 6 -- 7 -- bq24063 1 2 3 4 5 6 -- 7 8 I/O I I O O I O O I I DESCRIPTION AND REQUIRED COMPONENTS Charge Input Voltage and internal supply. Connect a 1- F (minimum) capacitor from IN to VSS. Safety Timer Program Input, timer disabled if floating. Connect a resistor to VSS pin to program safety timer timeout value Charge Status Output 1 (open-collector, seeTable 3) Charge Status Output 2 (open-collector, see Table 3) Ground Charge current set point, resistor connected from ISET to VSS sets charge current value. Connect a 0.47-F capaciator from BAT to ISET. Power Good status output (open-collector), active low Charge enable Input. CE = LO enables charger. CE = HI disables charger. Termination enable Input. TE = LO enables termination detection and battery absent detection. TE = HI disables termination detection and battery absent detection. Temperature Sense Input, connect to battery pack thermistor. Connect an external resistive divider to program temperature thresholds. Battery Voltage Sense Input. Connect to the battery positive terminal. Connect a 200- resistor from BAT to OUT. Charge current output. Connect to the battery positive terminal. Connect a 1- F (minimum) capacitor from OUT to VSS. There is an internal electrical connection between the exposed thermal pad and Vss pin of the IC. The exposed thermal pad must be connected to the same potential as the Vss pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the IC. Vss pin must be connected to ground at all times.
TS BAT OUT
8 9 10
-- 9 10
8 9 10
-- 9 10
I I O
Exposed Thermal Pad
Pad
Pad
Pad
Pad
FUNCTIONAL DESCRIPTION
The charge current is programmable using external components (RISET resistor). The charge process starts when an external input power is connected to the system, the charger is enabled by CE = LO and the battery voltage is below the recharge threshold, V(BAT) < V(RCH). When the charge cycle starts a safety timer is activated, if the safety timer function is enabled. The safety timer timeout value is set by an external resistor connected to TMR pin.
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When the charger is enabled two control loops modulate the battery switch drain to source impedance to limit the BAT pin current to the programmed charge current value (charge current loop) or to regulate the BAT pin voltage to the programmed charge voltage value (charge voltage loop). If V(BAT) < V(LOWV) (3.0 V typical) the BAT pin current is internally set to 10% of the programmed charge current value. A typical charge profile is shown below, for an operation condition that does not cause the IC junction temperature to exceed TJ(REG), (112C typical).
PreConditioning Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase DONE
VO(BATREG) IO(BAT) FAST-CHARGE CURRENT
Battery Current, I(BAT) Battery Voltage, V(BAT) Charge Complete Status, Charger Off
v(LOWV)
IO(PRECHG), I(TERM)
PRE-CHARGE CURRENT AND TERMINATION THRESHOLD T(PRECHG) T(CHG) DONE
Figure 1. Charging Profile With TJ(REG) If the operating conditions cause the IC junction temperature to exceed TJ(REG), the charge cycle is modified, with the activation of the integrated thermal control loop. The thermal control loop is activated when an internal voltage reference, which is inversely proportional to the IC junction temperature, is lower than a fixed, temperature stable internal voltage. The thermal loop overrides the other charger control loops and reduces the charge current until the IC junction temperature returns to TJ(REG), effectively regulating the IC junction temperature.
IN
VREF Thermal Loop BATTERY SWITCH
VTJ
I(BAT)
BAT I(BAT) / K(SET) ISET V(OUT) VO(REG) System Voltage Regulation Loop
Figure 2. Thermal Regulation Circuit
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A modified charge cycle, with the thermal loop active, is shown in Figure 3.
PreConditioning Phase Thermal Regulation Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase DONE
VO(BATREG) IO(BAT) FAST-CHARGE CURRENT
Battery Current, I(BAT) Battery Voltage, V(BAT)
PRE-CHARGE CURRENT AND TERMINATION THRESHOLD
VO(LOWV)
Charge Complete Status, Charger Off
IO(PRECHG),I(TERM) T(THREG) temperature , Tj
T(PRECHG)
T(CHG)
DONE
Figure 3. Charge Profile, Thermal Loop Active
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FUNCTIONAL BLOCK DIAGRAM
V(IN) IN V(OUT)
PRE_CHARGE BACKGATE BIAS
I(OUT) OUT IOUT) / K(SET)
VO(REG)
V(ISET) I(DETECT) I(FAULT ) V(IN)
ISET
V(SET) V(PRECHG)
V(IN)
TJ T J(REG)
CHG ENABLE
BATTERY ABSENT DETECTION AND SHORT RECOVERY
V(SET) , V(PRECHG)
Dynamically Controlled Oscillator
+
TDGL(CHOVC) Deglitch TDGL(INDT) Deglitch Over_current +
VOC
TMR VCC VTMR(OFF) + + V(IN) V(OUT)+VIN(DT )
-
-
Input Power Detected
TS + Timer Fault Timer Disable Thermal Shutdown + V(OVP) BAT V (RCH) Suspend POR VCC REFERENCE AND BIAS Internal Voltage References CE
V(IN)
+
TDGL(OVP) Deglitch
Input Over-Voltage
+
TDGL(RCH) Deglitch
Recharge
Precharge
CHARGE CONTROL, TIMER and DISPLAY LOGIC
PG
V(LOW) V (TAPER) V(ISET)
+ TDGL(TERM) Deglitch Terminate
STAT1
-
STAT2 VSS
APPLICATION CIRCUITS
The typical application diagrams shown here are configured for 750 mA fast charge current, 75 mA pre-charge current, 5 hour safety timer and 30 min pre-charge timer.
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bq24060/64/65
Input Power 1 IN TMR STAT 1 STAT 2 Vss OUT 10
Li-Ion or Li-Pol Battery Pack Pack+ R8 C2 + Pack-
RTMR
C3 1 mF R1 R2 1.5 kW 1.5 kW 49.9 kW
RED
2 3 4 5
200 W BAT 9
TS 8 C1 PG 7
1 mF RT1 9.5 kW RT2 30 kW
Power Good
GREEN
0.47 mF
TEMP
ISET 6
R ISET 1.13 kW
bq24061/66
Input Power RTMR 1 2 3 4 5 IN TMR STAT 1 STAT 2 Vss OUT BAT CE PG ISET 10
Li-Ion or Li-Pol Battery Pack Pack+ R8 9 8 C1 7 6
C3 1 mF
R1 1.5 kW
R2 1.5 kW
200 W
C2
+ Pack-
49.9 kW
RED GREEN
1 mF
0.47 mF
RSET
1.13 kW
Charge Enable and Power Good
bq24062
Input Power 1 IN TMR STAT 1 STAT 2 Vss OUT BAT 10 R8 9
Li-Ion or Li-Pol Battery Pack Pack+
RTMR
C3 1 mF R1 1.5 kW R2 1.5 kW 49.9 kW
RED GREEN
2 3 4 5
200 W
C2
+ Pack-
1 mF
TS 8 C1 CE ISET 7 6
0.47 mF
RT1 9.5 kW RT2 30 kW
TEMP
RISET 1.13 kW
Charge Enable Li-Ion or Li-Pol Battery Pack
bq24063
Input Power RTMR 1 2 3 4 5 IN TMR STAT 1 STAT 2 Vss OUT BAT TE CE ISET 7 6 RSET 10 9 8 C1
Pack+
C3 1 mF
R1 1.5 kW
R2 1.5 kW
RED GREEN
200 W
R8
49.9 kW
C2 1 mF
+ Pack-
0.47 mF
1.13 kW
Charge and Termination Enable
10
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OPERATING MODES
Power Down The BQ2406X family remains in a power-down mode when the input power voltage (IN) is below the power-down threshold V(PDWN). During the power down mode all IC functions are off, and the host commands at the control pins are not interpreted. The integrated power mosfet connected between IN and OUT pins is off, the status output pins STAT1 and STAT2 are set to high impedance mode and PG output is set to the high impedance state. The power down mode is entered from any other state, if the input power V(IN) falls below the voltage threshold V(PDWN). Sleep Mode The BQ2406X enters the sleep mode when the input power voltage (IN) is above the power down threshold V(PDWN) but still lower than the input power detection threshold, V(IN) < V(OUT) + VIN(DT). During the sleep mode the charger is off, and the host commands at the control pins are not interpreted. The integrated power mosfet connected between IN and OUT pins is off, the status output pins STAT1 and STAT2 are set to the high impedance state and the PG output indicates input power not detected. The sleep mode is entered from any other state, if the input power (IN) is not detected. Power-On-Reset Mode The input power is detected when the input voltage V(IN) > V(OUT) + VIN(DT). When the input power is detected the bq2460x transitions from the sleep mode to the power-on-reset mode. In this mode of operation an internal timer T(POR) is started and internal blocks are reset (power-on-reset). Until the timer expires the STAT1 and STAT2 outputs indicate charger OFF, and the PG output indicates the input power status as not detected. At the end of the power-on-reset delay the internal comparators are enabled, and the STAT1, STAT2 and PG pins are active. Stand-By Mode In the bq24031/2/3/6 the stand-by mode is started at the end of the power-on-reset phase, if the input power is detected and CE = HI. In the stand-by mode selected blocks in the IC are operational, and the control logic monitors system status and control pins to define if the charger will set to on or off mode. The quiescent current required in stand-by mode is 100 A typical. The stand-by mode is entered from any other state, if CE = HI. If the CE pin is not available the BQ2406X enters the begin charge mode at the end of the power-on-reset phase. Begin Charge Mode All blocks in the IC are powered up, and the BQ2406X is ready to start charging the battery pack. A new charge cycle is started when the control logic decides that all conditions required to enable a new charge cycle are met. During the begin charge phase all timers are reset, after that the IC enters the charging mode. Charging Mode When the charging mode is active the BQ2406X executes the charging algorithm, as described in the state machine diagram, Figure 4. Suspend Mode The suspend mode is entered from any other state when the pack temperature is not within the valid temperature range. During the suspend mode the charger is set to off, but the timers are not reset. The normal charging mode resumes when the pack temperature is within range.
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STATE MACHINE DIAGRAM
CHARGING RECHARGE DETECTION
No V(TS) >V(TS2) OR V(TS) < V(TS1) VI(BAT ) < V(RCH ) V(OUT) V(TS) < V(TS2) AND V(TS) > V(TS1)
Suspend Set Charge Off, Stop timers, Keep timer count, STATn=Hi-Z
Yes
No Regulate IO(PRECHG) Indicate ChargeIn-Progress
ANY STATE
VDETECT ENABLED
V(OUT) Reset T(CHG) Yes T(PRCH) ON
No Enable I(DETECT) for t(DETECT) Yes No Reset T(PRCH) Battery Present GO TO Begin Charge T (CHG) ON No OR Timers disabled
VI(BAT)No
Regulate Current or Voltage Indicate ChargeIn-Progress Yes Yes V(OUT) Yes
No
BATTERY DETECTION
Apply IO(PRECHG) for t(DETECT)
No VI(BAT ) > V(RCH )
T(CHG) Expired?
T (PRCH) Expired?
ANY STATE
Yes Battery Absent Charge Off Yes
No OR timers disabled
Yes AND timers enabled Yes AND Timers enabled
V(OUT) V(TS) >V(TS2) OR V(TS) < V (TS1)
Suspend Set Charge Off, Stop timers, Keep timer count, STATn=Hi-Z
V(TS) >V(TS2) OR V(TS) < V(TS1) V(TS) < V(TS2) AND V(TS) > V(TS1)
ANY STATE
No OR termination disabled
No
Indicate Fault
ITERM detection?
V(OUT) > V(RCH)?
/CE=HI OR V(IN)>V( OVP)
Stand-by STATn set to HI-Z, update /PG status, enable control logic /CE=LO AND [V(BAT)+V(INDT) ] < V(IN) < V( OVP) Yes AND termination enabled Termination Indicate Termination Yes V(OUT) > V(RCH)? No
Yes
Enable IFAULT current No
T(POR) Expired? Power-on-reset Turn off charger , STATn and PG set to HI-Z, reset timers V(IN) > V(POR) AND V(IN) > V(OUT)+VIN(DT) Sleep [V(IN) -V(OUT)] < [VIN(DT) - VHYS(INDT) ] Turn off charger , STATn , /PG set to HI-Z , monitor input power V(IN) > V(POR) Power down All IC functions off STATn and PG set to HI-Z Done Turn off charger , Indicate Charge done Reset timers Begin Charge Reset ALL TImers
Yes Disable IFAULT current
No
FAULT RECOVERY
V(IN) < V (POR)
START -UP
ANY STATE
Figure 4. Operational Flow Chart
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CONTROL LOGIC OVERVIEW
An external host can enable or disable the charging process using a dedicated control pin, CE. A low-level signal on this pin enables the charge, and a high-level signal disables the charge. The bq2460x is in stand-by mode with CE = HI. When the charger function is enabled (CE = LO) a high accuracy reference is activated, to provide the charge voltage and charge current internal references. The charger power stage is turned on if CE = LO and if the BQ2406X detects that all conditions for safely charging a battery exist. Table 1 describes the charger control logic operation, in bq2460x versions without the TS pin the pack temp status is internally set to OK. Table 1. Control Logic Functionality
CE INPUT POWER X Not Detected Detected Detected Detected Detected Detected Detected Detected Over Voltage Detected TIMER FAULT (latched) X X X X No Yes No No No No No OUTPUT SHORT CIRCUIT X X X Yes No No No No No No No TERMINATION (latched) X X X X Yes No Yes No No No No PACK TEMP X X X X X X Absent Hot or Cold Ok Ok Ok THERMAL SHUTDOWN X X X X X X TJ < TSHUT TJ < TSHUT TJ < TSHUT TJ < TSHUT TJ < TSHUT POWER DOWN Yes No No No No No No No No No No OFF IFAULT IDETECT OFF OFF OFF ON CHARGING CHARGER POWER STAGE OFF OFF OFF bq2460X OPERATION MODE POWER DOWN SLEEP STANDBY SEE STATE DIAGRAM
LO X HI LO LO LO LO LO LO LO LO
In both STANDBY and SUSPEND modes the charge process is disabled. In the STANDBY mode all timers are reset; in SUSPEND mode the timers are held at the count stored when the suspend mode was set. The timer fault, termination and output short circuit variables shown in the control logic table are latched in the detection circuits, outside the control logic. Refer to the timers, termination and short circuit protection sections for additional details on how those latched variables are reset. The following states do not happen simultaneously due to the implementation of state machine flow: * Termination detected and timer fault detected * Battery absent function enabled when termination is not detected
TEMPERATURE QUALIFICATION (Applies only to versions with TS pin option)
The bq24060/62/64/65 devices continuously monitor the battery temperature by measuring the voltage between the TS and VSS pins. The IC compares the voltage on the TS pin against the internal V(TS1) and V(TS2) thresholds to determine if charging is allowed. Once a temperature outside the V(TS1) and V(TS2) thresholds is detected the IC immediately suspends the charge. The IC suspends charge by turning off the power FET and holding the timer value (i.e., timers are NOT reset). Charge is resumed when the temperature returns to the normal range.
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VCC Charge Suspend VC(TS2) 0.6* VCC Normal Temperature Range
VC(TS1) 0.3* VCC
Charge Suspend
Figure 5. Battery Temperature Qualification With NTC Thermistor The external resistors RT1 and RT2 (see application diagram) enable selecting a temperature window. If RTC and RTH are the thermistor impedances for the Cold and Hot thresholds the values for RT1 and RT2 can be calculated as follows, for a NTC (negative temperature coefficient) thermistor: 5 R R TC R T1 + 3 R TC * R TH
R T2 + 5 2 R R TC RTH
(2)
(1)
R TC * 7
Applying a constant voltage between the V(TS1) and V(TS2) thresholds to pin TS disables the temperature sensing feature.
INPUT OVER-VOLTAGE DETECTION, POWER GOOD STATUS OUTPUT
The input power detection status for pin IN is shown at the open collector output pin PG. Table 2. Input Power Detection Status
INPUT POWER DETECTION (IN) NOT DETECTED DETECTED, NO OVER-VOLTAGE DETECTED, OVER-VOLTAGE PG STATE High impedance LO High impedance
The BQ2406X detects an input over-voltage when V(IN) > V(OVP). When an over-voltage protection is detected the charger function is turned off and the bq2460x is set to standby mode of operation. The OVP detection is not latched, and the IC returns to normal operation when the fault condition is removed.
CHARGE STATUS OUTPUTS
The open-collector STAT1 and STAT2 outputs indicate various charger operations as shown in Table 3. These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the open-collector transistor is turned off. When termination is disabled the Done state is not available; the status LEDs indicate fast charge or pre-charge even if the charge current is lower than the termination detection threshold.
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Table 3. Charge Status
Charge State Precharge in progress Fast charge in progress Done (termination enabled only) Charge Suspend (temperature) Timer Fault Charger off Selected Input power over-voltage detected Battery absent Batteryshort OFF OFF STAT1 ON ON OFF STAT2 ON OFF ON
BATTERY CHARGING: CONSTANT CURRENT PHASE
The BQ2406X family offers on-chip current regulation. The current regulation is defined by the value of the resistor connected to ISET pin. During a charge cycle the fast charge current IO(OUT) is applied to the battery if the battery voltage is above the V(LOWV) threshold (2.95 V typ): V(SET) KSET) I(OUT) + I O(OUT) + RISET (3) Where K(SET) is the output current set factor and V(SET) is the output current set voltage. During a charge cycle if the battery voltage is below the V(LOWV) threshold a pre-charge current I(PRECHG) is applied to the battery. This feature revives deeply discharged cells. V(PRECHG) KSET) I O(OUT) I(OUT) + I (PRECHG) + X 10 RISET (4) Where K(SET) is the output current set factor and V(PRECHG) is the precharge set voltage.
CHARGE CURRENT TRANSLATOR
When the charge function is enabled internal circuits generate a current proportional to the charge current at pin ISET, this current, when applied to the external charge current programming resistor RISET generates an analog voltage that can be used by an external host to measure the charge current: R ISET V(ISET) + I(OUT) K(SET)
(5)
BATTERY VOLTAGE REGULATION
The battery pack voltage is sensed through the BAT pin, which is tied directly to the positive side of the battery pack. The BQ2406X monitors the battery pack voltage between the BAT and VSS pins. When the battery voltage rises to VO(REG) threshold the voltage regulation phase begins and the charging current begins to taper down. The voltage regulation threshold VO(REG) is fixed by an internal IC voltage reference. Two charge regulation voltages are available: 4.2 V (typ., bq24060/61/62/63/64) and 4.36 V (typ., bq24065/66).
PRE-CHARGE TIMER
The BQ2406X family activates an internal safety timer during the battery pre-conditioning phase. If the TMR pin is left open (floating) the pre-charge timer is disabled. The charge safety timer time-out value is set by the external resistor connected to TMR pin, RTMR and the timeout constants K(PCHG) and T(CHG) : T(PCHG) = K(PCHG)x T(CHG) The pre-charge timer operation is detailed in Table 4.
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Table 4. Pre-Charge Timer Operational Modes
bq2460X MODE STANDBY CHARGING SUSPEND SUSPEND CHARGING, TMR PIN NOT OPEN CHARGING, TMR PIN OPEN V(OUT) > V(LOWV) X Yes Yes No No X PRE-CHARGE TIMER MODE RESET RESET RESET SUSPEND COUNTING, EXTERNAL PROGRAMMED RATE RESET
In SUSPEND mode the pre-charge timer is put on hold (i.e., pre-charge timer is not reset), normal operation resumes when the timer returns to the normal operating mode (COUNTING). If V(BAT) does not reach the internal voltage threshold V(LOWV) within the pre-charge timer period a fault condition is detected, the charger is turned off and the pre-charge safety timer fault condition is latched. When the pre-charge timer fault latch is set the charger is turned off. Under those conditions a small current IFAULT is applied to the OUT pin, as long as input power (IN) is detected AND V(OUT) < V(LOWV), as part of a timer fault recovery protocol. This current allows the output voltage to rise above the pre-charge threshold V(LOWV), resetting the pre-charge timer fault latch when the pack is removed. Table 5 further details the pre-charge timer fault latch operation. Table 5. Pre-Charge Timer Latch Functionality
PRE-CHARGE TIMER FAULT LATCHED WHEN PRE-CHARGE TIMER FAULT LATCH RESET AT CE rising edge or OVP detected Pre-charge timer timeout AND V(OUT) > V(PRECH) Input power removed (not detected) New charging cycle started; see state diagram Timer function disabled
THERMAL PROTECTION LOOP
An internal control loop monitors the BQ2406X junction termperature (TJ) to ensure safe operation under input voltage transients, or unexpected printed circuit board temperature increase. This loop monitors the BQ2406X junction temperature and reduces the charge current when the IC junction temperature exceeds an internally set reference temperature, TJ(REG), (112C, typical). The BQ2406X has a minimum charge current, I(MIN_TJ(REG)), in thermal regulation (200 mA, typical). If the input voltage is set too high, the junction temperature exceeds the regulation point and approaches thermal shutdown.
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800 700 600 IBAT
175
150
125 500 TJ Junction Temperature 400 300 75 200 100 0 4 6 8 10 12 14 16 VI - Input Voltage - V 50 100
25 18
Figure 6. Thermal Regulation Loop Performance
DYNAMIC TIMER FUNCTION
The charge and pre-charge safety timers are programmed by the user to detect a fault condition if the charge cycle duration exceeds the total time expected under normal conditions. The expected charge time is usually calculated based on the fast charge current rate. When the thermal loop is activated the charge current is reduced, and a false safety timer fault can be observed if the thermal loop is active for a long period of time. To avoid this undesirable fault condition the BQ2406X activates the dynamic timer control, an internal circuit that slows down the safety timer's clock. The dynamic timer control circuit effectively adds an extra time to the programmed timeout value. The dynamic timer control circuit is enabled under the following conditions: 1. If battery voltage is below the pre-charge threshold: the pre-charge timer value is modified while the Thermal regulation loop is active 2. If the battery voltage is above the pre-charge threshold: the safety timer value is modified if the Thermal regulation loop is active. The BQ2406X dynamic timer control (DTC) monitors the voltage at pin ISET during pre-charge and fast charge, and increases the safety timers effective timeout value when the charge current is out of regulation and the thermal loop is active. Under normal current regulation operation, the voltage at pin ISET is set by the control loops to either V(SET) or V(PRECHG). If the thermal loop is active, the voltage at pin ISET is lower than the regulation voltage, and the DTC circuit changes the safety timers clock period based on the V(SET)/V(ISET) ratio (fast charge) or V(PRECHG)/V(SET) ratio (pre-charge). Typical safety timer multiplier values relative to the V(SET)/V(ISET) ratio is shown in the following graph.
TJ - Junction Temperature - C
Battery Current - mA
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5
CHARGE TIMER INTERNAL CLOCK PERIOD MULTIPLICATION FACTOR
4
3
2
1
0 0 1 3 2 V(SET)/V(ISET) - V 4 5
Figure 7. Safety Timer Linearity Internal Clock Period Multiplication Factor
45 40 RTMR = 70 kW
T(CHG) - Safety Timer - Hours
35 30 RTMR = 50 kW 25 20 15 10 5 0 0 1 2 3 VSET/VISET - V 4 5 6 RTMR = 30 kW
Figure 8. BQ2406X Safety Timer Linearity for RTMR Values
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160 140
Core Oscillator Frequency - kHz
120 100 80 60 40 20 0 20
30
40
60 50 ITMR Current - mA
70
80
90
Figure 9. BQ2406X Oscillator Linearity vs ITMR RTMR 30 K - 100 K
THERMAL SHUTDOWN AND PROTECTION
Internal circuits monitor the junction temperature, TJ, of the die and suspends charging if TJ exceeds an internal threshold T(SHUT) (155C typ). Charging resumes when TJ falls below the internal threshold T(SHUT) by approximately 20C.
CHARGE TERMINATION DETECTION AND RECHARGE
The charging current is monitored the during the voltage regulation phase. Charge termination is indicated at the STATx pins (STAT1 = STAT2 = Hi-Z) once the charge current falls below the termination current threshold I(TERM). A deglitch period TDGL(TERM) is added to avoid false termination indication during transient events. Charge termination is not detected if the charge current falls below the termination threshold as a result of the thermal loop activation. Termination is also not detected when charger enters the suspend mode, due to detection of invalid pack temperature or internal thermal shutdown. The termination detection is latched; charger is disabled if termination is detected. If the charger is disabled by the host or a new charge cycle starts the termination latch is reset. Table 6 describes the termination latch functionality. Table 6. Termination Latch Functionality
TERMINATION DETECTED LATCHED WHEN I(OUT) < I(TERM) AND t > TDGL(TERM) AND V(OUT) > V(RCH) TERMINATION LATCH RESET AT CE rising edge of OVP detected New charging cycle started; see state diagram Termination disabled
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The termination function is DISABLED: 1. In bq24060/61/62/64/65 the termination is disabled when the TMR pin is left open (floating). 2. In bq24063 leaving TMR pin open (floating) does NOT disable the termination. The only way to disable termination in the bq24063 is to set TE = HIGH.
BATTERY ABSENT DETECTION - VOLTAGE MODE ALGORITHM
The BQ2406X provides a battery absent detection scheme to reliably detect insertion and/or removal of battery packs. The detection circuit applies an internal current to the battery terminal, and detects battery presence based on the terminal voltage behavior. Figure 10 has a typical waveform of the output voltage when the battery absent detection is enabled and no battery is connected:
5
4.50
VO - Output Voltage - V
4
3.50
3
2.50
2 0 0.1 0.2 0.3 0.4 0.5 t - Time - s 0.6 0.7 0.8 0.9 1
Figure 10. Battery-Absent Detection Waveforms The battery absent detection function is disabled if the voltage at the BAT pin is held above the battery recharge threshold, V(RCH), after termination detection. When the voltage at the BAT pin falls to the recharge threshold, either by connection of a load to the battery or due to battery removal, the BQ2406X begins a battery absent detection test. This test involves enabling a detection current, I(DETECT), for a period of T(DETECT) and checking to see if the battery voltage is below the pre-charge threshold, V(LOWV). Following this, the precharge current, IO(PRECHG) is applied for a period of T(DETECT) and the battery voltage checked again to be above the recharge threshold. Passing both of the discharge and charging tests (battery terminal voltage being below the pre-charge and above the recharge thresholds on the battery detection test) indicates a battery absent fault at the STAT1 and STAT2 pins. Failure of either test starts a new charge cycle. For the absent battery condition the voltage on the BAT pin rises and falls between the V(LOWV) and VO(REG) thresholds indefinitely. See the operation flowchart for more details on this algorithm. The battery absent detection function is disabled when the termination is disabled. The BQ2406X provides a small battery leakage current, IBAT(DONE) (1 A typical), after termination to pull down the BAT pin voltage in the event of battery removal. If the leakage on the OUT pin is higher than this pulldown current, then the voltage at the pin remains above termination and a battery-absent state will not be detected. This problem is fixed with the addition of a pulldown resistor of 2 M to 4 M from the OUT pin to VSS. A resistor too large (> 4 M) can cause the OUT pin voltage to drop below the V(LOWV) threshold before the recharge deglitch (typ 25 ms) expires, causing a fault condition. In this case the BQ2406X provides a fault current (typ 750 A) to pull the pin above the termination threshold.
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CHARGE SAFETY TIMER
As a safety mechanism the BQ2406X has a user-programmable timer that monitors the total fast charge time. This timer (charge safety timer) is started at the end of the pre-conditioning period. The safety charge timeout value is set by the value of an external resistor connected to the TMR pin (RTMR); if pin TMR is left open (floating) the charge safety timer is disabled. The charge safety timer time-out value is calculated as follows: T(CHG) = [K(CHG)x R(TMR)] The safety timer operation modes are shown in Table 7 Table 7. Charge Safety Timer Operational Modes
bq2460X STANDBY CHARGING SUSPEND SUSPEND CHARGING, TMR PIN NOT OPEN CHARGING, TMR PIN OPEN V(OUT) > V(LOWV) X No No Yes Yes X CHARGE SAFETY TIMER MODE RESET RESET RESET SUSPEND COUNTING RESET
In SUSPEND mode the charge safety timer is put on hold (i.e., charge safety timer is not reset), normal operation resumes when the timer returns to the normal operating mode (COUNTING). If charge termination is not reached within the timer period a fault condition is detected. Under those circumstances the LED status is updated to indicate a fault condition and : 1. bq24060/61/62/64/65/66: charger is turned off and the charge safety timer fault condition is latched. 2. bq24063, TE = LO: charger is turned off and the charge safety timer fault condition is latched. 3. bq24063 TE pin, = HI: charger is not turned OFF, timer fault condition is latched and indicated in STAT1, STAT2 pins. Charger is turned OFF when TE :HILO, and charge current is below termination threshold I(TERM). When the charge safety timer fault latch is set and the charger is turned off a small current IFAULT is applied to the OUT pin, as long as input power (IN) is detected AND V(OUT) < V(RCHG), as part of a timer fault recovery protocol. This current allows the output voltage to rise above the recharge threshold V(RCHG) if the pack is removed, and assures that the charge safety timer fault latch is reset if the pack is removed and re-inserted. Table 8 further details the charge safety timer fault latch operation. Table 8. Charge Safety Timer Latch Functionality
CHARGE SAFETY TIMER FAULT LATCHED AND V(OUT) > V(RCHG) CHARGE SAFETY TIMER FAULT LATCH RESET AT CE rising edge, or OVP detected Input power removed (not detected) New charging cycle started; see state diagram CE rising edge, or OVP detected V(OUT) < V(RCHG) Input power removed (not detected) New charging cycle started; see state diagram
LDO MODE OPERATION
The bq24060/61/62/64/65/66 devices operate as a LDO when the timer pin TMR is left open (floating). The bq24063 operates as an LDO when TE = HI. When the LDO mode is set, the termination is disabled, and the charger is ON as long as the charging process is enabled. When the LDO mode is set the termination is disabled and an external host can monitor the charge current at pin ISET, making it possible to continue the battery charging process until the charge current tapers down to a value lower than the internally set termination threshold (10% of fast charge programmed current).
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SHORT CIRCUIT PROTECTION
The internal comparators monitor the battery voltage and detect when a short circuit is applied to the battery terminal. If the voltage at the BAT pin is less than the internal threshold V(scind) (1.8 V typical), the STAT pins indicate a fault condition (STAT1 = STAT2 = Hi-Z). When the voltage at the BAT pin falls below a second internal threshold V(sc) (1.4 V typical), the charger power stage is turned off. A recovery current, I(short) (22 mA typical), is applied to the BAT pin, enabling detection of the short circuit removal. The battery output current versus battery voltage is shown in the graph, Figure 11
1200 RISET at 840 W 1000
Battery Current - mA
800
600
400
200
0 4 3.5 3 2.5 2 1.5 1 0.5 0 Battery Voltage - V
Figure 11. BQ2406X Short Circuit Behavior See the application section for additional details on start-up operation with V(BAT) < V(SC).
STARTUP WITH DEEPLY DEPLETED BATTERY CONNECTED
The BQ2406X charger furnishes the programmed charge current if a battery is detected. If no battery is connected the BQ2406X operates as follows: * The output current is limited to 22 mA (typ), if the voltage at BAT pin is below the short circuit detection threshold V(SC), 1.8 V typical. * The output current is regulated to the programmed pre-charge current if V(SC) < V(BAT) < V(LOWV). * The output current is regulated to the programmed fast charge current If V(BAT) > V(LOWV) AND voltage regulation is not reached. The output voltage collapses if no battery is present and the end equipment requires a bias current larger that the available charge current.
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TYPICAL OPERATING CHARACTERISTICS
Measured using the typical application circuit shown previously.
THERMAL LOOP OPERATION WITH POWERPAD ATTACHED
7 VIN 6 5 1.50 1.75
THERMAL LOOP AND DTC OPERATION
1.6 1.4 Safety Timer 12 10 8 1 0.8 0.6 0.4 IBAT 6 4 2 0 0.50 1 1.50 2 t - Time - s 2.50 3
1.25 1 IBAT 0.75 VISET 0.50 0.25 0 0 0.50 1 1.50 2 t - Time - s 2.50 3
4 3 2 1 0
Battery Current - A
1.2
0.2 0 0
Figure 12. PACK REMOVAL TRANSIENT
5 4.75 4.50 VBAT 1 0.8 0.6 0.4 4 3.75 3.50 3.25 3 0 0.5 1 1.5 t - Time - mS 2 -0.2 -0.4 2.5 IBAT 0.2 0 8 7
Figure 13. OVP TRANSIENTS
2 1.80 1.60 VIN
Battery Voltage - V
Battery Current - A
6
Voltage - V
4.25
5 4 3 2 VPG 1 0 0 5 10 15 20 25 30 35 t - Time - mS 40 45 50 IBAT
1.20 1 0.80 0.60 0.40 0.20 0
Figure 14.
Figure 15. POWER UP - NO BATTERY CE = H
9 8 7 6 VBAT 0.50 VIN 0.60
PG DEGLITCH TIME
9 8 7 VIN
Voltage - V
6
5 4 3 2
5 4 3 2 VPG
0.30 0.20 0.10 VPG 0
1 1 0 0 1 2 3 t - Time - mS 4 5 0 -1
-0.10 0 0.50 1 1.50 2 2.50 3 3.50 4 4.50 5 t - Time - mS
Figure 16.
Figure 17.
Battery Voltage - V
0.40
Voltage - V
Charge Current - A
1.40
TCHG - Safety Timer - Hrs
Battery Current - A
Voltage - V
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TYPICAL OPERATING CHARACTERISTICS (continued)
Measured using the typical application circuit shown previously.
BQ2406X ACTIVE SUPPLY CURRENT vs TEMPERATURE
ICC(CHGON) - Active Supply Current - mA
6 VIN @ 16.5 V 5.5 105 104.5
PRE-CHARGE CURRENT vs BATTERY VOLTAGE
45 40
PRE-CHARGE CURRENT vs BATTERY VOLTAGE
Charge Current - mA
103.5 103 102.5 25C 102 101.5 101 100.5 0C 85C
Charge Current - mA
104 VIN @ 12.5 V
35 30 25 20 15 10 5 0
85C
5
4.5 VIN @ 6 V 4
25C 0C 2 2.20 2.40 2.60 2.80 Battery Voltage - V 3
3.5 -10
0
10 20 30 40 50 60 70 80 90 TA - Temperature - C
100 2
2.20
2.40 2.60 Battery Voltage - V
2.80
3
Figure 18. FAST-CHARGE CURRENT vs BATTERY VOLTAGE
1000 995 990 52.5 52 51.5
Figure 19. HIGH CHARGE RATE FAST-CHARGE CURRENT vs BATTERY VOLTAGE
400 390 25C 51 50.5 50 49.5 49 48.5 48 47.5 85C 0C 380 370
Figure 20. LOW CURRENT RATE KSET LINEARITY vs CHARGE CURRENT
Charge Current - mA
985 980 975 970 85C 965 960 955 950 3 3.20 3.40 3.60 3.80 Battery Voltage - V 4 0C 25C
Charge Current - mA
KSET - A/A
360 350 340 330 320 310
85C 0C 25C
3
3.20
3.40 3.60 Battery Voltage - V
3.80
4
300 25 35 45 55 65 75 85 95 105 115 125 Battery Charge Current -
Figure 21. HIGH CHARGE RATE KSET LINEARITY vs CHARGE CURRENT
350
Figure 22. LOW CHARGE RATE BATTERY REGULATION VOLTAGE vs INPUT VOLTAGE
4.202 4.200 0.400 0C 0.375
Figure 23. 2.0 < V(BAT) < 3.0 V DROPOUT VOLTAGE vs TEMPERATURE
345
V(DO) - Droput Voltage - V
340
Battery Voltage - V
85C
4.198 4.196 4.194 4.192 4.190
25C
0.350 0.325 0.300 0.275 0.250 0.225 0.200 -15
KSET - A/A
0C 335 25C 330
325
4.188 4.186 4.5
85C
320 0
100 200 300 400 500 600 700 800 900 1000 Battery Charge Current - mA
6.5
8.5 10.5 12.5 Input Voltage - V
14.5
16.5
5
25 45 65 85 TA - Temperature - C
105
125
Figure 24. 3.0 < V(BAT) < 4.0 V
Figure 25.
Figure 26.
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APPLICATION INFORMATION SELECTING INPUT AND OUTPUT CAPACITOR
In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. A 1-F ceramic capacitor, placed in close proximity to the IN pin and GND pad, works fine. In some applications, depending on the power supply characteristics and cable length, it may be necessary to increase the input filter capacitor to avoid exceeding the IN pin maximum voltage rating during adapter hot plug events. The BQ2406X only requires a small output capacitor for loop stability. A 0.47 F ceramic capacitor placed between the BAT and ISET pad is typically sufficient.
BQ2406X CHARGER DESIGN EXAMPLE
Requirements * Supply voltage = 5 V * Safety timer duration of 5 hours for fast charge * Fast charge current of approximately 750 mA * Battery temp sense is not used Calculations Program the charge current for 750 mA: RISET = [V(SET)x K(SET) / I(OUT)] from electrical characteristics table. . . V(SET) = 2.5 V from electrical characteristics table. . . K(SET) = 335 RISET = [2.5 V x 335 / 0.75 A] = 1.12 k Selecting the closest standard value, use a 1.13 k resistor connected between ISET (pin 6) and ground. Program 5-hour safety timer timeout: R(TMR) = [T(CHG) / K(CHG)] from the electrical characteristics table. . . K(CHG) = 0.1 hr / k K(TMR) = [5 hrs / (0.1 hr / k)] = 50 k Selecting the closest standard value, use a 49.9 k resistor connected between TMR (pin 2) and ground. Disable the temp sense function: A constant voltage between VTS1 and VTS2 on the TS input disables the temp sense function. from electrical characteristics table. . . V(TS1) = 30% x VIN from electrical characteristics table. . . V(TS2) = 61% x VIN A constant voltage of 50% x Vin disables the temp sense function, so a divide-by-2 resistor divider connected between Vin and ground can be used. Two 1-m resistors keeps the power dissipated in this divider to a minimum. PIN IN COMPONENTS In most applications, the minimum input capacitance needed is a 0.1 F ceramic decoupling capacitor near the input pin connected to ground (preferably to a grond plane through vias). The recommended amount of input capacitance is 1 F or at least as much as on the output pin. This added capacitance helps with hot plug transients, input inductance and initial charge transients. There is no minimum value for capacitance for this output, but it is recommended to connect a 1 F ceramic capacitor between OUT and ground. This capacitance helps with termination, and cycling frequency between charge done and refresh charge when no battery is present. It also helps cancel out any battery lead inductance for long leaded battery packs. It is recommended to put as much ceramic capacitance on the input as the output so as not to cause a drop out of the input when charging is initiated.
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APPLICATION INFORMATION (continued)
ISET/BAT For stability reasons, it may be necessary to put a 0.47-F capacitor between the ISET and BAT pin.. Connect the cathode of a red LED to the open-collector STAT1 output, and connect the anode of the red LED to the input supply through a 1.5 k resistor that limits the current. Connect the cathode of a green LED to the open-collector STAT2 output, and connect the anode of the green LED to the input supply through a 1.5 k resistor that limits the current. Connect the cathode of an LED to the open-collector PG output, and connect the anode of the LED to the input supply through a 1.5 k resistor to limit the current.
STAT1/2 and PG Optional (LED STATUS - See below, Processor Monitored; or no status) STAT1 STAT2 PG
THERMAL CONSIDERATIONS
The BQ2406X family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application Note (SLUA271). The most common measure of package thermal performance is thermal impedance (JA ) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for JA is: T * TA q(JA) + J P (6) Where: TJ = chip junction temperature TA = ambient temperature P = device power dissipation Factors that can greatly influence the measurement and calculation of JA include: * Whether or not the device is board mounted * Trace size, composition, thickness, and geometry * Orientation of the device (horizontal or vertical) * Volume of the ambient air surrounding the device under test and airflow * Whether other surfaces are in close proximity to the device being tested The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. It can be calculated from the following equation when a battery pack is being charged : P = [V(IN) - V(OUT)] x I(OUT) Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. See the charging profile, Figure 1 . If the board thermal design is not adequate the programmed fast charge rate current may not be achieved under maximum input voltage and minimum battery voltage, as the thermal loop can be active effectively reducing the charge current to avoid excessive IC junction temperature.
USING ADAPTERS WITH LARGE OUTPUT VOLTAGE RIPPLE
Some low cost adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the battery voltage during part of the cycle. To enable operation with low cost adapters under those conditions the BQ2406X family keeps the charger on for at least 30 msec (typical) after the input power was not detected. This feature enables use of external low cost adapters using 50 Hz networks. The backgate control circuit prevents any reverse current flowing from the battery to the adapter terminal during the charger off delay time.
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BQ2406X
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SLUS689 - JUNE 2006
APPLICATION INFORMATION (continued)
Note that the PG pin is not deglitched, and it indicates input power loss immediately after the input voltage falls below the output voltage. If the input source frequently drops below the output voltage and recovers, a small capacitor can be used from PG to VSS to prevent /PG flashing events.
PCB LAYOUT CONSIDERATIONS
It is important to pay special attention to the PCB layout. The following provides some guidelines: * To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter capacitors from OUT to GND (thermal pad) should be placed as close as possible to the BQ2406X, with short trace runs to both IN, OUT and GND (thermal pad). * All low-current GND connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path. * The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces. * The BQ2406X family are packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application Note (SLUA271).
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