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INTEGRATED CIRCUITS
DATA SHEET
74LVC1G66 Bilateral switch
Product specification File under Integrated Circuits, IC24 2001 Oct 30
Philips Semiconductors
Product specification
Bilateral switch
FEATURES * Very low ON resistance: - 10 (typical) at VCC = 2.7 V - 8 (typical) at VCC = 3.3 V - 6 (typical) at VCC = 5 V. * ESD protection: - HBM EIA/JESD22-A114-A exceeds 2000 V - MM EIA/JESD22-A115-A exceeds 200 V. * High noise immunity * CMOS low power consumption * Latch up performance exceeds 250 mA * SOT353 package * Direct interface TTL-levels. QUICK REFERENCE DATA Ground = 0 V; Tamb = 25 C; tr = tf 3.0 ns. SYMBOL tPZH/tPZL tPHZ/tPLZ CI CPD CS PARAMETER turn-on time E to Vos turn-off time E to Vos input capacitance power dissipation capacitance switch capacitance CL = 50 pF; f = 10 MHz; VCC = 3.3 V; notes 1 and 2 OFF-state ON-state Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL + CS) x VCC2 x fo where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS = max. switch capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. CONDITIONS CL = 50 pF; RL = 500 ; VCC = 3 V CL = 50 pF; RL = 500 ; VCC = 5 V CL = 50 pF; RL = 500 ; VCC = 3 V CL = 50 pF; RL = 500 ; VCC = 5 V DESCRIPTION
74LVC1G66
The 74LVC1G66 is a high-speed Si-gate CMOS device. The 74LVC1G66 provides an analog switch. The switch has two input/output pins (Y and Z) and an active HIGH enable input pin (E). When pin E is LOW, the analog switch is turned off.
TYPICAL 2.6 1.9 3.4 2.5 2 16 5 9.5 ns ns ns ns pF pF pF pF
UNIT
2001 Oct 30
2
Philips Semiconductors
Product specification
Bilateral switch
FUNCTION TABLE See note 1. INPUT E L H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING INFORMATION PACKAGE TYPE NUMBER 74LVC1G66GW PINNING PIN 1 2 3 4 5 Y Z GND E VCC SYMBOL independent input/output independent output/input ground (0 V) enable input (active HIGH) supply voltage DESCRIPTION TEMPERATURE RANGE -40 to +85 C PINS 5 PACKAGE SC-88A MATERIAL plastic SWITCH OFF ON
74LVC1G66
CODE SOT353
MARKING VL
handbook, halfpage handbook, halfpage
Y1 Z2 GND 3
MNA074
5 VCC
66
4 E
Y
Z
E
MNA657
Fig.1 Pin configuration.
Fig.2 Logic symbol.
2001 Oct 30
3
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
handbook, halfpage
Z
handbook, halfpage
1 4#
1 1 X1
MNA076
2 Y E
VCC
MNA658
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VS Tamb tr,tf input voltage switch voltage operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V VCC = 2.7 to 5.5 V PARAMETER supply voltage CONDITIONS 0 0 -40 0 0 MIN. 1.65 MAX. 5.5 5.5 VCC +85 20 10 V V V C ns/V ns/V UNIT
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V); see note 1. SYMBOL VCC IIK ISK IS ICC Tstg PD Notes 1. To avoid drawing VCC current out of pin Z, when switch current flows into pin Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of pin Y. In this case there is no limit for the voltage drop across the switch, but the voltage at pins Y and Z may not exceed VCC or GND. 2. Above 55 C the value of PD derates linearly with 2.5 mW/K. PARAMETER supply voltage input diode current switch diode current switch source or sink current VCC or GND current storage temperature power dissipation per package for temperature range from -40 to +85 C; note 2 VI < -0.5 or VI > VCC + 0.5 V VS < -0.5 or VS > VCC + 0.5 V -0.5 V < VO < VCC + 0.5 V CONDITIONS - - - - -65 - MIN. -0.5 MAX. +6.5 -50 50 50 100 +150 200 UNIT V mA mA mA mA C mW
2001 Oct 30
5
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
DC CHARACTERISTICS With regard to recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH HIGH-level input voltage VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 II IS input leakage current (control pin) analog switch OFF-state current analog switch ON-state current quiescent supply current VI = 5.5 V or GND VI = VIH or VIL; |VS| = VCC - GND; see Fig.6 VI = VIH or VIL; |VS| = VCC - GND; see Fig.7 VI = VCC or GND; VS = GND or VCC; IO = 0 A 5.5 5.5 MIN. 1.7 2.0 0.7 x VCC - - - - - Tamb (C) -40 to +85 TYP.(1) - - - - 0.7 0.8 5 5 - - - - - - - 0.1 0.1 MAX. V V V V V V A A 0.65 x VCC - UNIT
1.65 to 1.95 -
0.35 x VCC V
0.30 x VCC V
IS
5.5
-
0.1
5
A
ICC
5.5
-
0.1
10
A
ICC
additional quiescent VI = VCC - 0.6 V; supply current per control VS = GND or VCC; IO = 0 A pin
5.5
-
5
500
A
Note 1. All typical values are at Tamb = 25 C.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
Type 74LVC1G66 TEST CONDITIONS SYMBOL PARAMETER OTHER RON ON-resistance (peak) VS = GND to VCC; VI = VIH; see Fig.5 IS (mA) 4 8 12 24 32 ON-resistance (rail) VS = GND; VI = VIH; see Fig.5 4 8 12 24 32 ON-resistance (rail) VS = VCC; VI = VIH; see Fig.5 4 8 12 24 32 ON-resistance (flatness) VS = GND to VCC; VI = VIH; see Figs 9 to 12 4 8 12 24 32 Notes 1. All typical values are measured at Tamb = 25 C. 2. RON flatness over operating temperature range (-40 to +85 C). VCC (V) 1.65 - 1.95 2.3 - 2.7 2.7 3.0 - 3.6 4.5 - 5.5 1.65 - 1.95 2.3 - 2.7 2.7 3.0 - 3.6 4.5 - 5.5 1.65 - 1.95 2.3 - 2.7 2.7 3.0 - 3.6 4.5 - 5.5 1.8 2.5 2.7 3.3 5.0
74LVC1G66
Tamb (C) -40 to +85 MIN. - - - - - - - - - - - - - - - - - - - - TYP.(1) 35 14 11.5 8.5 6.5 10 8.5 7.5 6.5 6 12 8.5 7.5 6.5 6 100(2) 17(2) 10(2) 5(2) 3(2) MAX. 100 30 25 20 15 30 20 18 15 10 30 20 18 15 10 - - - - - UNIT
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
E E VIH V Y Y VS = GND to VCC Z A IS GND GND
MNA659 MNA660
VIL
Z A VO = GND or VCC GND
VI = VCC or GND
Fig.5
Test circuit for measuring ON-resistance (RON).
Fig.6 Test circuit for circuit OFF-state current.
102 handbook, halfpage RON ()
MNA673
VIH
E
VCC = 1.8 V
Y A VI = VCC or GND
Z 2.5 V 10 A 3.3 V VO (open circuit) GND
MNA661
2.7 V
5.0 V
1
0
1
2
3
4
VI (V)
5
Fig.8 Fig.7 Test circuit for measuring ON-state current.
Typical ON-resistance (RON) as a function of input voltage (VS) for VS = GND to VCC.
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Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
handbook, halfpage
15
MNA663
handbook, halfpage
15
MNA664
RON () 10
Tamb = +85 C +25 C -40 C
RON () 10 Tamb = +85 C +25 C -40 C
5
5
0
0
1
2
Vl (V)
3
0 0 1 2 Vl (V) 3
Fig.9 RON for VCC = 2.5 V.
Fig.10 RON for VCC = 2.7 V.
handbook, halfpage
10
MNA665
handbook, halfpage
8
MNA666
RON () 8 Tamb = +85 C
RON ()
7
6 6 +25 C -40 C 4 4 2 5
Tamb = +85 C
+25 C -40 C
3
0 0 1 2 3 Vl (V) 4
2 0 1 2 3 4 VI (V) 5
Fig.11 RON for VCC = 3.3 V.
Fig.12 RON for VCC = 5.0 V.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
AC CHARACTERISTICS GND = 0 V; tr = tf 2.0 ns; CL = 30 pF; RL = 1 k; VCC = 1.65 to 1.95 V; GND = 0 V; tr = tf 2.0 ns; CL = 30 pF; RL = 500 ; VCC = 2.3 to 2.7 V; GND = 0 V; tr = tf 2.5 ns; CL = 50 pF; RL = 500 ; VCC 2.7 V. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPHL/tPLH propagation delay inA; inB to outY see Figs 13 and 15 VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 tPZH/tPZL turn-ON time E to VOS see Figs 14 and 15 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 tPHZ/tPLZ turn-OFF time E to VOS see Figs 14 and 15 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Note 1. All typical values are measured at Tamb = 25 C. MIN. - - - - - 1 1 1 1 1 1 1 1 1 1
74LVC1G66
Tamb (C) -40 to +85 TYP.(1) 0.8 0.4 0.4 0.3 0.2 5.3 3.0 2.6 2.5 1.9 4.2 2.4 3.6 3.4 2.5 2 1.2 1 0.8 0.6 12 6.5 6 5 4.2 10 6.9 7.5 6.5 5 MAX. ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns UNIT
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
AC WAVEFORMS
74LVC1G66
handbook, halfpage VI
Y or Z GND
VM
t PHL VOH Z or Y VOL VM
t PLH
MNA667
INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7; V 3.0 to 3.6 V 4.5 to 5.5 V VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V 0.5 x VCC VCC VCC 2.7 V 2.7 V VCC VI tr = tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns 2.5 ns
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.13 The input (VS) to output (VO) propagation delays.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
handbook, full pagewidth
VI E GND t PLZ VCC Y or Z output LOW-to-OFF OFF-to-LOW VOL t PHZ Y or Z output HIGH-to-OFF OFF-to-HIGH VOH VY VM GND switch enabled switch disabled switch enabled
MNA668
VM
t PZL
VM VX t PZH
INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V 0.5 x VCC VCC VCC 2.7 V 2.7 V VCC VI tr = tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns 2.5 ns
VX = VOL + 0.3 V at VCC 2.7 V; VX = VOL + 0.1 x VCC at VCC < 2.7 V; VY = VOH - 0.3 V at VCC 2.7 V; VY = VOH - 0.1 x VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load.
Fig.14 The turn-on and turn-off times.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
handbook, full pagewidth
VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL
MNA616
VEXT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V VI VCC VCC 2.7 V 2.7 V VCC CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1 k 500 500 500 500 tPLH/tPHL open open open open open tPZH/tPHZ GND GND GND GND GND tPZL/tPLZ 2 x VCC 2 x VCC 6V 6V 2 x VCC
RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.15 Load circuitry for switching times.
2001 Oct 30
13
Philips Semiconductors
Product specification
Bilateral switch
ADDITIONAL AC CHARACTERISTICS FOR THE 74LVC1G66 Recommended conditions and all typical values are measured at Tamb = 25 C. SYMBOL PARAMETER sine-wave distortion TEST CONDITIONS RL = 10 k; CL = 50 pF; fin = 1 kHz; see Fig.17 VCC (V) 1.65 2.3 3 4.5 RL = 10 k; CL = 50 pF; fin = 10 kHz; see Fig.17 1.65 2.3 3 4.5 switch ON signal frequency response RL = 600 ; CL = 50 pF; fin = 1 MHz; see Fig.16; note 1 1.65 2.3 3 4.5 RL = 50 ; CL = 5 pF; fin = 1 MHz; see Fig.16; note 1 1.65 2.3 3 4.5 switch OFF signal feed-through attenuation RL = 600 ; CL = 50 pF; fin = 1 MHz; see Fig.18; note 2 1.65 2.3 3 4.5 RL = 0 ; CL = 50 pF; fin = 1 MHz; see Fig.18; note 2 1.65 2.3 3 4.5 crosstalk (control input to signal output) RL = 600 ; CL = 50 pF; fin = 1 MHz; tr = tf = 2 ns; see Fig.19 1.65 2.3 3 4.5 minimum frequency response (-3 dB) RL = 50 ; CL = 10 pF; see Fig.16; note 1 1.65 2.3 3 4.5
74LVC1G66
TYPICAL 0.032 0.008 0.006 0.001 0.068 0.009 0.008 0.006 135 145 150 155 >500 >500 >500 >500 -46 -46 -46 -46 -37 -37 -37 -37 69 87 156 302 200 350 410 440 % % % % % % % %
UNIT
MHz MHz MHz MHz MHz MHz MHz MHz dB dB dB dB dB dB dB dB mV mV mV mV MHz MHz MHz MHz
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
SYMBOL CPD
PARAMETER power dissipation capacitance
TEST CONDITIONS CL = 50 pF; fin = 10 MHz
VCC (V) 2.5 3.3 5.0
TYPICAL 13.7 15.2 18.3 0.05 pF pF pF pC
UNIT
Q
charge injection
CL = 0.1 nF; Vgen = 0 V; 1.65 to 5.5 Rgen = 0 ; f = 1 Mhz; RL = 1 M; see Fig.20; note 3
Notes 1. Adjust fin voltage to obtain 0 dBm level at output. Increase fin frequency until dB meter reads -3 dB. 2. Adjust fin voltage to obtain 0 dBm level at input. 3. Guaranteed by design.
handbook, full pagewidth
VIH
E
0.1 F
Y/Z
Z/Y RL
VO CL dB
fin
50 channel ON
1/2VCC
MNA669
Fig.16 Test circuit for measuring the frequency response when switch is ON.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
handbook, full pagewidth
E VIH 10 F VO RL channel ON 1/2VCC
MNA670
Y/Z 600
Z/Y
fin
CL
DISTORTION METER
VCC 1.65 V 2.3 V 3V 4V
VI 1.4 Vp-p 2 Vp-p 2.5 Vp-p 4 Vp-p Fig.17 Test circuit for measuring sine-wave distortion.
handbook, full pagewidth
VIL 0.1 F
E
Y/Z RL channel ON
Z/Y RL 1/2VCC
VO CL dB
fin
50
1/2VCC
MNA671
Fig.18 Test circuit for measuring feed-through when switch is OFF.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
handbook, full pagewidth
E
Y/Z 50 Rin 600 1/2VCC
Z/Y RL 600 1/2VCC
VO CL 50 pF
MNA672
Fig.19 Crosstalk.
handbook, full pagewidth
E
Rgen Y/Z logic input
Z/Y 1 M
VO CL 0.1 nF
Vgen
MNA674
RL
handbook, full pagewidth
logic input (E)
off
on
off
VO
Vout
MNA675
Q = ( Vout) . (CL)
Fig.20 Charge injection test.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
PACKAGE OUTLINE Plastic surface mounted package; 5 leads
74LVC1G66
SOT353
D
B
E
A
X
y
HE
vMA
5
4
Q
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E (2) 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT353
REFERENCES IEC JEDEC EIAJ SC-88A
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
2001 Oct 30
18
Philips Semiconductors
Product specification
Bilateral switch
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
74LVC1G66
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
Suitability of surface mount IC packages for wave and reflow soldering methods
74LVC1G66
SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS
74LVC1G66
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Preliminary data
Qualification
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2001 Oct 30
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Philips Semiconductors
Product specification
Bilateral switch
NOTES
74LVC1G66
2001 Oct 30
22
Philips Semiconductors
Product specification
Bilateral switch
NOTES
74LVC1G66
2001 Oct 30
23
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2001
SCA73
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/01/pp24
Date of release: 2001
Oct 30
Document order number:
9397 750 08977

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