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AT28BV64
Features
* * * * * * * *
2.7V to 3.6V Supply Full Read and Write Operation Low Power Dissipation 8 mA Active Current 50 A CMOS Standby Current Read Access Time - 300 ns Byte Write - 3 ms Direct Microprocessor Control DATA Polling READY/BUSY Open Drain Output High Reliability CMOS Technology Endurance: 100,000 Cycles Data Retention: 10 Years JEDEC Approved Byte-Wide Pinout Commercial and Industrial Temperature Ranges
64K (8K x 8) Battery-VoltageTM CMOS E2PROM
Description
The AT28BV64 is a low-voltage, low-power Electrically Erasable and Programmable Read Only Memory specifically designed for battery powered applications. Its 64K of memory is organized 8,192 words by 8 bits. Manufactured with Atmel's advanced nonvolatile CMOS technology, the device offers access times to 200 ns with power dissipation less than 30 mW. When the device is deselected the standby current is less than 50 A. The AT28BV64 is accessed like a Static RAM for the read or write cycles without the need for external components. During a byte write, the address and data are latched internally, freeing the microprocessor address and data bus for other operations. Fol(continued)
Pin Configurations
Pin Name A0 - A12 CE OE WE I/O0 - I/O7 RDY/BUSY NC DC Function Addresses Chip Enable
PDIP, SOIC Top View
AT28BV64
Output Enable Write Enable Data Inputs/Outputs Ready/Busy Output No Connect Don't Connect
PLCC Top View
TSOP Top View
0493A
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Description (Continued)
lowing the initiation of a write cycle, the device will go to a busy state and automatically clear and write the latched data using an internal control timer. The device includes two methods for detecting the end of a write cycle, level detection of RDY/BUSY and DATA polling of I/O7. Once the end of a write cycle has been detected, a new access for a read or write can begin. Atmel's 28BV64 has additional features to ensure high quality and manufacturability. The device utilizes error correction internally for extended endurance and for improved data retention characteristics. An extra 32-bytes of E2PROM are available for device identification or tracking.
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias................. -55C to +125C Storage Temperature...................... -65C to +150C All Input Voltages (including NC Pins) with Respect to Ground ................... -0.6V to +6.25V All Output Voltages with Respect to Ground .............-0.6V to VCC + 0.6V Voltage on OE and A9 with Respect to Ground ................... -0.6V to +13.5V
*NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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AT28BV64
AT28BV64
Device Operation
READ: The AT28BV64 is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in a high impedance state whenever CE or OE is high. This dual line control gives designers increased flexibility in preventing bus contention. BYTE WRITE: Writing data into the AT28BV64 is similar to writing into a Static RAM. A low pulse on the WE or CE input with OE high and CE or WE low (respectively) initiates a byte write. The address location is latched on the falling edge of WE (or CE); the new data is latched on the rising edge. Internally, the device performs a self-clear before write. Once a byte write has been started, it will automatically time itself to completion. Once a programming operation has been initiated and for the duration of tWC, a read operation will effectively be a polling operation. READY/BUSY: Pin 1 is an open drain READY/BUSY output that can be used to detect the end of a write cycle. RDY/BUSY is actively pulled low during the write cycle and is released at the completion of the write. The open drain connection allows for OR-tying of several devices to the same RDY/BUSY line. DATA POLLING: The AT28BV64 provides DATA POLLING to signal the completion of a write cycle. During a write cycle, an attempted read of the data being written results in the complement of that data for I/O7 (the other outputs are indeterminate). When the write cycle is finished, true data appears on all outputs. WRITE PROTECTION: Inadvertent writes to the device are protected against in the following ways. (a) VCC sense-- if VCC is below 1.8V (typical) the write function is inhibited. (b) VCC power on delay-- once VCC h a s reached 2.0V the device will automatically time out 10 ms (typical) before allowing a byte write. (c) Write Inhibit-- holding any one of OE low, CE high or WE high inhibits byte write cycles.
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DC and AC Operating Range
AT28BV64-30 Operating Temperature (Case) VCC Power Supply Com. Ind. 0C - 70C -40C - 85C 2.7V to 3.6V
Operating Modes
Mode Read Write
(2)
CE VIL VIL VIH X X X
OE VIL VIH X
(1)
WE VIH VIL X VIH X X
I/O DOUT DIN High Z
Standby/Write Inhibit Write Inhibit Write Inhibit Output Disable
X VIL VIH
High Z
Notes: 1. X can be VIL or VIH. 2. Refer to AC Programming Waveforms.
DC Characteristics
Symbol ILI ILO ISB ICC VIL VIH VOL VOH Parameter Input Load Current Output Leakage Current VCC Standby Current CMOS VCC Active Current AC Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL = 1 mA IOL = 2 mA for RDY/BUSY IOH = -100 A 2.0 2.0 0.3 0.3 Condition VIN = 0V to VCC + 1.0V VI/O = 0V to VCC CE = VCC - 0.3V to VCC + 1.0V f = 5 MHz; IOUT = 0 mA; CE = VIL Min Max 5 5 50 8 0.6 Units A A A mA V V V V V
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AT28BV64
AT28BV64
AC Read Characteristics
AT28BV64-30 Symbol tACC tCE tOE tDF tOH
(1) (2) (3, 4)
Parameter Address to Output Delay CE to Output Delay OE to Output Delay CE or OE High to Output Float Output Hold from OE, CE or Address, whichever occurred first
Min
Max
Units ns ns ns ns ns
300 300 0 0 0 150 60
AC Read Waveforms (1, 2, 3, 4)
Notes: 1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change without impact on tACC.
3. tDF is specified from OE or CE whichever occurs first (CL = 5 pF). 4. This parameter is characterized and is not 100% tested.
Input Test Waveforms and Measurement Level
Output Test Load
tR, tF < 20 ns
Pin Capacitance (f = 1 MHz, T = 25C) (1)
Typ CIN COUT
Note:
Max 6 12
Units pF pF
Conditions VIN = 0V VOUT = 0V
4 8
1. This parameter is characterized and is not 100% tested.
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AC Write Characteristics
Symbol tAS, tOES tAH tWP tDS tDH, tOEH tDB tWC Parameter Address, OE Set-up Time Address Hold Time Write Pulse Width (WE or CE) Data Set-up Time Data, OE Hold Time Time to Device Busy Write Cycle Time Min 10 100 150 100 10 50 3 1000 Max Units ns ns ns ns ns ns ms
AC Write Waveforms
WE Controlled
CE Controlled
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AT28BV64
AT28BV64
Data Polling Characteristics (1)
Symbol tDH tOEH tOE tWR Parameter Data Hold Time OE Hold Time OE to Output Delay
(2)
Min 10 10 0
Typ
Max
Units ns ns ns ns
Write Recovery Time
Notes: 1. These parameters are characterized and not 100% tested. 2. See AC Read Characteristics.
Data Polling Waveforms
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Ordering Information (1)
tACC (ns) 300 ICC (mA) Active Standby 8 0.05 Operating Voltage 2.7V to 3.6V Ordering Code AT28BV64-30JC AT28BV64-30PC AT28BV64-30SC AT28BV64-30TC AT28BV64-30JI AT28BV64-30PI AT28BV64-30SI AT28BV64-30TI Package 32J 28P6 28S 28T 32J 28P6 28S 28T Operation Range Commercial (0C to 70C)
8
0.05
2.7V to 3.6V
Industrial (-40C to 85C)
Note:
1. See Valid Part Number table below.
Valid Part Numbers
The following table lists standard Atmel products that can be ordered. Device Numbers
AT28BV64
Speed 30
Package and Temperature Combinations
JC, JI, PC, PI, SC, SI, TC, TI
Package Type
32J 28P6 28S 28T
32 Lead, Plastic J-Leaded Chip Carrier (PLCC) 28 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 28 Lead, 0.300" Wide, Plastic Gull Wing, Small Outline (SOIC) 28 Lead, Plastic Thin Small Outline Package (TSOP)
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AT28BV64

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