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| 6 -20 GHz Amplifier Technical Data HMMC-5618 Features * High Efficiency: 11% @ P-1dB Typical * Output Power, P-1dB: 18 dBm Typical * High Gain: 14 dB Typical * Flat Gain Response: 0.5 dB Typical * Low Input/Output VSWR: <1.7:1 Typical * Single Supply Bias: 5 volts (@ 115 mA Typical) with Optional Gate Bias The backside of the chip is both RF and DC ground. This helps simplify the assembly process and reduces assembly related performance variations and costs. The MMIC is a cost effective alternative to hybrid (discreteFET) amplifiers that require complex tuning and assembly processes. 920 x 920 m (36.2 x 36.2 mils) 10 m ( 0.4 mils) 127 15 m (5.0 0.6 mils) 80 x 80 m (3.2 x 3.2 mils) Chip Size: Chip Size Tolerance: Chip Thickness: Pad Dimensions: Description The HMMC-5618 6-20 GHz MMIC is an efficient two-stage amplifier that is designed to be used as a cascadable intermediate gain block for EW applications. In communication systems, it can be used as an amplifier for a local oscillator, or as a transmit amplifier. It is fabricated using a PHEMT integrated circuit structure that provides exceptional efficiency and flat gain performance. During typical operation, with a single 5-volt DC power supply, each gain stage is biased for Class-A operation for optimal power output with minimal distortion. The RF input and RF output has matching circuitry for use in 50 ohm environments. Absolute Maximum Ratings[1] Symbol VD1, VD2 VG1 VG2 ID1 ID2 Pin Tch TA TSTG Tmax Parameters/Conditions Drain Supply Voltage Optional Gate Supply Voltage Optional Gate Supply Voltage Drain Supply Current Drain Supply Current RF Input Power[2] Channel Temp.[3] Backside Ambient Temp. Storage Temperature Maximum Assembly Temp. Units V V V mA mA dBm C C C C -55 -65 -5 -10 Min. Max. 5.5 + 1 + 1 70 84 20 +160 +100 +150 +300 Notes: 1. Absolute maximum ratings for continuous operation unless otherwise noted. 2. Operating at this power level for extended (continuous) periods is not recommended. 3. Refer to DC Specifications/Physical Properties table for derating information. 5965-5443E 6-64 HMMC-5618 DC Specifications/Physical Properties[1] Symbol VD1, VD2 ID1 ID2 ID1 + ID2 VP1 IG1 VP2 IG2 ch-bs Tch Parameters and Test Conditions Drain Supply Voltage Stage-One Drain Supply Current (VD1 = 5 V , VG1 = Open or Ground) Stage-Two Drain Supply Current (VD2 = 5 V , VG2 = Open or Ground) Total Drain Supply Current (VD1 = VD2 = 5 V, VG1 = VG2 = Open or Ground) Optional Input-Stage Gate Supply Pinch-off Voltage (VD1 = 5 V , ID1 < 3 mA: Input Stage OFF[2]) Gate Supply Current (Input Stage OFF[2]) Optional Input-Stage Gate Supply Pinch-off Voltage (VD2 = 5 V , ID2 < 3.6 mA: Output Stage OFF[2]) Gate Supply Current (Output Stage OFF[2]) (VD2 = 5 V , VG2 = Open or Ground) Thermal Resistance[3] (Channel-to-Backside at Tch = 150C) Channel Temperature[4] (TA = 100C, MTTF = 106 hrs, VD1 = VD2 = 5 V, VG1 = VG2 = Open) Units V mA mA mA V mA V mA C/Watt C -4 Min. 3.0 Typ. 5.0 50 65 115 -2.8 0.9 -5.3 1.7 87 150 140 Max. 5.5 -7.5 Notes: 1. Backside ambient operating temperature TA = 25C unless otherwise noted. 2. The specified FET stage is in the OFF state when biased with a gate voltage level that is sufficient to pinch off the drain current. 3. Thermal resistance (in C/Watt) at a channel temperature T (C) can be estimated using his equation: (T) 87 x [T(C)+ 273] / [150C+ 273]. 4. Derate MTTF by a factor of two for every 8C above Tch. HMMC-5618 RF Specifications, TA = 25C, VD1 = VD2 = 5 V, VG1 = VG2 = Open or Ground, ZO = 50 Symbol Gain Gain S21 /T (RL in) MIN (RL out) MIN Isolation P-1dB Psat NF Parameters and Test Conditions Small Signal Gain Gain Flatness Temperature Coefficient of Gain Minimum Input Return Loss Minimum Output Return Loss Reverse Isolation Output Power @ 1 dB Gain Compression Saturated Output Power (Pin = 10 dBm) Noise Figure Units dB dB dB/C dB dB dB dBm dBm dB Typ. 14 0.5 -0.025 12 12 40 18 20 5.5 6-18 GHz 5.9-20 GHz Min. Max. Min. Max. 12 11.5 10 10 17 18.5 7 9 10 17 18.5 7 6-65 HMMC-5618 Applications The HMMC-5618 is a GaAs MMIC amplifier designed for optimum Class-A efficiency and flat gain performance from 6 GHz to 20 GHz. It has applications as a cascadable gain stage for EW amplifiers, buffer stages, LO drives, phased-array radar, and transmitter amplifiers used in commercial communication systems. The MMIC solution is a cost effective alternative to hybrid assemblies. Biasing and Operation The MMIC amplifier is normally biased with a single positive drain supply connected to both VD1 and VD2 bond pads as shown in Figure 8a. The recommended drain supply voltage is 3 to 5 volts. If desired, the first stage drain bonding pad can be biased separately to provide a small amount of gain slope control or bandwidth extension as demonstrated in Figure 2. No ground wires are required because all ground connections are made with plated throughholes to the backside of the device. Gate bias pads (VG1 and VG2) are also provided to allow adjust- ments in gain, RF output power, and DC power dissipation, if necessary. No connection to the gate pads is needed for single drain-bias operation. However, for custom applications, the DC current flowing through the input and/or output gain stage may be adjusted by applying a voltage to the gate bias pad(s) as shown in Figure 8b. A negative gate-pad voltage will decrease the drain current. The gate-pad voltage is approximately zero volts during operation with no DC gate supply. Refer to the Absolute Maximum Ratings table for allowed DC and thermal conditions. It is recommended that the RF input, RF output, and DC supply connections be made using 0.7 mil diameter gold wire. The device has been designed so that optimum performance is realized when the RF input and RF output bond-wire inductance is approximately 0.2 nH as demonstrated in Figures 4, 6, and 7. Therefore, mesh or multiple-wire bonds are not necessary. It is, however, recommended that the RF wires be as short as possible to minimize assembly related performance variations. Thermosonic wedge is the preferred method for wire bonding to the gold bond pads. Wires can be attached using a guided-wedge at an ultrasonic power level of roughly 64 dB for a duration of 76 8 msec with a stage temperature of 150 2C. For more detailed information see HP application note #999 "GaAs MMIC Assembly and Handling Guidelines." GaAs MMICs are ESD sensitive. Proper precautions should be used when handling these devices. Assembly Techniques Solder die attach using a fluxless gold-tin (AuSn) solder preform is the recommended assembly method. A conductive epoxy such as ABLEBOND(R) 71-1LM1 or ABLEBOND(R) 36-2 may also be used for die attaching provided the Maximum Thermal Ratings are not exceeded. The device should be attached to an electrically conductive surface to complete the DC and RF ground paths. The backside metallization on the device is gold. VD1 VD2 FEEDBACK NETWORK MATCHING MATCHING OUT IN MATCHING 2K 2K 2K 1K VG1 VG2 Figure 1. HMMC-5618 Simplified Schematic. 6-66 HMMC-5618 Typical Scattering Parameters[1], (TA = 25C, VD1 = VD2 = 5.0 V, VG1 = VG2 = Open, Zo = 50 Freq. S11 S21 GHz dB Mag Ang dB Mag Ang 2.0 -4.8 0.574 -140.8 -71.2 0.000 -73.5 2.5 -5.6 0.526 -166.9 -74.4 0.000 -12.0 3.0 -6.0 0.501 166.4 -73.6 0.000 -41.3 3.5 -6.2 0.492 136.2 -55.9 0.002 -51.8 4.0 -6.7 0.461 99.3 -49.4 0.003 -94.9 4.5 -8.8 0.363 60.6 -45.5 0.005 -140.6 5.0 -11.9 0.255 30.7 -43.8 0.006 -179.4 5.5 -14.4 0.190 10.9 -43.8 0.006 152.8 6.0 -15.8 0.163 -3.8 -43.4 0.007 132.6 6.5 -16.4 0.152 -16.2 -43.4 0.007 116.8 7.0 -16.3 0.153 -27.4 -43.1 0.007 101.8 7.5 -16.0 0.159 -38.0 -43.0 0.007 87.6 8.0 -15.4 0.171 -48.2 -42.8 0.007 79.1 8.5 -14.9 0.180 -58.5 -42.7 0.007 68.9 9.0 -14.5 0.189 -67.5 -42.5 0.008 58.9 9.5 -14.1 0.198 -75.8 -42.3 0.008 50.2 10.0 -13.7 0.206 -83.6 -42.0 0.008 41.0 10.5 -13.4 0.214 -91.2 -42.0 0.008 33.7 11.0 -13.2 0.219 -98.3 -42.0 0.008 27.5 11.5 -13.0 0.223 -105.1 -41.7 0.008 19.8 12.0 -13.0 0.224 -111.4 -41.3 0.009 13.9 12.5 -13.0 0.224 -117.5 -40.9 0.009 6.2 13.0 -13.1 0.221 -123.2 -40.8 0.009 1.0 13.5 -13.3 0.217 -128.7 -40.5 0.009 -6.7 14.0 -13.5 0.210 -134.1 -40.2 0.010 -12.5 14.5 -13.9 0.201 -138.9 -40.0 0.010 -17.5 15.0 -14.5 0.188 -143.4 -39.2 0.011 -25.3 15.5 -15.2 0.174 -147.2 -39.1 0.011 -31.8 16.0 -16.2 0.155 -150.0 -38.6 0.012 -38.9 16.5 -17.5 0.133 -150.7 -38.4 0.012 -45.8 17.0 -19.2 0.110 -147.8 -37.8 0.013 -52.1 17.5 -21.1 0.088 -138.0 -37.3 0.014 -60.7 18.0 -22.1 0.079 -117.7 -36.7 0.015 -69.6 18.5 -20.7 0.092 -96.6 -35.9 0.016 -74.8 19.0 -18.2 0.123 -83.9 -35.4 0.017 -85.0 19.5 -15.4 0.169 -80.3 -35.0 0.018 -95.7 20.0 -13.0 0.224 -81.8 -34.8 0.018 -105.6 20.5 -11.1 0.278 -85.7 -34.7 0.018 -114.9 21.0 -9.6 0.332 -91.2 -34.2 0.020 -126.3 21.5 -8.3 0.384 -97.7 -34.3 0.019 -137.2 22.0 -7.3 0.432 -284.7 -34.2 0.020 -328.3 Note: 1. Data obtained from on-wafer measurements. dB -43.0 -25.3 -8.0 2.9 10.4 14.2 15.4 15.6 15.6 15.6 15.5 15.5 15.4 15.4 15.3 15.2 15.2 15.1 15.1 15.0 14.9 14.9 14.9 14.8 14.8 14.8 14.8 14.8 14.8 14.8 14.8 14.7 14.7 14.5 14.3 14.0 13.7 13.2 12.5 11.7 10.8 S12 Mag 0.0070 0.0544 0.3981 1.4008 3.3208 5.1331 5.9052 6.0539 6.0319 6.0062 5.9669 5.9318 5.8635 5.8567 5.8232 5.7757 5.7385 5.7043 5.6618 5.6180 5.5801 5.5525 5.5276 5.5138 5.5069 5.4997 5.5050 5.5089 5.5103 5.5013 5.4892 5.4475 5.4016 5.3231 5.2168 5.0371 4.8240 4.5580 4.2135 3.8489 3.4671 Ang 117.3 -113.7 -124.1 -159.1 154.4 104.5 62.9 31.6 6.8 -14.1 -32.7 -49.7 -65.4 -80.0 -94.2 -107.8 -121.0 -133.8 -146.2 -158.4 -170.4 177.7 166.0 154.2 142.3 130.5 118.6 106.3 93.8 80.9 67.9 54.4 40.5 26.1 11.2 -4.3 -19.9 -36.4 -52.5 -68.9 -85.5 dB -0.9 -1.6 -3.3 -6.1 -10.3 -16.7 -23.2 -22.0 -18.9 -16.8 -15.4 -14.3 -13.5 -12.9 -12.5 -12.2 -12.0 -11.9 -11.9 -12.0 -12.2 -12.5 -12.8 -13.1 -13.5 -13.9 -14.4 -14.7 -14.9 -14.9 -14.6 -14.3 -13.7 -13.3 -13.0 -12.9 -13.0 -13.3 -13.8 -14.0 -13.4 S22 Mag 0.901 0.835 0.687 0.498 0.305 0.147 0.069 0.079 0.114 0.144 0.171 0.193 0.212 0.227 0.237 0.246 0.252 0.254 0.253 0.250 0.245 0.238 0.230 0.221 0.211 0.201 0.191 0.184 0.180 0.180 0.186 0.194 0.206 0.217 0.224 0.226 0.225 0.217 0.205 0.199 0.214 Ang -75.4 -99.7 -127.0 -156.7 171.1 133.8 76.1 21.3 -5.5 -19.6 -30.5 -39.4 -47.1 -54.4 -61.4 -67.8 -73.9 -79.6 -85.2 -90.0 -94.3 -98.2 -101.6 -104.3 -106.2 -107.1 -106.8 -105.4 -103.4 -100.3 -97.4 -95.6 -95.1 -96.0 -98.0 -99.4 -100.9 -99.8 -97.5 -90.2 -80.1 6-67 HMMC-5618 Typical Performance 20 SMALL-SIGNAL GAIN (dB) VD2 = 5.0 V, VG1 = VG2 = Open Gain 15 VD1 = 5.0 V 20 10 Spec Range 5.9 - 20 GHz 0 REVERSE ISOLATION (dB) INPUT RETURN LOSS (dB) 0 VD1 = VD2 = 5.0 V, VG1 = VG2 = Open Spec Range 5.9 - 20 GHz 0 OUTPUT RETURN LOSS (dB) VD1 = 3.0 V 10 5 Output 10 5 10 30 15 Input 20 15 5 Isolation 0 2 6 10 14 18 40 20 50 22 25 2 6 10 14 18 25 22 FREQUENCY (GHz) FREQUENCY (GHz) Figure 2. Gain and Isolation vs. Frequency.[1] Figure 3. Input and Output Return Loss vs. Frequency.[1] 20 SMALL-SIGNAL GAIN (dB) VD1 = VD2 = 5.0 V, VG1 = VG2 = Open Spec Range 5.9 - 20 GHz 0 REVERSE ISOLATION (dB) 10 VD1 = VD2 = 5.0 V, VG1 = VG2 = Open Spec Range 5.9 - 20 GHz 10 15 Gain 10 Wafer-Probed Includes 0.2 nH Measurements wire inductance 8 NOISE FIGURE (dB) 20 6 30 4 5 Isolation 0 2 6 10 14 18 40 2 50 22 0 4 8 12 16 20 FREQUENCY (GHz) FREQUENCY (GHz) Figure 4. Effects of Input/Output Bond Wire Inductance on Gain and Isolation.[2] VD1 = VD2 = 5.0 V, VG1 = VG2 = Open Figure 5. Noise Figure vs. Frequency.[1] 0 INPUT RETURN LOSS (dB) 0 OUTPUT RETURN LOSS (dB) VD1 = VD2 = 5.0 V, VG1 = VG2 = Open Spec Range 5.9 - 20 GHz Spec Range 5.9 - 20 GHz 5 Wafer-Probed Measurements 5 Wafer-Probed Measurements 10 10 15 15 20 Includes 0.2 nH wire inductance 20 Includes 0.2 nH wire inductance 25 2 6 10 14 18 22 25 2 6 10 14 18 22 FREQUENCY (GHz) FREQUENCY (GHz) Figure 6. Effects of Input/ Output Bond Wire Inductance on Input Return Loss.[2] Figure 7. Effects of Input/Output Bond Wire Inductance on Output Return Loss.[2] Notes: 1. Wafer-probed measurements. 2. Effect of 0.2 nH inductance in the RF input and RF output bond wires is modeled from measured wafer-probe tests calibrated at the pads of the MMIC device. 6-68 To VDD Power Supply Chip Capacitor (68 pF) To VDD Power Supply Chip Capacitor (68 pF) Gold Plated Shim (Optional) RFIN RFOUT Gold Plated Shim (Optional) RFIN RFOUT Bonding Island or Small Chip-Capacitor To VG1 Power Supply Figure 8a. Assembly for single drain-bias operation. Figure 8. HMMC-5618 Assembly Diagrams. To VG2 Power Supply Figure 8b. Assembly with gate bias connections. 0 920 143 355 573 VD1 VD2 530 IN OUT 530 VG1 VG2 0 0 79 593 920 0 Figure 9. HMMC-5618 Bonding Pad Positions. (Dimensions are in micrometers.) This data sheet contains a variety of typical and guaranteed performance data. The information supplied should not be interpreted as a complete list of circuit specifications. In this data sheet the term typical refers to the 50th percentile performance. For additional information contact your local HP sales representative. 6-69 |
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