 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| T he PJ324 series are low-cost , quad operational amplifiers with true differential inputs. These have several distinct advantage over standard operational amplifier types in single supply applications. The quad amplifiers can operate at supply voltages as low as 3.0V or as high as 32V with very low w w circuited protected outputs * Short w FEATURES * * * * * * * * True differential input stage Single supply operation:3.0V to 32V Low input bias currents:100nA Max Four amplifiers per package Internally compensated Common mode range extends to negative supply Industry standard pinouts ESD clamps on the inputs increase raggedness without affecting device operation .D at Sh a et e 4U . om c PJ324 Quad Low Power Operational Amplifiers quiescent currents and eliminat the necessity for external biasing components in many applications. The output voltage range also includes the negative power supply voltage. DIP -14 SOP -14 ORDERING INFORMATION MAXIMUM RATING(Ta=+25,unless otherwise noted.) Rating Power Supply Voltage Single Supply Split Supplies Input Differential Voltage Range (1) Input Common Mode Voltage Range Output Short Circuit Duration w w w .D t a S a tSC TJ e h Device t e P in: 1.Output 1 2.Input 1 (-) 3.Input 1(+) 4.Vcc 5.Input 2(+) 6.Input 2 (-) 7.Output 2 U 4 .c 8.Output 3 9.Input 3 (-) 10.Input 3 (+) 11.Vee Gnd 12.Input 4 (+) 13.Input 4 (-) 14.Output 4 m o Operating Temperature -20 to +85 Package DIP-14 SOP-14 PJ324CD PJ324CS Symbol PJ324 16 Unit Vdc VCC VCC, VEE VIDR VICR 32 -0.3 to 32 Continuous Vdc Vdc Junction Temperature Plastic Packages Storage Temperature Ceramic Package Plastic Packages NOTE : 1. Split Power Supplies. 150 T stg - 65 to + 150 w 1-7 w w .D at Sh a et e . U 4 om c 2002/01 VER.A PJ324 Quad Low Power Operational Amplifiers ELECTRICAL CHARACTERISTICS (VCC= 5.0V, VEE =GND, TA= 25 unle ss othe rwise note d.) Max Unit Input Offset Voltage mV VCC=5.0V to 30V VICR=0 V to VCC-0.7V, Vo=1.4V, Rs=0 T A=25 2.0 7.0 T A=T high to T low (Note 1) 9.0 Average Temperature Coefficient of Input Offset Voltage VIO /T 7.0 V/ T A=T hige to T low (Note 1) Input Offset Current IIO 5.0 50 nA T A=T hige to T low (Note 1) 150 Average Temperature Coefficient of Input Offset Current IIO /T 10 pA/ T A=T hige to T low (Note 1) Input Bias Current IIB -90 -250 nA T A=T hige to T low (Note 1) -500 Input Common Mode Voltage Range (Note 2) V VICR VCC=30V 0 28.3 VCC=30V, T A=T hige to T low 0 28 Differential Input Voltage Range VIDR VCC V Large Signal Open-Loop Voltage Gain AVOL V/mV R L =2.0K, VCC=15V, for Large Vo Swing 25 100 T A=T hige to T low (Note 1) 15 Channel Separation CS -120 dB 10KHzf20KHz, Input Referenced Common Mode Rejection CMR 65 70 dB Rs10K Power Supply Rejection PSR 65 100 dB Output Voltage - High Limit ( T A=T hige to T low ) (Note 1) VOH V VCC=5.0V, R L =10K,T A=25 3.3 3.5 VCC=30V, R L =2.0K 26 VCC=30V, R L =10K 27 28 Output Voltage-Low Limit VOL 5.0 20 mV VCC=5.0V, R L =10K, T A=T hige to T low (Note 1) Output Source Current (VID=+1.0V, VCC=15V) IO+ mA T A=25 20 40 T A=T hige to T low (Note 1) 10 20 Io Output Sink Current mA (VID= -1.0V, VCC=15V) T A=25 10 20 T A=T hige to T low (Note 1) 5.0 8.0 (VID= -1.0V, VCC=200mV, T A=25) 12 50 A Output Short Circuit Ground (Note 2) Isc 40 60 mA Power Supply Current (T A=T hige to T low ) (Note 1) Icc mA VCC=30V (26V for LM2902), Vo=0V, R L = 3.0 VCC=5.0V, Vo=0V, R L = 1.2 Note: 1. Short circuits from the output to Vcc can cause excessive heating and eventual destruction . Destructive dissipation can result from simultaneous shorts on all amplifiers. 2. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V The upper end of the common mode voltage range is Vcc-1.7V. Characteristics Symbol VIO Min PJ324 Typ 2-7 2002/01 VER.A PJ324 Quad Low Power Operational Amplifiers Re pre se ntative Circuit Sche matic (O ne -Fourth of Circuit Shown) CIRCUIT DESCRIPTION T he PJ324 series is made using four internally compensated, two-stage operational amplifiers. T he first stage of each consists of differential input devices Q20 and Q18 with input buffer transistors Q21 and Q17 and the differential to single ended converter Q3 and Q4 . T he first stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance a smaller compensation capacitor (only 5.0pF ) can be employed , thus saving chip area. T he transconductance reduction is accomplished by splitting the collectors of Q20 and Q18 . Another feature of this input stage is that the input common mode range can include the negative supply or ground, in single supply operation without saturating either the input devices or the differential to single-ended converter . T he second stage consists of a standed current source load amplifier stage. Large Signal Voltage Followe r Re sponse Each amplifier is biased from an internal voltage regulator which has a low temperature coefficient thus giving each amplifier good temperature characteristics as will as excellent power supply rejection. 3-7 2002/01 VER.A PJ324 Quad Low Power Operational Amplifiers Figure 1.Input Voltage Range Figure 2.Open-Loop Frequency Figure 3.Large-Signal Frequency Response Figure 4.Small-Signal Voltage Follower Pulse Response (Noninverting) Figure 5.Power Supply Current versus Power Supply Voltage Figure 6.Input Bias Current versus Power Supply Voltage 4-7 2002/01 VER.A PJ324 Quad Low Power Operational Amplifiers Figure 7.Voltage Reference Figure 8.Wlen Bridge Oscillator PJ324 fo = 1/2RC Vo = 2.5V (1+ R1/ R2) For: fo =1.0KHz R=16K C =0.01F Figure 9.High Impedance Differential Amplifier Figure 10.Comparator with Hysteresis PJ324 PJ324 PJ324 PJ324 VinL = R1/R1 + R2 VinH = R1 /R1 + R2 e o =C (1+a+b) (e2- e1) H = R1/R1 + R2 (VOH -VOL ) (VOL-Vref ) +Vref (VOH -Vref ) +Vref Figure 11.Bi-Q uad Filte r fo = 1/2RC R1 = OR R2 = R1/ TBP R3 =TNR2 C1 =10C Vref = 1/2 PJ324 PJ324 For : fo =1.0 Khz Q =10 TBP =1 TN =1 R =160 K C =0.001F R1 =1.6M R2 =1.6M R3 =1.6M Where : TBP =Center Frequency Gain TN = P assband Notch Gain 5-7 2002/01 VER.A PJ324 Quad Low Power Operational Amplifiers Figure 12.Function Ge ne rator Figure 13.Mulitiple Fe e dback Bandpass Filte r PJ324 PJ324 P J324 f= R1+R2/ 4CRfR1 R3=R2R1/ R2+R1 Given: fo=center frequency A(fo)=gain at center frequency Choose value fo C Then: R3= Q/ fo C R1= R3/2Afo R2=R1R3/4Q2R1-R3 For less than 10% error operational amplifier Qofo<0.1 where fo and BW are expressed in Hz BW If source impedance varies, filter may be preceded with voltage follow buffer to stabilize filter parameters. 6-7 2002/01 VER.A PJ324 Quad Low Power Operational Amplifiers DIM A B C D G J K L M MILLIMETERS MIN MAX 18.55 19.56 6.22 6.48 3.18 4.43 0.35 0.55 2.54BSC 0.29 0.31 3.25 3.35 7.75 8.00 10 INCHES MIN MAX 0.73 0.77 0.245 0.255 0.125 0.135 0.019 0.020 0.10BSC 0.011 0.012 0.128 0.132 0.305 0.315 10 DIM A B C D F G K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27BSC 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.05BSC 0.004 0.009 0 7 0.229 0.244 0.010 0.019 7-7 2002/01 VER.A |
Price & Availability of PJ324
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |