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| 5-V Low-Drop Voltage Regulator TLE 4290 Features * * * * * * * * Output voltage 5 V 2% Very low current consumption 450 mA current capability Power Good Feature Very low-drop voltage Short-circuit-proof Reverse polarity proof Suitable for use in automotive electronics Ordering Code Q67006-A9408 Q67000-A9407 Package P-TO252-5-1 (SMD) P-TO263-5-1 (SMD) P-TO220-5-11 P-TO263-5-1 P-TO252-5-1 Type * TLE 4290 D * TLE 4290 * New type * TLE 4290 G Q67006-A9405 Functional Description The TLE 4290 is a monolithic integrated low-drop voltage regulator which can supply loads up to 450 mA with power good feature. An input voltage up to 42 V is regulated to VQ,nom = 5.0 V. The device is designed to supply -controllers in the severe environment of automotive applications. Therefore it is protected against overload, short circuit and over temperature conditions. Of course the TLE 4290 can been used also in all other applications, where a stabilized 5 V voltage is required. P-TO220-5-11 Data Sheet Rev. 1.4 1 2001-10-18 TLE 4290 Power Good The Power Good PG pin informs e.g. the microcontroller in case the output voltage has fallen below the lower threshold VQ,pgt-d of typ. 3.65 V. Connecting the regulator to a battery voltage at first the power good signal remains LOW. When the output voltage has reached the higher threshold VQ,pgt-i the power good output remains still LOW for the power good delay time trd. Afterwards the power good output turns HIGH. The delay time can be set by the user with an external capacitor at pin D according to the requirements of the application. The Power Good circuitry supervises the output voltage. In case VQ falls below the lower Power Good switching threshold VQ,pgt-d the PG output is set LOW after the Power Good reaction time. The Power Good LOW signal is generated down to an output voltage VQ to 1 V. A LOW signal at the Power Good pin informs that the battery was lost and memory is no longer valid. The feature should be used in combination with a microcontroller with internal reset. TLE 4290 I 1 5 Q BandGapReference Current and Saturation Control 2 Power Good Control PG 4 GND D AEB02823 Figure 1 Block Diagram Data Sheet Rev. 1.4 2 2001-10-18 TLE 4290 P-TO252-5-1 (D-PAK) GND P-TO263-5-1 (SMD) P-TO220-5-11 I PG DQ AEP02825 I PG GND D Q AEP02827 I PG GND D Q AEP02826 Figure 2 Pin Configuration (top view) Pin Definitions and Functions Pin No. Symbol Function 1 2 3 4 5 I PG GND D Q Input; block to ground directly at the IC with a ceramic capacitor. Power Good; open collector output. Add a pull up resistor of > 5 k to pin Q. Ground; Pin 3 internally connected to heatsink. Delay; connect a capacitor to GND for setting power good delay time. Output; block to ground with a capacitor, C 22 F ESR < 5 at 10 kHz. Data Sheet Rev. 1.4 3 2001-10-18 TLE 4290 Absolute Maximum Ratings Parameter Symbol Limit Values min. Input I Voltage Current Output Q Voltage Current Power Good Output PG Voltage Current Delay D Voltage Current Temperature Junction temperature Storage temperature max. Unit Test Condition VI II - 42 - 45 - V - - Internally limited VQ IQ - 1.0 - 16 - V - - Internally limited VPG IPG - 0.3 -5 25 5 V mA - - VD ID - 0.3 -2 7 2 V mA - - Tj Tstg - 40 - 50 150 150 C C - - Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Data Sheet Rev. 1.4 4 2001-10-18 TLE 4290 Operating Range Parameter Input voltage Junction temperature Thermal Resistance Junction case Junction ambient Junction ambient Junction ambient 1) Symbol Limit Values min. max. 42 150 5.5 - 40 Unit Remarks VI Tj V C - - area 300 mm2 K/W TO220 Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 x 80 x 1.5 mm3, heat sink Rthj-c Rthj-a Rthj-a Rthj-a - - - - 4 53 78 65 K/W - K/W TO2631) K/W TO2521) Note: In the operating range, the functions given in the circuit description are fulfilled. Data Sheet Rev. 1.4 5 2001-10-18 TLE 4290 Characteristics VI = 13.5 V; - 40 C < Tj < 150 C (unless otherwise specified) Parameter Symbol Limit Values min. typ. Output Output voltage Output voltage Output current limitation Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Drop voltage Load regulation Line regulation Power supply ripple rejection Temperature output voltage drift Output Capacitor max. Unit Measuring Condition VQ VQ IQ Iq Iq Iq Iq Vdr VQ, lo VQ, li PSRR dV Q ---------dT CQ 4.9 4.9 450 - - - - - - 30 - 15 - - 22 5.0 5.0 700 200 200 5 12 250 15 5 60 0.5 - 5.1 5.1 - 230 255 12 25 500 30 15 - - - V V mA 5 mA < IQ < 400 mA; 6 V < VI < 28 V 5 mA < IQ < 200 mA; 6 V < VI < 40 V 1) A A mA mA mV mV mV dB IQ = 1 mA; Tj = 25 C IQ = 1 mA; Tj 85 C IQ = 250 mA IQ = 400 mA IQ = 300 mA Vdr = VI - VQ1) VI = 6 V; IQ = 5 mA to 400 mA Vl = 8 V to 32 V; IQ = 5 mA fr = 100 Hz; Vr = 0.5 Vpp mV/K - F ESR < 5 in the operation range Power Good Output PG and Delay Timing D Power Good switching threshold VQ,pgt-i 4.45 4.65 4.80 V VQ increasing Data Sheet Rev. 1.4 6 2001-10-18 TLE 4290 Characteristics (cont'd) VI = 13.5 V; - 40 C < Tj < 150 C (unless otherwise specified) Parameter Power Good switching threshold Power Good output low voltage Power Good output leakage current Power Good charging current Upper timing threshold Symbol Limit Values min. typ. max. 3.80 0.4 2 9 2.2 1.10 22 2.0 V V 3.50 - - 3 1.5 0.60 10 0.2 3.65 0.2 0 6 1.8 0.85 16 0.5 Unit Measuring Condition VQ,pgt-d VPGL IPGH ID,c VQ decreasing RPG 5 k; VQ > 1 V VPG > 4.5 V VD = 1 V - - A A V V ms VDU VDL Lower timing threshold trd Power Good delay time Power Good reaction time trr 1) s CD = 47 nF CD = 47 nF Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V. Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at Ta = 25 C and the given supply voltage. II VI CI1 1000 F I CI2 100 nF 1 5 Q IQ CQ 22 F RPG TLE 4290 5k ID ID,C VQ D 4 GND 2 PG CD 47 nF VPG IGND AES02824 Figure 3 Test Circuit Data Sheet Rev. 1.4 7 2001-10-18 TLE 4290 Application Information TLE 4290 CQ1 CQ2 5Q 22 F 100 nF -Controller VBAT CI1 I1 CI2 BandGapReference Current and Saturation Control VCC RPG 5k Internal Reset 2 Power Good Control PG NMI / PORT 4 GND D CD 47 nF AES02822 Figure 4 Input, Output Application Diagram An input capacitor is necessary for damping line influences. A resistor of approx. 1 in series with CI, can damp the LC of the input inductivity and the input capacitor. The TLE 4290 requires an output capacitor of at least 22 F with an ESR below 5 for stability. Power Good The Power Good pin informs e.g. the micro-controller in case the output voltage has fallen below a threshold of typ. 3.65 V. When the battery voltage is supplied the Power Good signal indicates a loss of memory due to missing power. After the Memory Good switching threshold is reached the Power Good output remains low for the Power Good delay time. This time can be set by the user with an external capacitor at pin D according to the requirements of the application, e.g. the time until the microcontroller is initialized and ready to receive any information. Data Sheet Rev. 1.4 8 2001-10-18 TLE 4290 The power good circuit supervises the output voltage. In case VQ falls below the Power Good switching threshold the Power Good output PG is set LOW after the power good reaction time. The power good LOW signal is generated down to an output voltage VQ to 1 V. A LOW signal at the power good pin informs that the battery was lost and memory is no longer valid. The feature should only be used in combination to a microcontroller with internal reset. For the power good delay time after the output voltage of the regulator is above the reset threshold, the reset signal is set High again. The reset delay time is defined by the reset delay capacitor CD at pin D. The Power Good delay time is defined by the charging time of an external delay capacitor CD. CD= (trd x ID,c) / V With CD trd V ID,c Power Good delay capacitor Power Good delay time = VDU, typical 1.8 V Charge current typical 6 A V VQ < t rr V Q,pgt_i V Q,pgt_d d V D, c = dt CD VDU V DL t rd t rr VD V PG Power-on Power Good Signal Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output AED03074 Figure 5 Power Good Timing Data Sheet Rev. 1.4 9 2001-10-18 TLE 4290 The power good reaction time trr is the time it takes the voltage regulator to set power good output PG LOW after the output voltage has dropped below the power good switching threshold. It is typically 0.5 s for delay capacitor of 47 nF. For other values for CD the reaction time can be estimated using the following equation: trr = 10 ns/nF x CD The Power Good output is an open collector output. It requires externally a pull up resistor of at least 5 k to Q. Typical Performance Characteristics Output Voltage VQ versus Temperature Tj 5.2 V 5.1 AED03033 Output Voltage VQ versus Input Voltage VI 12 VQ V 10 AED01929 VQ VI = 13.5 V 5.0 8 4.9 6 R L = 25 4.8 4 4.7 2 4.6 -40 0 40 80 120 C 160 0 0 2 4 6 Tj 8 V 10 V Data Sheet Rev. 1.4 10 2001-10-18 TLE 4290 Output Current IQ versus Temperature Tj 1200 mA 1000 AED03034 Output Current IQ versus Input Voltage VI 1.2 AED03046 IQ IQ A 1.0 800 0.8 600 0.6 400 0.4 T j = 125 C 25 C 200 0.2 0 -40 0 40 80 120 C 160 0 0 10 20 30 40 V 50 Tj VI Current Consumption Iq versus Output Current IQ; Tj = 25 C 2.4 AED03112 Current Consumption Iq versus Output Current IQ q 80 mA 70 60 AED03035 q mA 2.0 1.6 50 1.2 V = 13.5 V 0.8 40 30 V = 13.5 V 20 0.4 10 0 0 20 40 60 80 mA 120 0 0 100 200 300 400 mA 600 Q Q Data Sheet Rev. 1.4 11 2001-10-18 TLE 4290 Drop Voltage Vdr versus Output Current IQ 800 mV 700 600 500 400 300 200 100 0 mA AED01935 Charge Current ID,c versus Temperature Tj 8 ID, c A 7 6 5 4 3 2 1 AED03036 Vdr T j = 125 C 25 C VI = 13.5 V VD = 1 V 0 200 400 600 1000 0 -40 0 40 80 120 C 160 IQ Tj Upper Timing Threshold VDU versus Temperature Tj V DU 4.0 mA 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -40 AED03037 V = 13.5 V 0 40 80 120 C 160 Tj Data Sheet Rev. 1.4 12 2001-10-18 TLE 4290 Package Outlines P-TO252-5-1 (D-PAK) (Plastic Transistor Single Outline) 2.3 +0.05 -0.10 B A 1 0.1 0...0.15 0.9 +0.08 -0.04 6.5 +0.15 -0.10 1 0.1 5.4 0.1 9.9 0.5 6.22 -0.2 0.8 0.15 (4.17) 0.15 max per side 0.51 min 5x0.6 0.1 1.14 0.5 +0.08 -0.04 0.1 4.56 0.25 M AB GPT09161 All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information" SMD = Surface Mounted Device Data Sheet Rev. 1.4 13 Dimensions in mm 2001-10-18 TLE 4290 P-TO263-5-1-1 (SMD) (Plastic Transistor Single Outline) 10 0.2 9.8 0.15 A 8.5 1) 1.27 0.1 B 0.1 2.4 4.4 10.3 0.05 (15) 9.25 0.2 7.55 1) 0...0.15 5x0.8 0.1 4x1.7 4.7 0.5 2.7 0.3 0.5 0.1 8 max. 1) Typical All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information" SMD = Surface Mounted Device Data Sheet Rev. 1.4 14 Dimensions in mm 2001-10-18 gpt09113_malac 0.25 M AB 0.1 TLE 4290 P-TO220-5-11 (Plastic Transistor Single Outline) 10 0.2 9.8 0.15 8.5 1) 3.7-0.15 4.4 1.27 0.1 A 15.65 0.3 12.95 1) 170.3 2.8 0.2 0.05 8.6 0.3 10.2 0.3 C 0...0.15 3.70.3 9.25 0.2 0.5 0.1 3.9 0.4 0.8 0.1 1.7 0.25 M 2.4 AC 8.4 0.4 1) Typical All metal surfaces tin plated, except area of cut. gpt09064_ma Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information" Dimensions in mm Data Sheet Rev. 1.4 15 2001-10-18 TLE 4290 Data Sheet Rev. 1.4 16 2001-10-18 TLE 4290 Data Sheet Rev. 1.4 17 2001-10-18 TLE 4290 Edition 2001-10-18 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 Munchen, Germany (c) Infineon Technologies AG 2001. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet Rev. 1.4 18 2001-10-18 |
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