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NC7WZ132 TinyLogic UHS Dual 2-Input NAND Gate with Schmitt Trigger Inputs April 2000 Revised April 2003 NC7WZ132 TinyLogic UHS Dual 2-Input NAND Gate with Schmitt Trigger Inputs General Description The NC7WZ132 is a dual 2-Input NAND Gate from Fairchild's Ultra High Speed Series of TinyLogic. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V VCC operating range. The inputs and output are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V independent of VCC operating voltage. Schmitt trigger inputs achieve typically 1V hysteresis between the positive-going and negative-going input threshold voltage at 5V VCC. Features s Space saving US8 surface mount package s MicroPak leadless package s Ultra High Speed; tPD 3.1 ns typ into 50 pF at 5V VCC s High Output Drive; 24 mA at 3V VCC s Broad VCC Operating Range; 1.65V to 5.5V s Matches the performance of LCX when operated at 3.3V VCC s Power down high impedance inputs/output s Overvoltage tolerant inputs facilitate 5V to 3V translation s Patented noise/EMI reduction circuitry implemented s Schmitt trigger inputs are tolerant of slow changing input signals Ordering Code: Product Order Number NC7WZ132L8X (Preliminary) Package Number MAC08A Code Top Mark WZD2 T5 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel Package Description Supplied As NC7WZ132K8X MAB08A TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPak is a trademark of Fairchild Semiconductor Corporation. (c) 2003 Fairchild Semiconductor Corporation DS500274 www.fairchildsemi.com NC7WZ132 Logic Symbol IEEE/IEC Connection Diagrams Pin Descriptions Pin Names An , Bn Yn Description Inputs Output (Top View) Pin One Orientation Diagram Function Table Y = AB Inputs A L L H H H = HIGH Logic Level AAA represents Product Code Top Mark - see ordering code Output B L H L H Y H H H L Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram). Pad Assignments for MicroPak L = LOW Logic Level (Top Thru View) www.fairchildsemi.com 2 NC7WZ132 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) DC Input Diode Current (IIK) @VIN < -0.5V DC Output Diode Current (IOK) @VOUT < -0.5V DC Output Current (IOUT) DC VCC/GND Current (ICC/IGND) Storage Temperature (TSTG) Junction Temperature under Bias (TJ) Junction Lead Temperature (TL); (Soldering, 10 seconds) Power Dissipation (PD) @ +85C 260C 250 mW -0.5V to +7V -0.5V to +7V -0.5V to +7V -50 mA -50 mA 50 mA 100 mA -65C to +150C 150C Recommended Operating Conditions (Note 2) Supply Voltage Operating (VCC) Supply Voltage Data Retention (VCC) Input Voltage (VIN) Output Voltage (VOUT) Operating Temperature (TA) Thermal Resistance (JA) 1.65V to 5.5V 1.5V to 5.5V 0V to 5.5V 0V to VCC -40C to +85C 250C/W Note 1: Absolute maximum ratings are DC values beyond which the device may be damaged or have its useful life impaired. The datasheet specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside datasheet specifications. Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VP Parameter Positive Threshold Voltage VCC (V) 1.65 2.3 3.0 4.5 5.5 VN Negative Threshold Voltage 1.65 2.3 3.0 4.5 5.5 VH Hysteresis Voltage 1.65 2.3 3.0 4.5 5.5 VOH HIGH Level Output Voltage 1.65 2.3 3.0 4.5 1.65 2.3 3.0 3.0 4.5 VOL LOW Level Output Voltage 1.65 2.3 3.0 4.5 1.65 2.3 3.0 3.0 4.5 IIN IOFF Input Leakage Current Power Off Leakage Current 0 to 5.5 0.0 Min 0.6 1.0 1.3 1.9 2.2 0.2 0.4 0.6 1.0 1.2 0.15 0.25 0.4 0.6 0.7 1.55 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8 TA = +25C Typ 0.99 1.39 1.77 2.49 2.96 0.53 0.78 1.02 1.48 1.76 0.46 0.61 0.75 1.01 1.20 1.65 2.3 3.0 4.5 1.52 2.15 2.80 3.68 4.20 0.0 0.0 0.0 0.0 0.08 0.10 0.15 0.22 0.22 0.10 0.10 0.10 0.10 0.24 0.3 0.4 0.55 0.55 0.1 1 Max 1.4 1.8 2.2 3.1 3.6 0.9 1.15 1.5 2.0 2.3 0.9 1.1 1.2 1.5 1.7 TA = -40C to +85C Min 0.6 1.0 1.3 1.9 2.2 0.2 0.4 0.6 1.0 1.2 0.15 0.25 0.4 0.6 0.7 1.55 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8 0.10 0.10 0.10 0.10 0.24 0.3 0.4 0.55 0.55 1 10 A A V IOL = 4 mA IOL = 8 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA VIN = 5.5V, GND VIN or VOUT = 5.5V V VIN = VIH IOL = 100 A V IOH = -4 mA IOH = -8 mA IOH = -16 mA IOH = -24 mA IOH = -32 mA V VIN = VIL IOH = -100 A Max 1.4 1.8 2.2 3.1 3.6 0.9 1.15 1.5 2.0 2.3 0.9 1.1 1.2 1.5 1.7 V V V Units Conditions 3 www.fairchildsemi.com NC7WZ132 DC Electrical Characteristics Symbol ICC Parameter Quiescent Supply Current VCC (V) 1.65 to 5.5 (Continued) TA = +25C TA = -40C to +85C Max 1 Min Max 10 A VIN = 5.5V, GND Units Conditions Min Typ AC Electrical Characteristics Symbol tPLH, tPHL Parameter Propagation Delay VCC (V) 1.8 0.15 2.5 0.2 3.3 0.3 5.0 0.5 tPLH, tPHL CIN CPD Input Capacitance Power Dissipation Capacitance Propagation Delay 3.3 0.3 5.0 0.5 0 3.3 5.0 Min 3.0 2.0 1.2 0.8 1.8 1.2 TA = +25C Typ 7.1 4.5 3.4 2.6 4.0 3.1 2.5 15 18 Max 13.0 7.5 5.0 3.8 5.8 4.5 TA = -40C to +85C Min 3.0 2.0 1.2 0.8 1.8 1.2 Max 13.5 8.0 5.5 4.2 6.3 4.9 ns pF pF (Note 3) Figure 2 CL = 50 pF, RL = 500 Figures 1, 3 ns CL = 15 pF, RL = 1 M Figures 1, 3 Units Conditions Figure Number Note 3: C PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD ) at no output loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD)(VCC)(fIN) +(ICCstatic). AC Loading and Waveforms CL includes load and stray capacitance Input PRR = 1.0 MHz; tw = 500 ns FIGURE 1. AC Test Circuit FIGURE 3. AC Waveforms Input = AC Waveform; tr = tf = 1.8 ns; PRR = 10 MHz; Duty Cycle = 50% FIGURE 2. ICCD Test Circuit www.fairchildsemi.com 4 NC7WZ132 Tape and Reel Specification Tape Format for US8 Package Designator K8X Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) Tape Section Leader (Start End) Number Cavities 125 (typ) 3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed Tape Format for MicroPak Package Designator L8X Carrier Tape Section Number Cavities 125 (typ) 3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed Leader (Start End) Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) 5 www.fairchildsemi.com NC7WZ132 Tape and Reel Specification REEL DIMENSIONS inches (millimeters) (Continued) Tape Size 8 mm A 7.0 (177.8) B 0.059 (1.50) C 0.512 (13.00) D 0.795 (20.20) N 2.165 (55.00) W1 0.331 + 0.059/-0.000 (8.40 + 1.50/-0.00) W2 0.567 (14.40) W3 W1 + 0.078/-0.039 (W1 + 2.00/-1.00) www.fairchildsemi.com 6 NC7WZ132 Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package Number MAB08A 7 www.fairchildsemi.com NC7WZ132 TinyLogic UHS Dual 2-Input NAND Gate with Schmitt Trigger Inputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead MicroPak, 1.6 mm Wide Package Number MAC08A (Preliminary) Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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