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| 9-BIT BUFFER SY100S322 FEATURES s Max. propagation delay of 700ps s IEE min. of -55mA s Extended supply voltage option: VEE = -4.2V to -5.5V s Voltage and temperature compensation for improved noise immunity s Internal 75K input pull-down resistors s 70% faster than Fairchild 300K at lower power s Function and pinout compatible with Fairchild F100K s Available in 24-pin CERPACK and 28-pin PLCC packages DESCRIPTION The SY100S322 is an ultra-fast buffer designed for use in high-performance ECL systems. The device provides nine non-inverting buffers with single-ended outputs. The inputs on the device have 75K pull-down resistors. PIN CONFIGURATIONS D4 VCCA VEES O4 O5 O6 4 3 2 1 28 27 26 D5 D6 D7 VEE VEES VCCA 12 13 14 15 16 17 18 11 10 9 8 7 6 5 O7 O8 VCCA VCC VCC O9 O1 Top View PLCC J28-1 BLOCK DIAGRAM D8 D9 19 20 21 22 23 24 25 D2 D3 VEES VCCA O3 D1 O2 D1 D2 D3 D4 D5 D6 D7 D8 D9 O1 O2 O3 O4 O5 O6 O7 O8 O9 VCCA VEE D9 D8 D7 D1 D2 D3 VCCA O3 O2 1 2 3 4 5 6 24 23 22 21 20 19 18 Top View Flatpack F24-1 17 16 15 14 D6 D5 D4 VCCA O4 O5 O6 13 7 8 9 10 11 12 O1 O9 VCC VCCA O8 O7 PIN NAMES Pin D1 - D9 O1 - O9 VEES VCCA Data Inputs Data Outputs VEE Substrate VCCO for ECL Outputs Function Rev.: G Amendment: /0 1 Issue Date: July, 1999 Micrel SY100S322 LOGIC EQUATION On = Dn, n = 1 to 9 DC ELECTRICAL CHARACTERISTICS VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND Symbol IIH IEE Parameter Input HIGH Current Power Supply Current Min. -- -55 Typ. -- -41 Max. 200 -25 Unit A mA Condition VIN = VIH (Max.) Inputs Open AC ELECTRICAL CHARACTERISTICS CERPACK VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND TA = 0C Symbol tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Transition Time 20% to 80%, 80% to 20% Min. 300 300 Max. 800 900 TA = +25C Min. 300 300 Max. 800 900 TA = +85C Min. 300 300 Max. 800 900 Unit ps ps Condition PLCC VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND TA = 0C Symbol tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Transition Time 20% to 80%, 80% to 20% Min. 300 300 Max. 700 900 TA = +25C Min. 300 300 Max. 700 900 TA = +85C Min. 300 300 Max. 700 900 Unit ps ps Condition 2 Micrel SY100S322 TIMING DIAGRAM 0.7 0.1 ns INPUT 0.7 0.1 ns -0.95V 80% 50% 20% -1.69V tPHL tPLH 80% 50% 20% tTLH tTHL OUTPUT Propagation Delay and Transition Times NOTE: VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND PRODUCT ORDERING CODE Ordering Code SY100S322FC SY100S322JC SY100S322JCTR Package Type F24-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial 3 Micrel SY100S322 24 LEAD CERPACK (F24-1) Rev. 03 4 Micrel SY100S322 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 5 |
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