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Ordering number : EN*6145
Bi-CMOS IC
LV2151V
2.0 GHz PLL Frequency Synthesizer IC
Preliminary Overview
The SANYO LV2151V is a 2.0 GHz PLL frequency synthesizer IC that features low-voltage operation and low current drain and is suitable for CATV, DAB, and mobile phone systems.
Package Dimensions
unit: mm 3179A-SSOP20
[LV2151V]
20 11
1.0 4.4 1.6max 0.15 0.43 0.1
Features
* A wide range of operating frequency from 0.2 to 2.0 GHz * I 2C bus/ 3-wire bus selective. (For I 2C bus WRITE mode only) * Includes three ports for band switch * Includes unlock detect indicator. * Battery saving mode * 2.7V to 3.5 V operation * Small package 20-pin SSOP ( Lead pitch 0.65mm)
1
6.7
10
0.22
0.65
SANYO: SSOP20
Pin Assignment
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
30499RM (OT) No. 6145-1/10
0.5
6.4
LV2151V
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Maximum input voltage Maximum output voltage Maximum output current1 Maximum output current2 Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Vin max Vout max IOUT max1 IOUT max2 Pd max Topr Tstg VCC, VCP SCL(CL), SDA(DI) CE, PS, RST, BUSSW LD, PORT1 to 3, SDA(DI) PORT1 to 3, SDA(DI) LD Ta 85C Pin Conditions Ratings 4.5 -0.3 to VCC + 0.3 -0.3 to VCC + 0.3 4 0.7 50 -30 to +85 -50 to +125 Unit V V V mA mA mW C C
Operating Conditions at Ta = 25C
Parameter Recommended power supply voltage Operating voltage range Symbol VCC VCCOP VCC, VCP VCC, VCP 2.7 Pin Ratings min typ 3.0 3.5 max Unit V V
Allowable Operating Ranges at Ta = -30 to +85C
Parameter Supply voltage High-level input voltage Symbol VCC VIH Pin VCC, VCP SCL(CL), SDA(DI), CE, PS, RST, BUSSW SCL(CL), SDA(DI), CE, PS, RST, BUSSW XIN PI XIN PI XIN, XOUT AC Coupled * AC Coupled * Conditions Ratings min 2.7 VCC*0.7 typ max 3.5 VCC Unit V V
Low-level input voltage Input frequency
VIL fin(1) fin(2)
0 4 0.2 -12 -12 4
0.6 22 2.0 10 0 22
V MHz GHz dBm dBm MHz
Input amplitude
Vin(1) Vin(2)
Guaranteed crystal oscillation Note: *50 terminate (0 dBm = 0.224 Vrms)
Xtal
Electrical Characteristics at Ta = 25C, VCC = 3.0 V
Parameter Low-level output voltage1 Low-level output voltage2 Output off leak current CP Output off leak current CP output current High-level input current1 High-level input current2 Low-level input current1 Low-level input current2 Supply current Standby current Symbol VOL1 VOL2 I OFF I OFCP Icp IH1 IH2 IL1 IL2 Icco Isb LD Pin Conditions IO = 0.5 mA VO = 3.0 V VO = 1.5 V VO = 1.5 V Vi = 3.0 V 3 Vi = 0 V 3 *1 Power saving mode 7.0 0.4 5 6.5 5 Ratings min typ max 0.4 0.4 1 100 Unit V V A nA mA A A A A mA mA
SDA(DI), PORT1 to 3 IO = 3.0 mA LD, PORT1 to 3 CP CP SCL(CL), SDA(DI), CE, PS, RST, BUSSW XIN SCL(CL), SDA(DI), CE, PS, RST, BUSSW XIN VCC + VCP No signal input
Note: *PI = 2000 MHz, Vpi = 0 dBm, RI = 19.2 MHz, Vri = 0 dBm Other input pins = 0 V, I/O pins = open, CP off, output pins = high
No. 6145-2/10
LV2151V Pin Descriptions
Pin 1 20 Symbol XIN XOUT CMOS input I/O Crystal oscillator connection pins. Power saving switch. 2 PS CMOS input with a pull-down resistor built in. "Open or Low": "High": 3 4 5 6 7 8 VSS CP-GND CP VCP VCC GND BIP output Power saving mode Active mode Description
Ground pin for logic system Ground pin for charge pump. (Fixed current output) Charge pump output. (Fixed current output) VCC supply for charge pump. VCC supply. (Except charge pump circuit) Ground pin for RF block. Reset pin for I2C bus.
9
RST
CMOS input with a pull-up resistor built in.
Connect capacitor to GND. "Open or High" "Low" Release Reset
10
PI
Bipolar input
Comparator signal input. VCO output must be AC coupled to input. Serial data select input. I2C bus 3-wire bus
11
BUSSW
CMOS input with a pull-up resistor built in.
"Open or High" "Low"
12 13 14 15 16 17 18 19
SCL(CL) SDA(DI) CE LD PORT1 PORT2 PORT3 BUF Bipolar output NPN transistor open collector output CMOS input
Data input pins CE is used as an address selector pin if I2C bus is used. PLL unlock detector output pin.
Output port pins for band switch.
Buffer output pin for crystal oscillator.
No. 6145-3/10
LV2151V Data Format (1) 3-Wire Bus (BUSSW pin set low.)
1. Programmable Counter and Test Mode ADD latch address data must be set to 1.
2. Reference Counter and Other Control ADD latch address data must be set to 0
Serial Data Timing
t1, t2, t3, t4, t5 100 ns
No. 6145-4/10
LV2151V (2) I2C bus BUSSW pin set open or high. Address Byte
CE pin is high when the data is set to 1. CE pin is low when the data is set to 0. 1. Programmable Counter and Testing Mode
2. Reference Counter and Other Control
Receiving Data Diagrams
No. 6145-5/10
LV2151V Serial Data Description (1) Programmable Counter and Test Mode Bit "ADD(Latch Address Data)" = 1
1. Programmable Counter Bits P0 to P16 determine programmable divider ratios. Binary value with P0 as the LSB. The division ratio can be set in the range of 4032 to 131071. Ex. Settable division ratio factor is 8192
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
2. Test Mode TS0 and TS1 are testing bits. These bits must normally be set to 0. (2) Reference Counter and Other Control ADD is the latch address bit. This bit must be set to 0.
1. Reference Counter Bits R0 to R11 determine programmable divider ratios. Binary value with R0 as the LSB. The division ratio can be set in the range of 20 to 4095. Ex. Settable division ratio factor is 2048 ("*" = Don't care)
0
*
*
*
*
*
*
*
1
0
0
0
0
0
0
0
0
0
0
0
2. Phase Comparator Output Control Bit CPD is phase comparator polarity switching data.
CPD 0 1 Phase comparator polarity (1) Shown Fig.1 (2) Shown Fig.1
Fig.1 3. Unlock Detection Control ULD is used to control the signal length which determines whether or not the PLL is locked. PLL is determined as unlocked if a phase error signal longer than that in the table below is detected.
ULD 0 1 Thresholds 4/fXIN 8/fXIN fXIN = 10.24 MHz 390 ns 780 ns
No. 6145-6/10
LV2151V 4. Unlock Output Signal Extension Control UE0 and UE1 are used to control the extension of LD signal detected in the unlock detector circuit.
UE1 0 0 1 1 UE0 0 1 0 1 Extension Time 4*(1/fref) 8*(1/fref) 16*(1/fref) 32*(1/fref) fref = 50 k 80 s 160 s 320 s 640 s
5. Band Switching Output Ports PORT1 to PORT3 are used to switch the outputs for pin16 to pin18, respectively. The pins go to high when the data is set to 0, and go to low when set to 1.
PORT* 0 1 Output High Low
No. 6145-7/10
LV2151V LV2151V Evaluation Circuit
0.1
0.1 VVCO
Unit (resistance: , capacitance:F)
No. 6145-8/10
LV2151V Block Diagram
No. 6145-9/10
LV2151V
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of March, 1999. Specifications and information herein are subject to change without notice. PS No. 6145-10/10

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