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INTEGRATED CIRCUITS
74F166 8-bit bidirectional universal shift register
Product specification IC15 Data Handbook 1991 Feb 14
Philips Semiconductors
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
FEATURES
* High impedance NPN base inputs for reduced loading * * * * * *
(20A in high and low states) Synchronous parallel to serial applications Synchronous serial data input for easy expansion Clock enable for "do nothing" mode Asynchronous master reset Expandable to 16 bits in 8-bit increments Industrial temperature range available (-40C to +85C)
DESCRIPTION
The 74F166 is a high speed 8-bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low-to-high clock transition, parallel data is entered into the register. When PE is high, data is entered into internal bit position Q0 from serial data input (Ds), and the remaining bits are shifted one place to the right (Q0 Q1 Q2, etc.) with each positive going clock transition.
For expansion of the register in parallel to serial converters, the Q7 output is connected to the Ds input of the succeeding stage. The clock input is gated OR structure which allows one input to be used as an active-low clock enable (CE) input. The pin assignment for the CP and CE inputs is arbitrary and can be reversed for layout convenience. The low-to-high transition of CE input should only take place while the CP is high for predictable operation. A low on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all bit positions to a low state.
TYPE 74F166
TYPICAL fmax 175MHz
TYPICAL SUPPLY CURRENT( TOTAL) 50mA
ORDERING INFORMATION
ORDER CODE COMMERCIAL RANGE DESCRIPTION VCC = 5V 10%, Tamb = 0C to +70C 16-pin plastic DIP 16-pin plastic SO N74F166N N74F166D INDUSTRIAL RANGE VCC = 5V 10%, Tamb = -40C to +85C I74F166N I74F166D SOT38-4 SOT109-1 PKG DWG #
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS D0 - D7 Ds CP CE PE MR Parallel data inputs Serial data input (shift right) Clock input (active rising edge) Clock enable input (active low) Parallel enable input (active low) Master reset input (active low) DESCRIPTION 74F (U.L.) HIGH/ LOW 1.0/0.033 2.0/0.066 1.0/0.033 1.0/0.033 1.0/0.033 2.0/0.066 50/33 LOAD VALUE HIGH/ LOW 20A/20A 40A/40A 20A/20A 20A/20A 20A/20A 40A/40A 1.0mA/20mA
Q7 Data output Note to input and output loading and fan out table 1. One (1.0) FAST unit load is defined as: 20A in the high state and 0.6mA in the low state.
Feb. 14, 1991
2
853-0349 01718
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
PIN CONFIGURATION
Ds 1 D0 2 D1 3 D2 4 D3 5 CE 6 CP 7 GND 8 16 V CC 15 14 13 12 11 PE
IEC/IEEE SYMBOL
9 15 6 D7 Q7 D6 D5 1 2 3 4 5 10 1, 3D 2, 3D 2,3D 7 SRG 8 R M1 [SHIFT] M2 [LOAD] 1 C3/1
10 D4 9 MR
SP000283
11 12
LOGIC SYMBOL
1 2 3 4 5 10 11 12 14
14 13
SF00285
Ds D0 D1 D2 D3 D4 D5 D6 D7 6 7 9 15 CE CP MR PE Q7
13 VCC = Pin 16 GND = Pin 8
SF00284
FUNCTION TABLE
INPUTS PE l l h h CE l l l l CP DS X X l h D0 -D7 l-l h-h X-X X-X Qn REGISTER Q0 L H L H Q1 - Q6 L-L H-H q0 - q5 q0 - q5 OUTPUT Q7 L H q6 q6 Serial shift Parallel load OPERATING MODE
X h X X X-X qn q1 - q6 q7 Hold (do nothing) Notes to function table 1. H = High-voltage level 2. h = High voltage level one setup time before the low-to-high clock transition 3. L = Low-voltage level 4. l = Low voltage level one setup time before the low-to-high clock transition 5. qn = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the low-to-high clock transition 6. X = Don't care 7. = Low-to-high clock transition
Feb. 14, 1991
3
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
LOGIC DIAGRAM
MR DS PE D0 9 1 R CP S 15 2 Q
R CP S D1 3 Q
R CP S D2 4 Q
R CP S D3 5 Q
R CP S D4 10 Q
R CP S D5 11 Q
R CP S D6 12 Q
R CP S D7 CP CE 14 7 6 Q 13 Q7
VCC = Pin 16 GND = Pin 8
SF00286
Feb. 14, 1991
4
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Supply voltage Input voltage Input current Voltage applied to output in high output state Current applied to output in low output state Operating free air temperature range Commercial range Industrial range Tstg Storage temperature range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 40 0 to +70 -40 to +85 -65 to +150 UNIT V V mA V mA
C C C
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VIN VIL IIk IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free air temperature range Commercial range Industrial range 0 -40 4.5 2.0 0.8 -18 -1 20 +70 +85 LIMITS NOM 5.0 MAX 5.5 V V V mA mA mA UNIT
C C
Feb. 14, 1991
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Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 VOH High-level output voltage VCC = MIN, VIL = MAX, VIH = MIN VCC = MIN, VIL = MAX, VIH = MIN VIK II Input clamp voltage Input current at maximum input voltage others CE, CP3 others IIH High-level input current MR, Ds Industrial only IIL IOS ICC Low-level input current current4 others MR, Ds others MR, Ds Short-circuit output VCC = MAX VCC = MAX, PE = CE = Dn = GND, MR = Ds = 4.5V, CP = -60 50 VCC = MAX, VI = 0.5V VCC = MAX, VI = 2.7V VCC = MIN, II = IIK VCC = 0.0V, VI = 7.0V IOH = MAX MIN LIMITS TYP2 MAX V 3.4 0.30 0.30 -0.73 0.50 0.50 -1.2 100 20 40 40 80 -20 -40 -150 70 V V V V A A A A A A A mA mA UNIT
10%VCC 5%VCC 10%VCC 5%VCC
2.5 2.7
VOL
Low-level output voltage
IOL = MAX
Supply current (total)
Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. When testing CP, CE must remain in high state, whereas CP must remain in high state when testing CE. 4. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN fmax tPLH tPHL tPHL Maximum clock frequency Propagation delay CP to Q7 Propagation delay MR to Q7 Waveform 1 Waveform 1 Waveform 2 135 5.0 4.0 4.0 TYP 175 7.5 6.0 6.5 10.0 8.0 8.5 MAX Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 110 5.0 3.5 4.0 12.0 9.0 9.5 MAX Tamb = -40C to +85C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 100 5.0 3.5 4.0 13.0 9.0 9.5 MAX ns ns ns UNIT
Feb. 14, 1991
6
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
AC SETUP REQUIREMENTS
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN tsu (H) tsu(L) th (H) th (L) th (H) th (L) tsu(L) th (H) tsu (H) tsu(L) th (H) th (L) tw (H) tw (L) tw (L) trec Setup time, high or low Dn, Ds to CP, CE Hold time, high or low Dn, Ds to CP Hold time, high or low Dn, Ds to CE Setup time, low CE to CP Hold time, high CE to CP Setup time, high or low PE to CP, CE Hold time, high or low PE to CP CP pulse width, high or low MR pulse width, low Recovery time, MR to CP Waveform 3 Waveform 3 Waveform 3 Waveform 3 Waveform 3 Waveform 3 Waveform 3 Waveform 1 Waveform 2 Waveform 2 3.0 2.5 0.0 0.0 1.5 0.0 5.0 0.0 3.0 3.0 0.0 0.0 3.0 4.5 4.0 4.0 TYP MAX Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 4.0 3.0 1.0 0.0 2.0 0.0 6.0 0.0 4.0 4.0 0.0 0.0 3.5 5.0 4.0 4.5 MAX Tamb = -40C to +85C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 4.0 3.0 1.0 0.0 2.0 0.0 6.0 0.0 4.0 6.0 0.0 0.0 3.5 6.0 4.0 4.5 MAX ns ns ns ns ns ns ns ns ns ns UNIT
AC WAVEFORMS
MR 1/fMAX CP VM tW(H) tPHL Q7 VM VM tW(L) tPLH Q7 VM VM VM tw(L) CP tPHL VM VM trec VM
SF00288 SF00288
SF00287
Waveform 2. Master reset pulse width, master reset to output delay and master reset to clock recovery time
Waveform 1. Propagation delay for clock input to output, clock pulse width, and maximum clock frequency
Feb. 14, 1991
7
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
CE
VM tsu(L)
VM th = 0 VM tsu(L) th = 0 VM th = 0 VM
VM tsu(L) VM tsu(H)
VM th = 0 VM th = 0
VM tsu(H)
VM th = 0
PE
VM
Dn
VM
stable tsu
Ds
stable tsu
VM th = 0 VM VM
CP, CE
VM
SF00289
Waveform 3. Setup and hold times Notes to AC waveforms 1. For all waveforms, VM = 1.5V. 2. The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUIT AND WAVEFORMS
VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)
tTLH (tr ) 90% POSITIVE PULSE VM 10% tw
tTHL (tf ) AMP (V) 90% VM 10% 0V
Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00006
Feb. 14, 1991
8
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
1991 Feb 14
9
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
1991 Feb 14
10
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
NOTES
1991 Feb 14
11
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F166
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05086
Philips Semiconductors
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