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LT1204 4-Input Video Multiplexer with 75MHz Current Feedback Amplifier DESCRIPTIO The LT1204 is a 4-input video multiplexer designed to drive 75 cables and easily expand into larger routing systems. Wide bandwidth, high slew rate, and low differential gain and phase make the LT1204 ideal for broadcast quality signal routing. Channel separation and disable isolation are greater than 90dB up to 10MHz. The channelto-channel output switching transient is only 40mVP-P, with a 50ns duration, making the transition imperceptible on high quality monitors. A unique feature of the LT1204 is its ability to expand into larger routing matrices. This is accomplished by a patent pending circuit that bootstraps the feedback resistors in the disable condition, raising the true output impedance of the circuit. The effect of this feature is to eliminate cable misterminations in large systems. The large input and output signal levels supported by the LT1204 when operated on 15V supplies make it ideal for general purpose analog signal selection and multiplexing. A shutdown feature reduces the supply current to 1.5mA. FEATURES s s s s s s s s s s s s 0.1dB Gain Flatness > 30MHz Channel Separation at 10MHz: 90dB 40mV Switching Transient, Input Referred - 3dB Bandwidth, AV = 2, RL = 150: 75MHz Channel-to-Channel Switching Time: 120ns Easy to Expand for More Inputs Large Input Range: 6V 0.04% Differential Gain, RL = 150 0.06 Differential Phase, RL = 150 High Slew Rate: 1000V/s Output Swing, RL = 400: 13V Wide Supply Range: 5V to 15V APPLICATI s s s s s S Broadcast Quality Video Multiplexing Large Matrix Routing Medical Imaging Large Amplitude Signal Multiplexing Programmable Gain Amplifiers TYPICAL APPLICATI VIN 0 75 2 GND +1 1 VIN 0 +1 V+ 16 15V 75 VOUT -20 + CFA VO 15 V- 14 3 VIN 1 ALL HOSTILE CROSSTALK (dB) VIN 1 75 - -15V RF 1k -40 4 GND +1 FB 13 S/D 12 RG 1k -60 VIN 2 75 5 VIN 2 -80 6 GND LOGIC +1 ENABLE 11 A1 10 A0 9 -100 VIN 3 75 7 VIN 3 -120 1 10 FREQUENCY (MHz) 100 LT1204 * TA02 8 6.8k REF LT1204 * TA01 8.2k -15V U UO UO All Hostile Crosstalk Surface Mount PCB Measurements VS = 15V VIN 0 = GND VIN 1,2,3 = 0dBm RL = 100 1 LT1204 ABSOLUTE AXI U RATI GS Operating Temperature Range ............... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Junction Temperature (Note 4) ............................ 150C Lead Temperature (Soldering, 10 sec).................. 300C Supply Voltage ..................................................... 18V - Input Current (Pin 13) .................................... 15mA +Input and Control/Logic Current (Note 1) ........ 50mA Output Short-Circuit Duration (Note 2) ......... Continuous Specified Temperature Range (Note 3) ....... 0C to 70C PACKAGE/ORDER I FOR ATIO TOP VIEW VIN 0 GND VIN 1 GND VIN 2 GND VIN 3 REF 1 2 3 4 5 6 7 8 16 V + 15 VO 14 V - 13 FB 12 S/D 11 ENABLE 10 A1 9 A0 ORDER PART NUMBER LT1204CN* N PACKAGE 16-LEAD PLASTIC DIP TJMAX = 150C, JA = 70C/W *See Note 3 ELECTRICAL CHARACTERISTICS 0C TA 70C, 5V VS 15V, VCM = 0V, Pin 8 grounded and pulse tested unless otherwise noted. SYMBOL VOS PARAMETER Input Offset Voltage Offset Matching Input Offset Voltage Drift IIN+ IIN- en +in -in CIN COUT RIN Positive Input Bias Current Negative Input Bias Current Input Noise Voltage Noninverting Input Noise Current Density Inverting Input Noise Current Density Input Capacitance Output Capacitance Positive Input Resistance, Any Positive Input CONDITIONS Any Positive Input, TA = 25C q Between Any Positive Input, VS = 15V Any Positive Input Any Positive Input, TA = 25C TA = 25C q f = 1kHz, RF = 1k, RG = 10, RS = 0 f = 1kHz f = 1kHz Input Selected Input Deselected Disabled, Pin 11 Voltage = 0V VS = 5V, VIN = - 1.5V, 2V, TA = 25C VS = 15V, VIN = 5V q 2 U U W WW U W TOP VIEW VIN 0 1 GND 2 VIN 1 3 GND 4 VIN 2 5 GND 6 VIN 3 7 REF 8 S PACKAGE 16-LEAD PLASTIC SOL TJMAX = 150C, JA = 90C/W 16 V + 15 VO 14 V - 13 FB 12 S/D 11 ENABLE 10 A1 9 A0 ORDER PART NUMBER LT1204CS* MIN TYP 5 MAX 14 16 5 8 10 50 75 UNITS mV mV mV V/C A A A A nV/Hz pA/Hz pA/Hz pF pF pF M M q q q 0.5 40 3 10 7 1.5 40 3.0 3.5 8 5 4 20 20 LT1204 0C TA 70C, 5V VS 15V, VCM = 0V, Pin 8 grounded and pulse tested unless otherwise noted. SYMBOL PARAMETER Input Voltage Range, Any Positive Input CONDITIONS VS = 5V, TA = 25C VS = 15V VS = 15V, Pin 8 Voltage = - 5V CMRR Common-Mode Rejection Ratio Negative Input Current Common-Mode Rejection PSRR AVOL ROL VOUT Power Supply Rejection Ratio Negative Input Current Power Supply Rejection Large-Signal Voltage Gain Transresistance VO /IIN- Output Voltage Swing VS = 5V, VCM = - 1.5V, 2V, TA = 25C VS = 15V, VCM = 5V VS = 5V, VCM = - 1.5V, 2V, TA = 25C VS = 15V, VCM = 5V VS = 4.5V to 15V VS = 4.5V to 15V VS = 15V, VOUT = 10V, RL = 1k VS = 5V, VOUT = 2V, RL = 150 VS = 15V, VOUT = 10V, RL = 1k VS = 5V, VOUT = 2V, RL = 150 VS = 15V, RL = 400, TA = 25C q q q q q q q q q q q ELECTRICAL CHARACTERISTICS MIN 2.0 - 1.5 5.0 3.75 48 48 TYP 2.5 - 2.0 6.0 4.0 55 58 0.05 0.05 MAX UNITS V V V V dB dB 1 1 5 A/V A/V dB A/V dB dB k k V V V V 60 57 57 115 115 12 10 3.0 2.5 35 76 0.5 73 66 310 210 13.5 3.7 55 19 19 1.5 125 24 24 3.5 VS = 5V, RL = 150, TA = 25C q IOUT IS Output Current Supply Current (Note 5) RL = 0, TA = 25C Pin 11 = 5V Pin 11 = 0V Pin 12 = 0V VS = 15V, Pin 11 = 0V, VO = 5V, RF = RG = 1k VS = 15V, Pin 11 = 0V, VO = 5V, RF = 2k, RG = 222 q q q q q mA mA mA mA k k Disabled Output Resistance 14 8 25 20 DIGITAL I PUT CHARACTERISTICS SYMBOL VIL VIH IIL IIH PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Enable Low Input Current Enable High Input Current IS/D tsel tdis ten tS/D Shutdown Input Current Channel-to-Channel Select Time (Note 6) Disable Time (Note 7) Enable Time (Note 8) Shutdown Assert or Release Time (Note 9) 0C TA 70C, VS = 15V, RF = 2k, RG = 220, RL = 400 unless otherwise noted. CONDITIONS Pins 9, 10, 11, 12 Pins 9, 10, 11, 12 Pins 9, 10 Voltage = 0V Pins 9, 10 Voltage = 5V Pin 11 Voltage = 0V Pin 11 Voltage = 5V Pin 12 Voltage 0V VS/D 5V Pin 8 Voltage = - 5V, TA = 25C Pin 8 Voltage = - 5V, TA = 25C Pin 8 Voltage = - 5V, TA = 25C Pin 8 Voltage = - 5V, TA = 25C q q q q q q q U MIN 2 TYP MAX 0.8 UNITS V V A nA A A A ns ns ns s 1.5 10 4.5 200 20 120 40 110 1.4 6 150 15 300 80 240 100 200 3.4 3 LT1204 AC CHARACTERISTICS SYMBOL t r , tf SR tS PARAMETER Small-Signal Rise and Fall Time Slew Rate (Note 10) Channel Select Output Transient Settling Time All Hostile Crosstalk (Note 11) Disable Crosstalk (Note 11) Shutdown Crosstalk (Note 11) All Hostile Crosstalk (Note 11) Disable Crosstalk (Note 11) Shutdown Crosstalk (Note 11) Differential Gain (Note 12) Differential Phase (Note 12) TA = 25C, VS = 15V, RF = RG = 1k, unless otherwise noted. CONDITIONS RL = 150, VOUT = 125mV RL = 400 All VIN = 0V, RL = 400, Input Referred 0.1%, VOUT = 10V, RL = 1k SO PCB #028, RL = 100, RS = 10 SO PCB #028, Pin 11 Voltage = 0V, RL = 100, RS = 50 SO PCB #028, Pin 12 Voltage = 0V, RL = 100, RS = 50 P-DIP PCB #029, RL = 100, RS = 10 P-DIP PCB #029, Pin 11 Voltage = 0V, RL = 100, RS = 50 P-DIP PCB #029, Pin 12 Voltage = 0V, RL = 100, RS = 50 VS = 15V, RL = 150 VS = 5V, RL = 150 VS = 15V, RL = 150 VS = 5V, RL = 150 500 MIN TYP 5.6 1000 40 70 92 95 92 76 81 76 0.04 0.04 0.06 0.12 MAX UNITS ns V/s mV ns dB dB dB dB dB dB % % DEG DEG The q denotes specifications which apply over the specified operating temperature range. Note 1: Analog and digital inputs (Pins 1, 3, 5, 7, 9, 10, 11 and 12) are protected against ESD and overvoltage with internal SCRs. For inputs < 6V the SCR will not fire, voltages above 6V will fire the SCRs and the DC current should be limited to 50mA. To turn off the SCR the pin voltage must be reduced to less than 2V or the current reduced to less than 10mA. Note 2: A heat sink may be required depending on the power supply voltage. Note 3: Commercial grade parts are designed to operate over the temperature range of - 40C to 85C but are neither tested nor guaranteed beyond 0C to 70C. Industrial grade parts specified and tested over - 40C to 85C are available on special request. Consult factory. Note 4: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LT1204CN: TJ = TA + (PD x 70C/W) LT1204CS: TJ = TA + (PD x 90C/W) Note 5: The supply current of the LT1204 has a negative temperature coefficient. For more information see Typical Performance Characteristics. Note 6: Apply 0.5V DC to Pin 1 and measure the time for the appearance of 5V at Pin 15 when Pin 9 goes from 5V to 0V. Pin 10 Voltage = 0V. Apply 0.5V DC to Pin 3 and measure the time for the appearance of 5V at Pin 15 when Pin 9 goes from 0V to 5V. Pin 10 Voltage = 0V. Apply 0.5V DC to Pin 5 and measure the time for the appearance of 5V at Pin 15 when Pin 9 goes from 5V to 0V. Pin 10 Voltage = 5V. Apply 0.5V DC to Pin 7 and measure the time for the appearance of 5V at Pin 15 when Pin 9 goes from 0V to 5V. Pin 10 Voltage = 5V. Note 7: Apply 0.5V DC to Pin 1 and measure the time for the disappearance of 5V at Pin 15 when Pin 11 goes from 5V to 0V. Pins 9 and 10 are at 0V. Note 8: Apply 0.5V DC to Pin 1 and measure the time for the appearance of 5V at Pin 15 when Pin 11 goes from 0V to 5V. Pins 9 and 10 are at 0V. Above a 1MHz toggle rate, ten reduces. Note 9: Apply 0.5V DC at Pin 1 and measure the time for the appearance of 5V at Pin 15 when Pin 12 goes from 0V to 5V. Pins 9 and 10 are at 0V. Then measure the time for the disappearance of 5V DC to 500mV at Pin 15 when Pin 12 goes from 5V to 0V. Note 10: Slew rate is measured at 5V on a 10V output signal while operating on 15V supplies with RF = 2k, RG = 220 and RL = 400. Note 11: VIN = 0dBm (0.223VRMS) at 10MHz on any 3 inputs with the 4th input selected. For Disable crosstalk and Shutdown crosstalk all 4 inputs are driven simultaneously. A 6dB output attenuator is formed by a 50 series output resistor and the 50 input impedance of the HP4195A Network Analyzer. RF = RG = 1k. Note 12: Differential Gain and Phase are measured using a Tektronix TSG120 YC/NTSC signal generator and a Tektronix 1780R Video Measurement Set. The resolution of this equipment is 0.1% and 0.1. Five identical MUXs were cascaded giving an effective resolution of 0.02% and 0.02. 4 LT1204 TYPICAL AC PERFOR A CE VS (V) 15 12 5 15 12 5V 15 12 5 AV 1 1 1 2 2 2 10 10 10 RL () 150 1k 150 1k 150 1k 150 1k 150 1k 150 1k 150 1k 150 1k 150 1k RF () 1.1k 1.6k 976 1.3k 665 866 787 887 750 845 590 649 866 1k 825 931 665 750 TRUTH TABLE A1 0 0 1 1 X X A0 0 1 0 1 X X ENABLE 1 1 1 1 0 X SHUTDOWN 1 1 1 1 1 0 CHANNEL SELECTED VIN 0 VIN 1 VIN 2 VIN 3 High Z Output Off UW Measurements taken from SO Demonstration Board #028. RG () None None None None None None 787 887 750 845 590 649 95.3 110 90.9 100 73.2 82.5 SMALL SIGNAL - 3dB BW (MHz) 88.5 95.6 82.6 90.2 65.5 68.2 75.7 82.2 71.9 77.5 58.0 62.1 44.3 47.4 43.5 46.3 37.2 39.3 SMALL SIGNAL 0.1dB BW (MHz) 48.3 65.8 49.1 63.6 43.6 42.1 45.8 61.3 45.0 52.1 32.4 42.7 28.7 30.9 27.2 32.1 22.1 27.8 SMALL SIGNAL PEAKING (dB) 0.1 0 0.1 0.1 0.1 0.1 0 0.1 0 0 0 0.1 0.1 0.1 0 0.1 0 0.1 5 LT1204 TYPICAL PERFOR A CE CHARACTERISTICS 12V Frequency Response, AV = 1 4 3 2 1 PHASE VS = 12V RL = 150 RF = 976 0 -20 -40 -60 GAIN (dB) GAIN (dB) 0 -1 -2 -3 -4 -5 -6 1M 10M 100M FREQUENCY (Hz) 1G LT1204 * TPC01 12V Frequency Response, AV = 2 10 9 8 7 GAIN (dB) PHASE GAIN (dB) 6 5 4 3 2 1 0 1M 10M 100M FREQUENCY (Hz) 1G LT1204 * TPC02 12V Frequency Response, AV = 10 24 23 22 21 GAIN (dB) PHASE GAIN (dB) 20 19 18 17 16 15 14 1M 10M 100M FREQUENCY (Hz) 1G LT1204 * TPC03 6 UW GAIN 5V Frequency Response, AV = 1 4 3 2 1 PHASE (DEG) 0 PHASE VS = 5V RL = 150 RF = 655 -20 -40 -60 PHASE (DEG) -80 -100 -120 -140 -160 -180 -200 0 -1 -2 -3 -4 -5 -6 1M 10M 100M FREQUENCY (Hz) 1G LT1204 * TPC04 -80 GAIN -100 -120 -140 -160 -180 -200 5V Frequency Response, AV = 2 0 10 9 8 7 PHASE (DEG) 0 VS = 5V RL = 150 RF = 590 RG = 590 -20 -40 -60 VS = 12V RL = 150 RF = 750 RG = 750 -20 -40 -60 -80 PHASE PHASE (DEG) 6 5 4 3 2 1 0 1M 10M 100M FREQUENCY (Hz) 1G LT1204 * TPC05 -80 GAIN -100 -120 -140 -160 -180 -200 GAIN -100 -120 -140 -160 -180 -200 5V Frequency Response, AV = 10 24 23 22 21 PHASE VS = 5V RL = 150 RF = 665 RG = 73.2 0 -20 -40 -60 0 VS = 12V RL = 150 RF = 825 RG = 90.9 -20 -40 -60 PHASE (DEG) PHASE (DEG) -80 GAIN -100 -120 -140 -160 -180 -200 20 19 18 17 16 15 14 1M 10M 100M FREQUENCY (Hz) 1G LT1204 * TPC06 -80 GAIN -100 -120 -140 -160 -180 -200 LT1204 TYPICAL PERFOR A CE CHARACTERISTICS Maximum Undistorted Output vs Frequency 25 VS = 15V RL = 1k RFB = 1k CAPACITIVE LOAD (pF) 20 1000 15 AV = 10 TOTAL HARMONIC DISTORTION (%) OUTPUT VOLTAGE (VP-P) 10 AV = 1 5 AV = 2 0 1 10 FREQUENCY (MHz) 100 LT1204 * TPC07 15V All Hostile Crosstalk vs Frequency -20 -30 ALL HOSTILE CROSSTALK (dB) ALL HOSTILE CROSSTALK (dB) ALL HOSTILE CROSSTALK (dB) -40 -50 -60 -70 -80 -90 -100 -110 -120 1 VS = 15V RL = 100 RF = RG = 1k RS = 0 DEMO PCB #028 CH1 CH4 CH3 CH2 10 FREQUENCY (MHz) Disable and Shutdown Crosstalk vs Frequency -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 1 SPOT NOISE (nV/Hz or pA/Hz) ALL HOSTILE CROSSTALK (dB) OUTPUT IMPEDANCE () VS = 15V RL = 100 RF = RG = 1k RS = 50 DEMO PCB #028 ALL CHANNELS DRIVEN SHUTDOWN CROSSTALK DISABLE CROSSTALK 10 FREQUENCY (MHz) UW LT1204 * TPC10 LT1204 * TPC13 Maximum Capacitive Load vs Feedback Resistor 10000 RL = 1k AV = 2 TA = 25C 5dB PEAKING 0.1 Total Harmonic Distortion vs Frequency VS = 15V RL = 400 RF = RG = 1k 0.01 VO = 6VRMS VS = 5V 100 VS = 15V VO = 1VRMS 10 0 2 1 FEEDBACK RESISTOR (k) 3 LT1204 * TPC08 0.001 10 100 1k 10k FREQUENCY (Hz) 100k LT1204 * TPC09 5V All Hostile Crosstalk vs Frequency -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 100 1 10 FREQUENCY (MHz) 100 LT1204 * TPC11 All Hostile Crosstalk vs Frequency, Various Source Resistance -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 1 10 FREQUENCY (MHz) 100 LT1204 * TPC12 VS = 5V RL = 100 RF = RG = 1k RS = 0 DEMO PCB #028 VS = 15V RL = 100 RF = RG = 1k DEMO PCB #028 ANY CHANNEL RS = 75 RS = 37.5 RS = 10 RS = 0 Spot Noise Voltage and Current vs Frequency 100 -in 100 1000 Amplifier Output Impedance vs Frequency VS = 15V 10 en 10 RFB = RG = 2k 1 RFB = RG = 750 +in 1 100 10 100 1k 10k FREQUENCY (Hz) 100k LT1204 * TPC14 0.1 10k 100k 1M 10M FREQUENCY (Hz) 100M LT1204 * TPC15 7 LT1204 TYPICAL PERFOR A CE CHARACTERISTICS Output Disable V-I Characteristic 100 DISABLED OUTPUT IMPEDANCE (k) 200 150 VS = 15V RF = RG = 1k OUTPUT CURRENT (A) 100 50 0 -50 SLOPE = 1/18k 10 VOLTAGE ON PIN 8 (V) -100 -150 -200 -5 -4 -3 -2 -1 0 1 2 3 OUTPUT VOLTAGE (V) Input Voltage Range vs Pin 8 Voltage 6 INPUT VOLTAGE RANGE (V) INPUT VOLTAGE RANGE (V) 4 2 0 -2 -4 -6 0 -1 -2 -3 -4 -5 -6 -7 VOLTAGE ON PIN 8 (V) -8 -9 -55C, 25C, 125C 4 2 0 25C -55C 125C 125C POWER SUPPLY REFECTION (dB) VS = 15V AV = 1 Output Saturation Voltage vs Temperature V+ OUTPUT SHORT-CIRCUIT CURRENT (mA) RL = OUTPUT SATURATION VOLTAGE (V) -0.5 -1.0 60 OUTPUT STEP (V) 1.0 0.5 V- -50 -25 50 25 75 0 TEMPERATURE (C) 8 UW 4 5 LT1204 * TPC16 Disabled Output Impedance vs Frequency 0 VS = 15V RF = RG = 1k -1 -2 -3 -4 -5 -6 -7 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M -8 Maximum Channel Switching Rate vs Pin 8 Voltage VIN = 1VDC RL = 100 RFB = RG = 1k 1 1 1.5 2 3 3.5 2.5 CHANNEL SWITCHING RATE (MHz) 4 LT1204 * TPC16 LT1204 * TPC17 Input Voltage Range vs Supply Voltage 70 6 PIN 8 = 0V 60 50 Power Supply Rejection vs Frequency VS = 15V RFB = RG = 1k POSITIVE 40 NEGATIVE 30 20 10 0 -10 10k -2 -4 -6 2 -55C 25C 4 12 6 10 8 SUPPLY VOLTAGE (V) 14 16 100k 1M 10M FREQUENCY (Hz) 100M LT1204 * TPC18 LT1204 * TPC19 LTC1204 * TPC20 Output Short-Circuit Current vs Temperature 80 Settling Time to 10mV vs Output Step 10 8 VS = 15V RF = RG = 1k 70 6 4 2 0 -2 -4 -6 -8 50 40 100 125 30 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 -10 30 40 60 50 SETTLING TIME (ns) 70 80 LT1204 * TPC21 LT1204 * TPC22 LT1204 * TPC23 LT1204 TYPICAL PERFOR A CE CHARACTERISTICS Settling Time to 1mV vs Output Step 10 8 6 VS = 15V RF = RG = 1k SUPPLY CURRENT (mA) OUTPUT STEP (V) 4 2 0 -2 -4 -6 -8 -10 0 2 4 6 8 10 12 14 16 18 20 SETTLING TIME (s) LT1204 * TPC24 19 18 17 16 15 14 13 12 0 2 4 SUPPLY CURRENT (mA) APPLICATI Logic Inputs S I FOR ATIO The logic inputs of the LT1204 are compatible with all 5V logic. All pins have ESD protection (> 2kV), and shorting them to 12V or 15V will cause excessive currents to flow. Limit the current to less than 50mA when driving the logic above 6V. Power Supplies The LT1204 will operate from 5V (10V total) to 15V (30V total) and is specified over this range. It is not necessary to use equal value supplies, however, the offset voltage and inverting input bias current will change. The offset voltage changes about 600V per volt of supply mismatch. The inverting bias current changes about 2.5A per volt of supply mismatch. The power supplies should be bypassed with quality tantalum capacitors. Feedback Resistor Selection The small-signal bandwidth of the LT1204 is set by the external feedback resistors and internal junction capacitors. As a result the bandwidth is a function of the supply voltage, the value of the feedback resistor, the closedloop gain and the load resistor. These effects are outlined in the resistor selection guide of the Typical AC Performance table. Bandwidths range as high as 95MHz and are U W UW Enabled Supply Current vs Supply Voltage 22 21 20 -55C 22 21 20 19 18 17 16 15 2 1 0 6 8 10 12 14 SUPPLY VOLTAGE (V) 16 18 Disabled and Shutdown Supply Current vs Supply Voltage 125C 25C 25C -55C 125C -55C, 25C, 125C IS/D 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (V) 16 18 LT1204 * TPC25 LT1204 * TPC26 U UO specified over a very wide range of conditions. An advantage of the current feedback topology used in the LT1204 is well-controlled frequency response. In all cases of the performance table the peaking is 0.1dB or less. If more peaking can be tolerated, larger bandwidths can be obtained by lowering the feedback resistor. For gains of 2 or less, the 0.1dB bandwidth is greater than 30MHz for all loads and supply voltages. At high gains (low values of RG) the disabled output resistance drops slightly due to loading of the internal buffer amplifier as discussed in Multiplexer Expansion. Small-Signal Rise Time, AV = 2 VS = 15V RL = 150 RF = 1k RG = 1k LT1204 * AI01 9 LT1204 APPLICATI S I FOR ATIO Capacitance on the Inverting Input Current feedback amplifiers require resistive feedback from the output to the inverting input for stable operation. Take care to minimize the stray capacitance between the output and the inverting input. Capacitance on the inverting input to ground will cause peaking in the frequency response and overshoot in the transient response. Capacitive Loads The LT1204 can drive capacitive loads directly when the proper value of feedback resistor is used. The graph of Maximum Capacitive Load vs Feedback Resistor should be used to select the appropriate value. The value shown is for 5dB peaking when driving a 1k load at a gain of 2. This is a worst case condition. The amplifier is more stable at higher gains and driving heavier loads. Alternatively, a small resistor (10 to 20) can be put in series with the output to isolate the capacitive load from the amplifier output. This has the advantage that the amplifier bandwidth is only reduced when the capacitive load is present. The disadvantage is that the gain is a function of load resistance. Slew Rate The slew rate of the current feedback amplifier on the LT1204 is not independent of the amplifier gain the way slew rate is in a traditional op amp. This is because both the input and the output stage have slew rate limitations. In high gain settings the signal amplitude between the negative input and any driven positive input is small and the overall slew rate is that of the output stage. For gains less than 10, the overall slew rate is limited by the input stage. The input slew rate of the LT1204 is approximately 135V/ s and is set by internal currents and capacitances. The output slew rate is set by the value of the feedback resistors and the internal capacitances. At a gain of 10 with a 1k feedback resistor and 15 supplies, the output slew rate is typically 1000V/s. Larger feedback resistors will reduce the slew rate as will lower supply voltages, similar to the way the bandwidth is reduced. The graph, Maximum Undistorted Output vs Frequency, relates the slew rate limitations to sinusoidal inputs for various gain configurations. 10 U Large-Signal Transient Response VS = 15V AV = 2 RF = 1k RG = 1k RL = 400 LT1204 * AI02 W U UO Large-Signal Transient Response VS = 15V AV = 10 RF = 910 RG = 100 RL = 400 LT1204 * AI03 Switching Characteristics and Pin 8 Switching between channels is a "make-before-break" condition where both inputs are on momentarily. The buffers isolate the inputs when the "make-before-break" switching occurs. The input with the largest positive voltage determines the output level. If both inputs are equal, there is only a 40mV error at the input of the CFA during the transition. The reference adjust (pin 8) allows the user to trade off positive input voltage range for switching time. For example, on 15V supplies, setting the voltage on pin 8 to - 6.8V reduces the switching transient to a 50ns duration, and reduces the positive input range from 6V to 2.35V. The negative input range remains unchanged at - 6V. When switching video "in picture," this short transient is imperceptible even on high quality LT1204 APPLICATI S I FOR ATIO monitors. The reference pin has no effect when the LT1204 is operating on 5V, and should be grounded. On supply voltages above 8V, the range of voltages for pin 8 should be between - 6.5V and - 7.5V. Reducing pin 8 voltage below - 7.5V turns "on" the "off" tee switch, and the isolation between channels is lost. Channel-to-Channel Switching A0 PIN 9 VOUT PIN 15 VIN 0 AND VIN 1 CONNECTED TO 2MHz SINEWAVE PIN 8 VOLTAGE = -6.8V, VS = 15V LT1204 * AI04 Transient at Input Buffer A0 PIN 9 VIN 0 PIN 1 SWITCHING BETWEEN VIN 0 AND VIN 1 RS = 50, VREF = - 6.8V, VS 15V LT1204 * AI05 Competitive video multiplexers built in CMOS are bidirectional and suffer from poor output-to-input isolation and cause transients to feed to the inputs. CMOS MUXs have been built with "break-before-make" switches to eliminate the talking between channels, but these suffer from output glitches large enough to interfere with sync circuitry. Multiplexers built on older bipolar processes that switch lateral PNP transistors take several s to settle and blur the transition between pictures. U Competitive MUXs CMOS MUX BIPOLAR MUX VIN 0 AND VIN 1 CONNECTED TO 2MHz SINEWAVE LT1204 * AI06 W U UO Crosstalk The crosstalk, or more accurately all hostile crosstalk, is measured by driving a signal into any 3 of the 4 inputs and selecting the 4th input with the logic control. This 4th input is either shorted to ground or terminated in an impedance. All hostile crosstalk is defined as the ratio in dB of the signal at the output of the CFA to the signal on the 3 driven inputs, and is input referred. Disable crosstalk is measured with all 4 inputs driven and the part disabled. Crosstalk is critical in many applications where video multiplexers are used. In professional video systems a crosstalk figure of - 72dB is a desirable specification. The key to the outstanding crosstalk performance of the LT1204 is the use of tee switches (see Figure 1). When the tee switch is on (Q2 off) Q1 and Q3 are a pair of emitter followers with excellent AC response for driving the CFA. When the decoder turns off the tee switch (Q2 on) the V+ I1 Q3 VIN 0 TO LOGIC V- Q1 Q2 + CFA VOUT - RF I2 -V FB RG LT1204 * F01 Figure 1. Tee Switch 11 LT1204 APPLICATI S I FOR ATIO emitter base junctions of Q1 and Q3 become reverse biased while Q2 emitter absorbs current from I1. Not only do the reverse biased emitter base junctions provide good isolation, but any signal at VIN 0 coupling to Q1 emitter is further attenuated by the shunt impedance of Q2 emitter. Current from I2 is routed to any on switch. Crosstalk performance is a strong function of the IC package, the PC board layout as well as the IC design. The die layout utilizes grounds between each input to isolate adjacent channels, while the output and feedback pins are on opposite sides of the die from the input. The layout of a PC board that is capable of providing -90dB all hostile crosstalk at 10MHz is not trivial. That level corresponds to a 30V output below a 1V input at 10MHz. A demonstration board has been fabricated to show the component and ground placement required to attain these crosstalk numbers. A graph of all hostile crosstalk for both the P-DIP and All Hostile Crosstalk -20 VS = 15V VIN 0 = GND VIN 1,2,3 = 0dBm RL = 100 P-DIP DEMO PCB #029 ALL HOSTILE CROSSTALK (dB) -40 -60 -80 SOL DEMO PCB #028 -100 -120 1 10 FREQUENCY (MHz) 100 LT1204 * AI07 12 U SO packages is shown. It has been found empirically from these PC boards that capacitive coupling across the package of greater than 3fF (0.003pF) will diminish the rejection, and it is recommended that this proven layout be copied into designs. The key to the success of the SOL PC board #028 is the use of a ground plane guard around pin 13, the feedback pin. P-DIP PC Board #029, Component Side GND V- V+ VOUT VIN0 C2 + U1 VIN1 RF C4 R6 VIN2 R2 S/D R1 (408) 432-1900 LT1204 VIDEO MUX DEMONSTRATION BOARD R3 R0 R1 + C3 C1 ENABLE RO VIN3 REF LT1204 * AI09 W U UO LT1204 APPLICATI S I FOR ATIO U W U UO SOL PC Board #028, Component Side GND V- V+ VOUT VIN0 ENABLE C4 VIN1 U1 RF RG R2 C3 A0 C2 C1 RO R3 A1 R1 VIN2 S/D (408) 432-1900 LT1204 VIDEO MUX DEMONSTRATION BOARD VIN3 REF LT1204 * AI08 13 LT1204 APPLICATI S I FOR ATIO Demonstration PC Board Schematic GND V - V+ VIN 0 1 2 VIN 0 GND VIN 1 GND LT1204 VIN 2 GND VIN 3 REF 4 VIN 2 5 6 VIN 3 7 8 FB S/D ENABLE A1 A0 13 12 11 10 9 R1 10k R2 10k REF LT1204 * AI10 All Hostile Crosstalk Test Setup* HP4195A NETWORK ANALYZER OSC 50 REF 50 VIN 50 50 SPLITTER 10 1 2 3 4 5 6 7 8 50 16 15 14 13 12 11 10 9 *SEE PC BOARD LAYOUT 10k -15V 1k 1k VIN 0 GND VIN 1 GND LT1204 VIN 2 GND VIN 3 REF V+ VO V- FB S/D ENABLE A1 A0 15V 50 10 1 2 3 50 4 5 50 6 7 50 LT1204 * AI11 LT1204 * AI12 14 + VIN 1 3 U V+ VO V- 16 15 14 C3 4.7F C4 0.1F RF 750 W U UO + C1 4.7F C2 0.1F RO 75 RG 750 R3 10k SHUTDOWN ENABLE A1 A0 RESISTORS R1, R2 AND R3 ARE PULL-DOWN AND PULL-UP RESISTORS FOR THE LOGIC AND ENABLE PINS. THEY MAY BE OMITTED IF THE LT1204 IS DRIVEN FROM TTL LEVELS OR FROM 5V CMOS. Alternate All Hostile Crosstalk Setup* HP4195A NETWORK ANALYZER OSC 50 REF 50 VIN 50 50 SPLITTER VIN 0 GND VIN 1 GND LT1204 VIN 2 GND VIN 3 REF V+ VO V- FB S/D ENABLE A1 A0 16 15 14 13 12 11 10 9 -15V 15V 50 1k 1k 10k 8 *SEE PC BOARD LAYOUT LT1204 APPLICATI S I FOR ATIO Multiplexer Expansion Pin 11 and Pin 12 To expand the number of MUX inputs, LT1204s can be paralleled by shorting their outputs together. The multiplexer disable logic has been designed to prevent shootthrough current when two or more amplifiers have their outputs shorted together. (Shoot-through current is a spike of power supply current caused by both amplifiers being on at once.) Monitoring Supply Current Spikes V+ TEK CT-1 1 3 5 7 13 TO SCOPE + + + + - 1k 16 LT1204 EN 11 14 15 75 VIN 1 TEE SWITCH V- 1k 74HC04 5V O OSCILLATOR 1 3 5 7 13 V+ 16 11 EN LT1204 15 75 75 V- + + + + - 14 V - 1k LT1204 * AI13 1k Timing and Supply Current Waveforms 74HC04 OUTPUT 5V/DIV OSCILLATOR 5V/DIV VOUT 1V/DIV IS 10mA/DIV LT1204 * AI14 U The multiplexer uses a circuit to ensure the disabled amplifiers do not load or alter the cable termination. When the LT1204 is disabled (pin 11 low) the output stage is turned off and an active buffer senses the output and drives the feedback pin to the CFA (Figure 2). This bootstraps the feedback resistors and raises the true output impedance of the circuit. For the condition where RF = RG = 1k, the Disable Output Resistance is typically raised to 25k and drops to 20k for AV = 10, RF = 2k and RG = 222 due to loading of the feedback buffer. Operating the Disable feature with RG < 100 is not recommended. VIN 0 TEE SWITCH AV = +1 W U UO + VIN 2 TEE SWITCH CFA "OFF" VOUT - VIN 3 TEE SWITCH FB RG RF 75 75 CABLE 75 LT1204 "ON" LT1204 * F02 Figure 2. Active Buffer Drives FB Pin 13 A shutdown feature (pin 12 low) reduces the supply current to 1.5mA and lowers the power dissipation when the LT1204 is not in use. If the part is shut down, the bootstrapping is inoperative and the feedback resistors will load the output. If the CFA is operated at a gain of +1, however, the feedback resistor will not load the output even in shutdown because there is no resistive path to ground, but there will be a - 6dB loss through the cable system. A frequency response plot shows the effect of using the disable feature versus using the shutdown feature. In this example 4 LT1204s were connected together at their outputs forming a 16-to-1 MUX. The plot shows the effect of the bootstrapping circuit that eliminates the 15 LT1204 APPLICATI S I FOR ATIO improper cable termination due to feedback resistors loading the cable. The limit to the number of expanded inputs is set by the acceptable error budget of the system. 16-to-1 MUX Response Using Disable vs Shutdown 4 VS = 15V RL = 100 RF = RG = 1k DISABLE SHUTDOWN -2 2 GAIN (dB) 0 -4 -6 1 10 FREQUENCY (MHz) 100 LT1204 * AI16 16-to-1 Multiplexer All Hostile Crosstalk -20 VS = 15V RL = 100 RF = RG = 1k RS = 0 ALL HOSTILE CROSSTALK (dB) -40 -60 SHUTDOWN CROSSTALK -80 DISABLE CROSSTALK 75 1V REQ VOUT 75 LT1204 * AI18 -100 -120 1 10 FREQUENCY (MHz) 100 LT1204 * AI17 16 U For a 64-to-1 MUX we need 16 LT1204s. The equivalent load resistance due to the feedback resistor REQ in Disable is 25k/15 = 1.67k. See Figure 3. VO = 75REQ , V = 0.489V 75(75) + 150REQ O W U UO This voltage represents a 2.1% loading error. If the shutdown feature is used instead of the disable feature, then the LT1204 could expand to only an 8-to-1 MUX for the same error. As a practical matter the gain error at frequency is also set by capacitive loading. The disabled output capacitance of the LT1204 is about 8pF, and in the case of 16 LT1204s, it would represent a 128pF load. The combination of 1.67k and 128pF correspond to about a 0.3dB roll-off at 5MHz. OFF 75 LT1204 CABLE ON LT1204 1V 75 VOUT 75 Figure 3. Equivalent Loading Schematic LT1204 TYPICAL APPLICATI Programable Gain Amplifier (PGA) Two LT1204s and seven resistors make a Programable Gain Amplifier with a 128-to-1 gain range. The gain is proportional to 2N where N is the 3-bit binary value of the select logic. An input attenuator alters the input signal Programable Gain Amplifier Accepts Inputs from 62.5mVP-P to 8VP-P VIN = 62.5mVP-P TO 8VP-P 499 249 124 1 3 5 7 13 + + LT1204 + #1 + - 1.5k 124 100 VOUT = 1VP-P 1 3 5 7 13 + + + LT1204 + #2 - 1.5k LT1204 * AI19 TWISTED PAIR 68 CABLE 1k* 1k* 1k *OPTIONAL UO S by 1, 0.5, 0.25 and 0.125 to form an amplifier with a gain of 16, 8, 4, 2, when LT1204 #1 is selected. LT1204 #2 is connected to the same attenuator. When enabled (LT1204 #1 disabled), it results in gain of 1, 0.5, 0.25 and 0.125. The wide input common-mode range of the LT1204 is needed to accept inputs of 8VP-P. 4-Input Differential Receiver LT1204s can be connected inverting and noninverting as shown to make a 4-input differential receiver. The receiver can be used to convert differential signals sent over a low cost twisted-pair to a single-ended output or used in video loop-thru connections. The logic inputs A0 and A1 are tied together because the same channels are selected on each LT1204. By using the Disable feature, the number of differential inputs can be increased by adding pairs of LT1204s and tying the outputs of the noninverting LT1204s (#1) together. Switching transients are reduced in this receiver because the transient from LT1204 #2 subtracted from the transient of LT1204 #1. 4-Input Differential Receiver A0 A1 S/D EN IN 1 IN 2 IN 3 IN 4 +A0 + A1 S/D + LT1204 EN + #1 - 1k 75 VOUT 75 68 -IN 1 -IN 2 1k* 1k* -IN 3 -IN 4 +A0 + A1 S/D + LT1204 EN + #2 - 1k LT1204 * AI20 1k 17 LT1204 TYPICAL APPLICATI Differential Receiver Switching Waveforms CABLE OUTPUT LT1204 #2 OUTPUT A0 PIN 9 Differential Receiver Response DIFFERENTIAL RECEIVER RESPONSE (dB) 20 VS = 15V RL = 100 DIFFERENTIAL MODE RESPONSE 0 -20 -40 COMMON-MODE RESPONSE -60 10k 100k 1M 10M FREQUENCY (Hz) 100M LT1204 * AI22 VIN 0 VIN 1 75 VIN 2 VIN 3 1k 18 UO + + + + - + - S 4-Input Twisted-Pair Driver It is possible to send and receive color composite video signals appreciable distances on a low cost twisted-pair. The cost advantage of this technique is significant. Standard 75 RG-59/U coaxial cable cost between 25 and 50 per foot. PVC twisted-pair is only pennies per foot. Differential signal transmission resists noise because the interference is present as a common-mode signal. The LT1204 can select one of four video cameras for instance, and drive the video signal on to the twisted-pair. The circuit uses an LT1227 current feedback amplifier connected with a gain of - 2, and an LT1204 with a gain of 2. The 47 resistors back-terminate the low cost cable in its characteristic impedance to prevent reflections. The receiver for the differential signal is an LT1193 connected for a gain of +2. Resistors R1, R2 and capacitors C1, C2 are used for cable compensation for loss through the twisted-pair. Alternately, a pair of LT1204s can be used to perform the differential to single-ended conversion. LT1204 * AI09 4-Input Twisted-Pair Driver/Receiver LT1204 1k 47 1000 FT OF TWISTED-PAIR 91 + 75 2k 47 - + - 18 680pF 390 300pF 300 200 LT1193 LT1227 300 LT1204 * AI23 LT1204 TYPICAL APPLICATI Multiburst Pattern Passed Through 1000 Feet of Twisted-Pair, No Cable Compensation INPUT PACKAGE DESCRIPTIO 0.300 - 0.325 (7.620 - 8.255) 0.009 - 0.015 (0.229 - 0.381) ( +0.025 0.325 -0.015 8.255 +0.635 -0.381 ) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U UO S Multiburst Pattern Passed Through 1000 Feet of Twisted-Pair, with Cable Compensation OUTPUT INPUT OUTPUT LT1204 * AI24 LT1204 * AI25 Dimensions in inches (millimeters) unless otherwise noted. N Package 16-Lead Plastic DIP 0.770 (19.558) MAX 16 15 14 13 12 11 10 9 0.260 0.010 (6.604 0.254) 1 0.130 0.005 (3.302 0.127) 2 3 4 5 6 7 8 0.045 - 0.065 (1.143 - 1.651) 0.015 (0.381) MIN 0.065 (1.651) TYP 0.125 (3.175) MIN 0.045 0.015 (1.143 0.381) 0.100 0.010 (2.540 0.254) 0.018 0.003 (0.457 0.076) N16 0492 19 LT1204 PACKAGE DESCRIPTIO U Dimensions in inches (millimeters) unless otherwise noted. S Package 16-Lead Plastic SOL 0.398 - 0.413 (10.109 - 10.490) (NOTE 2) 16 15 14 13 12 11 10 9 NOTE 1 0.394 - 0.419 (10.007 - 10.643) 0.005 (0.127) RAD MIN 0.291 - 0.299 (7.391 - 7.595) (NOTE 2) 0.010 - 0.029 x 45 (0.254 - 0.737) 1 2 3 4 5 6 7 8 0.093 - 0.104 (2.362 - 2.642) 0.037 - 0.045 (0.940 - 1.143) 0 - 8 TYP 0.050 (1.270) TYP 0.009 - 0.013 (0.229 - 0.330) NOTE 1 0.016 - 0.050 (0.406 - 1.270) 0.004 - 0.012 (0.102 - 0.305) NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS. 2. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm). 0.014 - 0.019 (0.356 - 0.482) TYP SOL16 0392 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977 LT/GP 1093 10K REV 0 * PRINTED IN USA (c) LINEAR TECHNOLOGY CORPORATION 1993 |
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