![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
ICs for Video Camera AN2101FH Single chip, analog signal processor IC for CCD camera I Overview The AN2101FH is a single chip IC optimal to process the video signal of a CCD camera, incorporating a luminance signal processor and an encoder. With built-in DACs (8-bit: 18-ch) for adjustment, various adjustments and controls are done with serial data. 60 61 14.000.20 12.000.20 41 40 Unit: mm I Features * For 510H (250 000 pixels) CCD * Applicable for both NTSC and PAL * Y-LPF built in * Adjustment-use DAC (8-bit: 18-ch) built in * Iris built in 80 1 (1.25) 0.50 20 0.18 +0.10 -0.05 21 0.900.10 1.950.20 (1.25) 12.000.20 14.000.20 (1.00) 0.15 -0.05 +0.10 Seating plane 0.900.10 0.100.10 0 to 10 0.500.20 QFP080-P-1212 I Applications * A variety of CCD cameras such as video camera, surveillance camera, board camera, TV phone, TV conference system, input camera for PC, etc. Note) The package of this product will be changed to lead-free type (QFP080-P-1212A). See the new package dimensions section later of this datasheet. Publication date: November 2001 SDB00043BEB 1 AN2101FH I Block Diagram CGAM R-Y in CGAM Y-B in CSW R-Y out CSW Y-B out Sync. mix. in Base clip out 1HGC out 2 HAP BC in 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 CGAM knee 61 1HGC LPF 1HGC in 2 62 R-Y DCC 63 1HGC out 1 64 B-Y DCC 65 1HGC in 1 66 S/H DCC1 67 S/H out 1 68 S/H out 2 69 VREF 70 SP2 71 SP1 72 S/H DCC2 73 CDS Sig. in 74 AGC cont. 75 ALC DCC 76 CPOB/HC 77 CP2/PBLK/CBLK 78 CDS Sig. in 79 White Clip 80 Pulse sepa. Pulse sepa. Clamp PBLK DC cont. CPOB VREF VREF 1H GC DA9 DA8 1H GC VREF 1HGC LPF FH2 H L H FH2 L CPOB Clamp Clamp CGAM GC B-Y LPF DC cont. CP2 CBLK DA16 B-Y GC CGAM GC B-Y LPF CP2 CBLK DA6 R-Y mat. DA14 B-Y mat. Clamp CP2 LLSUP DA7 DL DA18 Y fade -68dB Base clip DL Base clip DL 41 40 HAP BC 39 Y out 38 Fade B/W 37 Edge test Pblic 36 Fade cont. YAP 35 VAP out LPF 34 PED set 32 YGCM DCC DC cont. CP2 31 1H GAM in 30 YGAM knee 29 0H GAM in 28 PBLK PBLK Clamp Clamp CPOB CPOB CBLK H-L clip DC cont. PED det. Fade cont. R-Y DA15 GC Gamma Gamma cont. Clamp CPOB DC cont. MIX Burst phase 33 YGAM out Gamma Y amp. YGAM LPF PBLK FH/2 L DA17 CPOB HC DC cont. WB DA2 GC S/H LPF S/H 2 Y main LPF H HC DA1 MDD PBLK HC RX GC S/H LPF S/H 1 WB GC DA11 Clamp Clamp CPOB CPOB EDGC Clamp Burst amp. DA5 MDD HLUMI C-SUP HAP 0D in VAP BC in LLSUP in HAP out B-Y out R-Y out C0H in C1H in VAP in Sync. VCC2 GND VREF Clamp HC AGC CP2 27 AGC out 2 26 AGC out 1 25 Burst amp. adj. White clip DL Gamma WBLK GC DL 24 S/H DCC3 8-bit 18-ch Serial D/A C fade -60dB 23 Burst phase adj. C-HC 22 Chroma out 21 CHC/BFP ch.12 ch.13 ch.10 Load SCK Data Pulse sepa. DC cont. VDD ch.4 ch.3 VSS Pulse sepa. BPF VDD 10 11 12 13 14 15 16 17 18 19 SCR Data GND IRIS WBLK out WBLK in IRIS Gamma FH/2 VCC1 R-Y in ch.10 For AGC B-Y in ch.12 ch.13 Load SCK VDD ch.4 ch.3 VSS I Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 2 Description IRIS GAM out IRIS WBLK out GND1 WBLK input FH/2 input VCC1 DAC output ch.4 DAC output ch.3 DAC output ch.2 Pin No. 10 11 12 13 14 15 16 17 18 SDB00043BEB Description DAC output ch.1 DAC output ch.12 Load input SCK input Data input VSS R-Y in B-Y in VDD SCB 20 1 2 3 4 5 6 7 8 9 AN2101FH I Pin Descriptions (continued) Pin No. 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 SCR SCB BFP input/high colorfulness chroma clip setting Chroma output Burst phase setting S/H DC stabilizing capacitance 3 Burst amplitude setting AGC out 1 AGC out 2 VREF in (direct connection to pin 70) Luminance 0H in Luminance gamma knee Luminance 1H in Luminance gamma DC stabilizing capacitance Luminance gamma output Pedestal setting V aperture output Fade setting Edge test Fade level setting Luminance signal output H aperture coring setting H aperture generating circuit V aperture coring setting Sync. input H aperture output H aperture coring input V aperture coring input GND 2 Luminance contour correction output Luminance sync. Mix. in Description Pin No. 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 Description Luminance signal detection input (LLSUP) R-Y out B-Y out VCC2 CGAM R-Y in CGAM Y-B in CSW Y-B out CSW R-Y out C1H in C0H in Delay signal amp. output 2 Color difference gamma Knee Delay signal amp. input 2 R-Y DC stabilizing capacitance Delay signal amp. output 1 B-Y DC stabilizing capacitance Delay signal amp. input 1 S/H DC stabilizing capacitance 1 S/H WB output 1 S/H WB output 2 VREF output SP2 input SP1 input S/H DC stabilizing capacitance 2 CDS signal in (main) AGC control ALC DC stabilizing capacitance CPOB input/luminance high cut setting CP2 / PBLK / CBLK input CDS signal in (ALC) Color difference white clip setting SDB00043BEB 3 AN2101FH I Absolute Maximum Ratings Parameter Supply voltage Supply current Power dissipation *2 *1 Symbol VCC ICC PD Topr Tstg Rating 5.5 130 360 -20 to +70 -55 to +125 Unit V mA mW C C Operating ambient temperature Storage temperature *1 Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25C. *2: The power dissipation shown is the value for Ta = 70C. I Recommended Operating Range Parameter Supply voltage Symbol VCC Range 4.3 to 5.1 Unit V I Electrical Characteristics at Ta = 25C Parameter Circuit current Reference voltage 1 Reference voltage 2 Pulse separation CPOB Pulse separation PBLK Pulse separation CP2 Pulse separation CBLK Pulse separation FH/2 Pulse separation Sync. Pulse separation BFP Pulse separation SP1 Pulse separation SP2 AGC maximum gain AGC minimum gain WB characteristics 1 WB characteristics 2 S/H characteristics 1 S/H characteristics 2 WB FH 2-step adjustment Iris GC characteristic Iris gate step Iris gamma 1 Iris gamma 2 4 Symbol ITOT VREF VDD VCPOB VPBLK VCP2 VCBLK VFH2 VSYNC VBEP VSP1 VSP2 GAG1 GAG2 VSH2 VSH7 VSH9 VSH10 VSHF VIR2 VWG VIG1 GIG2 VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V VCC = 4.4 V V74 = 10 stair step, 50 mV[p-p] V74 = 10 stair step, 1 200 mV[p-p] V74 = sine wave 500 kHz, 500 mV[p-p] V74 = sine wave 500 kHz, 500 mV[p-p] V74 = square wave 500 kHz, 1V[p-p] V74 = square wave 500 kHz, 1V[p-p] V74 = C - GND V79 = 10 stair step, 1 200 mV[p-p] V79 = C - GND V79 = 10 stair step, 1 500 mV[p-p] V79 = 10 stair step, 1 500 mV[p-p] SDB00043BEB Conditions Min 66 1.50 3.30 2.90 1.45 2.60 0.75 1.00 0.80 3.10 0.20 0.20 21.5 -4.5 270 270 430 510 -6 580 -20 320 2.0 Typ 90 1.60 3.40 3.20 1.75 2.80 1.05 1.30 1.10 3.40 0.50 0.50 23.5 -2.0 400 400 630 710 0 780 0 420 3.5 Max 114 1.70 3.50 3.50 2.05 3.10 1.35 1.60 1.40 3.70 0.80 0.80 27.5 0.5 Unit mA V V V V V V V V V V V dB dB 530 mV[p-p] 530 mV[p-p] 830 mV[p-p] 910 mV[p-p] 6 mV[p-p] 980 mV[p-p] 20 mV[p-p] 520 mV[p-p] 5.0 dB AN2101FH I Electrical Characteristics at Ta = 25C (continued) Parameter Iris gamma 3 Iris BLK step difference Delay signal amp gain 1 Delay signal amp gain 2 Luminance gamma characteristic 1 Luminance gamma characteristic 2 Luminance gamma characteristic 3 Luminance gamma BLK stage V aperture gain V aperture BLK step difference After this, at VCC = 5 V H aperture gain H aperture base clip V aperture base clip Luminance output amp gain Luminance high clip level adjustment Luminance low clip level Synchronous signal output level Pedestal control characteristic 1 Pedestal control characteristic 2 Luminance fade characteristic CSW(R-Y) gain CSW(B-Y) gain CSW(R-Y) BLK step difference CSW(B-Y) BLK step difference CSW(R-Y) BFH2 step difference CSW(B-Y) BFH2 step difference Color difference gamma characteristic 1 Color difference gamma characteristic 2 Color difference gamma characteristic 3 Color difference gamma characteristic 4 Color difference gamma characteristic 5 Color difference gamma characteristic 6 VHA1 VHB2 VVB2 GY1 VYH VYL VYS VYP1 VYP2 GYFB GCS1 GCS2 VCSB1 VCSB2 VCSF1 VCSF2 VCG1 GCG2 GCG3 VCG4 GCG5 GCG6 V49 = sine wave, 4 MHz, 300 mV[p-p] 1 500 V45 = sine wave, 500 kHz, 100 mV[p-p] V46 = sine wave, 500 kHz, 100 mV[p-p] V49 = 10 stair step, 600 mV[p-p] V49 = 10 stair step, 1V[p-p] V49 = 10 stair step, -200 mV[p-p] V49 = C - GND V49 = C - GND V49 = C - GND V49 = 10 stair step, 600 mV[p-p] 0 0 -1.5 780 -40 263 40 -30 1 800 30 30 0 800 -20 290 65 -15 -40 0 0 0 0 0 0 230 2 100 mV[p-p] 60 60 1.5 mV[p-p] mV[p-p] dB Symbol GIG3 VWB G1H2 G1H5 VYG1 GYG2 GYG3 VYGB VVA1 VVAB Conditions V79 = 10 stair step, 1 500 mV[p-p] V79 = C - GND V66 = sine wave, 500 kHz, 500 mV[p-p] V62 = sine wave, 500 kHz, 500 mV[p-p] V29 = 10 stair step, 700 mV[p-p] V29 = 10 stair step, 700 mV[p-p] V29 = 10 stair step, 1 500 mV[p-p] V29 = C - GND V31 = sine wave, 500 kHz, 300 mV[p-p] V29 = V31 = C - GND Min 4.0 -20 6.5 6.5 450 -13 2.0 -20 -20 Typ 5.5 0 8.5 8.5 550 -11 4.0 0 Max 20 -9 6.0 20 Unit dB mV[p-p] dB dB 650 mV[p-p] dB dB mV[p-p] -1 350 -1 150 -950 mV[p-p] 0 20 mV[p-p] 820 mV[p-p] 0 mV[p-p] 317 mV[p-p] 90 0 -26 1.5 1.5 20 20 20 20 mV[p-p] mV[p-p] dB dB dB mV[p-p] mV[p-p] mV[p-p] mV[p-p] V58 = V59 = 10 stair step, 600 mV[p-p] -1.5 V58 = V59 = 10 stair step, 600 mV[p-p] -1.5 V58 = V59 = C - GND V58 = V59 = C - GND V58 = V59 = C - GND V58 = V59 = C - GND V29 = 10 stair step, 700 mV[p-p] V54 = 10 stair step, 350 mV[p-p] V29 = 10 stair step, 700 mV[p-p] V54 = 10 stair step, 350 mV[p-p] V29 = 10 stair step, 1 500 mV[p-p] V54 = 10 stair step, 750 mV[p-p] V29 = 10 stair step, 700 mV[p-p] V5 = 10 stair step, 350 mV[p-p] V29 = 10 stair step, 700 mV[p-p] V55 = 10 stair step, 350 mV[p-p] V29 = 10 stair step, 1 500 mV[p-p] V55 = 10 stair step, 750 mV[p-p] SDB00043BEB -20 -20 -20 -20 170 290 mV[p-p] -8.5 4.0 dB dB -12.5 -10.5 1.0 170 2.5 230 290 mV[p-p] -8.5 4.0 dB dB -12.5 -10.5 1.0 2.5 5 AN2101FH I Electrical Characteristics at VCC = 5 V, Ta = 25C (continued) Parameter Symbol Conditions V29 = 10 stair step, 500 mV[p-p] V55 = C - GND V29 = 10 stair step, 700 mV[p-p] V54 = C - GND V54 = sine wave, 500 kHz, 200 mV[p-p] V55 = sine wave, 500 kHz, 200 mV[p-p] V54 = 10 stair step, 300 mV[p-p] V55 = 10 stair step, 300 mV[p-p] V54 = C - GND V54 = C - GND V16 = white 200 mV[p-p] V17 = C - GND V16 = white 200 mV[p-p] V17 = C - GND V16 = C - GND V17 = white 200 mV[p-p] V16 = white 400 mV[p-p] V17 = C - GND V16 = white 400 mV[p-p] V17 = C - GND V16 = white 200 mV[p-p] V17 = C - GND V16 = V49 = white 500 V[p-p] V17 = C - GND Min -70 -70 9.5 -1.5 500 -2.0 -20 -20 260 4.5 - 0.5 7.0 7.0 Typ Max Unit After this, at VCC = 5 V (continued) Gamma control leak 1 Gamma control leak 2 R-Y gain characteristic B-Y gain characteristic B-Y matrix characteristic R-Y matrix characteristic R-Y BLK step difference B-Y BLK step difference Burst level Chroma output amplitude (R) Chroma output amplitude (B) Chroma high cut characteristic 1 Chroma high cut characteristic 2 Chroma fade characteristic High luminance chroma suppress Chroma BPF gain Color difference edge suppress Luminance LPF characteristic S/H LPF characteristic Luminance gamma LPF characteristic V aperture LPF characteristic Luminance white fade characteristic Color difference LPF characteristic DAC External output 1 DAC External output 2 DAC External output 3 DAC External output 4 DAC External output 5 VCGL1 VCGL2 GCL1 GCL3 VCM1 GCM2 VCB1 VCB2 VBU1 GCR1 GCR3 GCH1 GCH2 GCF GCS GBPF1 GEDGE V7 V8 V9 V10 V11 0 0 11.5 0 650 0 0 0 300 6.0 1.0 8.5 8.5 -40 -40 -2.5 -40 to to to to to 70 70 13.5 1.5 mV[p-p] mV[p-p] dB dB 800 mV[p-p] 2.0 20 20 dB mV[p-p] mV[p-p] 325 mV[p-p] 7.5 2.5 10.0 10.0 -20 -20 - 0.5 -20 -15 -15 -15 -15 -15 3.3 3.3 3.3 3.3 3.3 dB dB dB dB dB dB dB dB dB dB dB dB mV[p-p] dB V V V V V V16 = sine wave, 4 MHz, 400 mV[p-p] -4.5 V17 = C - GND V54 = sine wave, 500kHz, 200 mV[p-p] V74 = sine wave, 4.77 MHz, 500 mV[p-p] V74 = sine wave, 3.5 MHz, 500 mV[p-p] V29 = sine wave, 4.77 MHz, 300 mV[p-p] V31 = sine wave, 4.77 MHz, 300 mV[p-p] V49 = C - GND V54 = sine wave, 3.5 MHz, 200 mV[p-p] Data 00 to FF Data 00 to FF Data 00 to FF Data 00 to FF Data 00 to FF 900 0.4 0.4 0.4 0.4 0.4 6 SDB00043BEB AN2101FH * Pulse timing chart 2.5 s 4.5 V 3 s 9 s 11 s 2.5 V 1.5 s 1.5 V CP2 0.5 s PBLK CBLK 3 s 1.5 s CPOB 4.5 V 1.3 s 3V 1 to 3 V variable 1 to 3 V variable 1 s Sync. 3 s 0V 2V fH/2 0 0 30 ns 2V SP 1 s 0V 0.8 V * DAC timing chart MSB Data D11 D10 D9 D1 LSB D0 SCK Load D/A output SDB00043BEB 7 AN2101FH I Terminal Equivalent Circuits Pin No. 1 Symbol Iris output 20 A Equivalent circuit Description * ALC Det. output * Output after BLK and -correction of the input 2 Signal waveform typ. 500 mV[p-p] signal from pin 79. (GND with a resistor) * Output DC: 1.6 V 2 Iris gate output * ALC Det. gate output * After doing BLK and -correction on the signal inputted to pin 79, the 2 20 A gated signal with WBLK is outputted. * Output DC: 1.6 V WBLK = low typ. 500 mV[p-p] (GND with a resistor) 3 4 GND WBLK in * Gate pulse input (gain control DC input) 4 * Gates with pulse the input 100 A Output (%) 360 100 50 signal of pin 79 or controls with DC the gain of the input signal. 0 1 2 3 5 FH/2 in * FH/2 pulse input * Threshold voltage: 1.3 V 7 k 5 Refer to a timing chart 6 7 VCC1 DA ch.4 output VCC * typ. 4.5 V * DA external output Output (V) DC 3 7 300 A 1.9 0.4 00 80 FF 8 SDB00043BEB AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 8 Symbol DA ch.3 output Equivalent circuit VCC Description * DA external output Signal waveform 3 Output (V) 8 300 A 1.9 0.4 00 80 FF 9 DA ch.2 output VCC * DA external output 3 Output (V) 9 300 A 1.9 0.4 00 80 FF 10 DA ch.1 output VCC * DA external output 3 Output (V) 10 300 A 1.9 0.4 00 80 FF 11 DA ch.12 output VCC * DA external output * GND for pin 77 in a test mode 11 300 A Output (V) 3 1.9 0.4 00 80 FF * Monitor DA7 to 16ch in a in a test mode 12 Load 7 k 12 * Serial data latch pulse input * Input impedance: 1 M or more Refer to a DAC timing chart 13 Clock 7 k 13 * Serial data shift clock input * Input impedance: 1 M or more Refer to a DAC timing chart SDB00043BEB 9 AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 14 Symbol Data 7 k 14 Equivalent circuit Description Signal waveform * Data input for serial data Refer to a DAC timing chart shift * Input impedance: 1 M or more 15 16 VSS R-Y in CP2 8 k VREF 50 A 8 k VCC 50 A * GND * R-Y input (C coupling) * If R-Y color differential typ. 400 mV[p-p] max. 800 mV[p-p] 16 signal outputted from pin 51 is inputted, the signal is clamped to VREF and 8 k 8 k modulated to chroma signal. 50 A 8 k VCC 50 A (At shooting a color-bar picture) 17 B-Y in CP2 8 k VREF * B-Y input (C coupling) * If B-Y color differential signal outputted from pin 52 is inputted, the signal is clamped to VREF and typ. 400 mV[p-p] max. 800 mV[p-p] 17 8 k 8 k modulated to chroma signal. VCC (At shooting a color-bar picture) 18 VDD 1 k * Output DC: 3.4 V * To be used as a power 18 DC source for an internal CMOS block including DACs, etc. * Rch sub carrier input NTSC 3.58 MHz (PAL 4.43 MHz) 11 k 30 k 19 SCR 360 19 * Modulates a color differential signal to a chroma signal, with a sub-carrier. 500 mV 10 k 100 A VREF 20 SCB 360 20 * Bch sub carrier input * Modulates a color differential signal to a chroma signal, with a sub-carrier. VREF 90 10 k 100 A 10 SDB00043BEB AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 21 Symbol CHC/BFP VCC 40 A 360 21 Equivalent circuit Description * Burst gate pulse input. Threshold: 3.3V Signal waveform BGP * Its timing is of the burst signal timing. 3.3 V 1 k 20 A * Chroma clip setting input Sets a chroma suppress threshold for high luminance. Chroma clip setting DC 22 C-out 50 A * Chroma signal output * Output DC: 1.6 V 22 Chroma signal * Output amplitude is 60 A clipped 2.5 times to a burst. * Burst phase setting NTSC; GND proximity 16 k Burst 300 mV 23 Burst phase setting R-Y 70 k PAL; VREF proximity 23 B-Y 7.5 k VREF 24 S/H DCC3 1.7 k 50 k * DC control A.C. coupling DC 24 CP2 15 A 1.5 k VREF 25 Burst level setting 70 k 70 k 7.5 k 25 7.5 k * Burst amplitude setting typ. VREF R-Y B-Y 2.5 k 2.5 k VREF VREF SDB00043BEB 11 AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 26 Symbol AGC out 1 70 A Equivalent circuit Description * Luminance AGC output 1 Output DC: 1.6 V 26 Signal waveform * Outputs, through AGC and LPF, a signal inputted to pin74. (Input to 1HCCD.) * Luminance AGC output 2 Output DC: 1.6 V typ. 500 mV[p-p] 70 A (At shooting a color-bar picture) 27 AGC out 2 70 A 27 * Outputs, through AGC and LPF, a signal inputted to pin 74. (Input to pin 29.) typ. 500 mV[p-p] 70 A (At shooting a color-bar picture) 28 VREF input * Connect to pin 70. * DC: 1.6 V DC 29 0H GAM in 8.5 k 8.5 k * Luminance signal (0H) input * Input the luminance sig20 A typ. 500 mV[p-p] 29 20 A nal outputted from pin 27. (At shooting a color-bar picture) 8.5 k CPOB VREF 8.5 k 30 Y knee 25 k 1.25 k 750 VREF 25 k 1.25 k VCC * Luminance knee adjustment * Sets the knee point for luminance -correction typ. open DC 30 750 31 1H GAN in 8.5 k 8.5 k * Luminance signal (1H) input * Input, via 1HCCD, the lutyp. 500 mV[p-p] 31 20 A 8.5 k CPOB VREF 8.5 k 20 A minance signal outputted from pin 26 after adjusting it to the same level as pin 27 output. (At shooting a color-bar picture) 12 SDB00043BEB AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 32 Symbol Y GAM DC Equivalent circuit VCC 100 A 32 Description * DC control A.C. coupling * Clamps pin 33 output DC VREF Signal waveform DC to VREF. CP20 1.6 k 15 A 33 Y GAM out 190 70 A * Luminance gamma output * correction on the luminance signal inputted to pin 29. Then clamps the output DC to VREF and outputs it. * Pedestal level setting Output mV log 650 200 33 70 A 190 10 70 100 500 1 000 Input mV log 34 PED set 70 k 360 mV 100 NTSC: Approx. 50 mV PAL: Approx. 0 mV 960 34 50 0 1 2 3 34 Voltage 35 VAP out 70 A 190 * Vertical contour correction signal output * Forms a vertical contour 35 400 mV correction signal from the luminance signals of 0H 400 mV 15 k 190 and 1H inputted to pins 29 and pin 31, and outputs it. 36 Fade cont. 40 A 360 * Fade control * Fading out (in) setting for the luminance and chroma signals. 960 1 0 -20 -40 -60 [dB] Output 1.5 2 36 [V] 36 SDB00043BEB 13 AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 37 Symbol Edge test Equivalent circuit 160 Description * Edge signal detection * Output for testing Signal waveform 37 360 10 k 70 A 1MHz edge-full-wave rectified voltage 38 Fade B/W 40 A 360 * Black and white fade changeover * Fade out level setting From black to white Output mV 1 000 38 500 1 k (0 mV[p-p] to 800 mV[p-p]) * Luminance signal output 1 1.5 2 38 [V] 39 Y out 190 * Outputs the luminance signal inputted to pin 49 39 70 A 400 A after high clip, low clip, pedestal setting and sync. mix. Sync. 286 mV Signal typ. 716 mV 40 HAP BC 30 k 360 * Horizontal contour correction noise rejection setting * Reduces the noise com1 k 60 k 48 Output mV 150 40 -300 -100 100 -150 ponent of the horizontal contour correction signal inputted to pin 45. 300 Input mV 40 = 1.8 V 41 HAP 0D in 100 A 360 41 * Horizontal contour correction signal input * Input the luminance signal outputted from pin 33. Output mV log 650 200 1 k 10 70 100 500 1 000 Input mV log 14 SDB00043BEB AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 42 Symbol VAP BC 20 A 360 42 30 k Equivalent circuit Description * Vertical contour correction noise rejection set ting * To reduce the noise com- Signal waveform 48 Output mV 150 -300 -100 100 -150 1 k 60 k ponent of the vertical contour correction signal inputted to pin 46. 300 Input mV 42 = 1.8 V 43 Sync. 64 k 360 50 k * Sync. pulse input threshold: 1.2 V Refer to a timing chart 43 1 k 40 k 44 HAP out 15 k 200 * Horizontal contour correction signal output * Forms the horizontal con44 1V tour correction signal from the luminance signal inputted to pin 41 and pin 42. Then, outputs it. * Horizontal contour correction signal input 1V 70 A 200 45 HAP BC in 50 A 360 45 1V * Input the horizontal contour correction signal out5 k VREF 1 k 1V putted from pin 44. * Vertical contour correction signal input 400 mV 46 VAP BC in 50 A 360 46 * Input the vertical contour correction signal output5 k VREF 1 k 400 mV ted from pin 35. 47 GND SDB00043BEB 15 AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 48 Symbol Base clip out 190 Equivalent circuit Description * Luminance output with a contour correction * Mixes the horizontal and 48 Signal waveform vertical contour correction signals inputted to pin 45 and pin 46 with the noisereduced luminance signal. Then output it. 70 A 190 49 Sync. mix in CP2 8 k VREF 8 k 50 A * Luminance sigunal input with a contour correction * Input the luminance signal outputted from pin 48. 49 8 k 8 k 1 k 50 LLSUP in 30 A 360 48 k 44 k * Luminance detection signal input * Input the DC which is made from integrating a luminance signal, so as to suppress the horizontal 8.5 k 8.5 k 50 and vertical contour correction signals at a low luminance level. 51 R-Y out 190 * Color difference (R-Y) output * The R-Y color difference signal inputted to pin 54 is 51 typ. 400 mV[p-p] max. 800 mV[p-p] outputted after -correction, LPF and color phase correction. * Input to pin 16. 13 k 190 (At shooting a color-bar picture) 16 SDB00043BEB AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 52 Symbol B-Y out 190 Equivalent circuit Description * Color difference (B-Y) output * The B-Y color difference 52 Signal waveform typ. 400 mV[p-p] max. 800 mV[p-p] signal inputted to pin 55 is outputted after -correction, LPF and color phase correction. * typ. 4.5 V 13 k 190 (At shooting a color-bar picture) 53 54 VCC2 CGAM R-Y in 8.5 k 20 A 8.5 k 20 A DC typ. 400 mV[p-p] max. 800 mV[p-p] (Before -correction) * Color difference (R-Y) gamma input * Input the R-Y color difference signal outputted from pin 57. 54 8.5 k 8.5 k 1 k (At shooting a color-bar picture) 55 CGAM Y-B in 8.5 k 8.5 k 20 A 20 A * Color difference (Y-B) gamma input * Input the Y-B color difference signal outputted from pin 56. typ. 400 mV[p-p] max. 800 mV[p-p] (Before -correction) 55 8.5 k 8.5 k 1 k (At shooting a color-bar picture) 56 CSW Y-B out 30 A * Simultaneous output (Y-B) * Outputs the color differ56 ence line sequential signal inputted to pin 58 and pin 59 as a Y-B color difference signal by fH/2 pulse. 70 A 57 CSW R-Y out 30 A * Simultaneous output (R-Y) * Outputs the color differ57 ence line sequential signal inputted to pin 58 and pin 59 as a R-Y color difference signal by fH/2 pulse. 70 A SDB00043BEB 17 AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 58 Symbol C1H in 20 A 20 A Equivalent circuit Description * Simultaneous input (C1H) * Input the color difference line sequential signal from pin 60 after a 1HCCD gain adjustment. Signal waveform 58 8.5 k 8.5 k 1 k 1H (R-Y) 1H (Y-B) 59 C0H in 20 A 20 A * Simultaneous input (C0H) * Input the color difference line sequential signal outputted from pin 68. 59 8.5 k 8.5 k 1 k 0H (Y-B) 0H (R-Y) 60 1HGC out 2 70 A 190 * CCD DL gain control output 2 * If the line sequential color 60 differential signal outputted from pin 68 is inputted through a 1HCCD to 100 A 70 A 190 pin 62, the same level signal as pin 69 output is outputted. 61 C gamma knee 61 28.2 k 30 A * Color difference -knee adjustment * Sets the knee point for DC 400 1 k VREF color difference -correction. typ. open * CCD DL gain control input 2 * Input the color difference 62 1HGC in 2 18 k 62 360 300 k 9 k 10 k 25 k line sequential signal outputted from pin 68 via 1HCCD. 1H (R-Y) 1H (Y-B) 18 SDB00043BEB AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 63 Symbol R-Y DCC Equivalent circuit 1.7 k 50 k Description * DC control A.C. coupling * Clamps the R-Y color difference signal outputted from pin 51 to VREF and Signal waveform DC 63 CP2 15 A 1.5 k VREF then blanks it. * CCD DL gain control input 1 * If the luminance signal Vertical aperture adjustment 64 1HGC out 1 190 70 A 64 outputted from pin 27 is inputted through a 1HCCD to pin 66, the same level signal as pin 26 is outputted. * DC control A.C. coupling * Clamps the B-Y color difference signal outputted from pin 52 to VREF and DC 100 A 70 A 190 65 B-Y DCC 1.7 k 50 k 65 CP2 15 A 1.5 k VREF then blanks it. * CCD DL gain control output 1 * Input the luminance signal outputted from pin 27 typ. 500 mV[p-p] 66 1HGC in 1 66 18 k 360 300 k 9 k 10 k 25 k via 1HCCD. * DC control A.C. coupling (At shooting a color-bar picture) 67 S/H DCC1 1.7 k 50 k DC 67 CP2 15 A 1.5 k VREF SDB00043BEB 19 AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 68 Symbol S/H out 1 200 Equivalent circuit Description * S/H output 1 * Carries out the color separation and white balance 68 Signal waveform for the CDS signal inputted to pin 74, then outputs it. * Input to 1HCCD. 13 k 200 0H (Y-B) 0H (R-Y) 69 S/H out 2 200 * S/H output 2 * Outputs the same signal 69 as pin 68 * Input it to pin 56 13 k 200 0H (Y-B) 0H (R-Y) 70 VREF * VREF (1.6 V) output * Impedance: 70 10 k 56 k DC Approx. 1 * Input this voltage to pin 28. 71 SP2 90 A 360 60 k * Sampling pulse 2 input * Pulse threshold: 1 V Refer to a pulse timing 71 200 30 k 72 SP1 90 A 360 60 k * Sampling pulse 1 input * Pulse threshold: 1 V Refer to a pulse timing 72 200 30 k 20 SDB00043BEB AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 73 Symbol S/H DCC2 Equivalent circuit 1.7 k 50 k Description * DC control A.C. coupling Signal waveform DC 73 CP2 15 A 1.5 k VREF 74 CDS S-G in 1 20 A 8.5 k 8.5 k 20 A * CDS signal input 1 (AGC input) * Clamp input of CDS signal max. 1500 mV 74 typ. 500 mV 8.5 k 8.5 k 1 k 1H 75 AGC cont. 30 A 360 * AGC control voltage input Output [dB] 20 10 0 1 1.5 2 75 [V] 75 76 ALL DCC 1.7 k 50 k * DC control A.C. coupling * Clamps ACC output to VREF and gates it, then output it. DC 76 CP2 15 A 1.5 k VREF 77 CPOB/HC 20 A 360 50 k * CPOB pulse input Threshold: 3.3 V * CDS input high clip: typ. about VREF + 1.3 V CPOB 77 3.3 V 1 k 20 A 40 k High clip level SDB00043BEB 21 AN2101FH I Terminal Equivalent Circuits (continued) Pin No. 78 Symbol CP2/DBLK/ CBLK 360 VCC 20 A Equivalent circuit VDD Description * CP2 pulse input Threshold: 3 V Signal waveform CP2 3 * PBLK pulse input Threshold voltage: 1.8 V PBLK 1.8 78 20 A 20 A 1 k CBLK 1.1 * CBLK pulse input Threshold voltage: 1.1 V 79 CDS S-G in 2 8.5 k 8.5 k * CDS signal input 2 (ALC input) max. 1500 mV typ. 500 mV 79 20 A 8.5 k CPOB VREF 8.5 k 20 A 1H 80 White clip * Color difference signal white clip DC setting 80 360 * Sets the threshold voltage 100 A to clip the color difference signal at a high luminance level. I Cautions on Use * Keep pin 36 (fade-in) lower than 0.5 V that is for a fade mode. * Note that pin 12DA external output becomes a test mode for DA output used inside, if pin 77 voltage is set to (0 V). * Be cautious in use because pin 29 static surge breakdown voltage level is low as compared with other pins. Pin 29 breakdown level: C = 200PF +200 V -230 V to -240 V * A power rise timing should be considered somewhere around 15 ms. If it differs much from it, it is likely to cause an abnormal operation. * If you use this device without inputting a serial data, it is likely to cause an abnormal operation. 22 SDB00043BEB AN2101FH I New Package Dimensions (Unit: mm) * QFP080-P-1212A (Lead-free package) 14.000.20 12.000.20 60 61 41 40 (1.25) 80 1 (1.25) 0.50 20 0.180.05 0.10 M 21 12.000.20 14.000.20 (1.00) 0.150.05 0.10 Seating plane 0 to 10 0.500.20 0.100.10 1.95020 SDB00043BEB 23 Request for your special attention and precautions in using the technical information and semiconductors described in this material (1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. (2) The technical information described in this material is limited to showing representative characteristics and applied circuit examples of the products. It does not constitute the warranting of industrial property, the granting of relative rights, or the granting of any license. (3) The products described in this material are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: * Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. * Any applications other than the standard applications intended. (4) The products and product specifications described in this material are subject to change without notice for reasons of modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, redundant design is recommended, so that such equipment may not violate relevant laws or regulations because of the function of our products. (6) When using products for which dry packing is required, observe the conditions (including shelf life and after-unpacking standby time) agreed upon when specification sheets are individually exchanged. (7) No part of this material may be reprinted or reproduced by any means without written permission from our company. Please read the following notes before using the datasheets A. These materials are intended as a reference to assist customers with the selection of Panasonic semiconductor products best suited to their applications. Due to modification or other reasons, any information contained in this material, such as available product types, technical data, and so on, is subject to change without notice. Customers are advised to contact our semiconductor sales office and obtain the latest information before starting precise technical research and/or purchasing activities. B. Panasonic is endeavoring to continually improve the quality and reliability of these materials but there is always the possibility that further rectifications will be required in the future. Therefore, Panasonic will not assume any liability for any damages arising from any errors etc. that may appear in this material. C. These materials are solely intended for a customer's individual use. Therefore, without the prior written approval of Panasonic, any other use such as reproducing, selling, or distributing this material to a third party, via the Internet or in any other way, is prohibited. 2001 MAR |
Price & Availability of AN2101FH
![]() |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |