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HA-5020
Data Sheet September 1998 File Number 2845.8
100MHz Current Feedback Video Amplifier With Disable
The HA-5020 is a wide bandwidth, high slew rate amplifier optimized for video applications and gains between 1 and 10. Manufactured on Intersil's Reduced Feature Complementary Bipolar DI process, this amplifier uses current mode feedback to maintain higher bandwidth at a given gain than conventional voltage feedback amplifiers. Since it is a closed loop device, the HA-5020 offers better gain accuracy and lower distortion than open loop buffers. The HA-5020 features low differential gain and phase and will drive two double terminated 75 coax cables to video levels with low distortion. Adding a gain flatness performance of 0.1dB makes this amplifier ideal for demanding video applications. The bandwidth and slew rate of the HA-5020 are relatively independent of closed loop gain. The 100MHz unity gain bandwidth only decreases to 60MHz at a gain of 10. The HA-5020 used in place of a conventional op amp will yield a significant improvement in the speed power product. To further reduce power, HA-5020 has a disable function which significantly reduces supply current, while forcing the output to a true high impedance state. This allows the outputs of multiple amplifiers to be wire-OR'd into multiplexer configurations. The device also includes output short circuit protection and output offset voltage adjustment. The HA-5020 is available in commercial and industrial temperature ranges, and a choice of packages. See the "Ordering Information" section below for more information. For military grade product, please refer to the HA-5020/883 datasheet. For multi channel versions of the HA-5020 see the HA5022 dual with disable, HA5023 dual, HA5013 triple, HA5024 quad with disable or HA5025 quad op amp data sheets.
Features
* Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . . . 100MHz * Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800V/s * Output Current . . . . . . . . . . . . . . . . . . . . . . . 30mA (Min) * Drives 3.5V into 75 * Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03% * Differential Phase . . . . . . . . . . . . . . . . . . . . . 0.03 Degrees * Low Input Voltage Noise. . . . . . . . . . . . . . . . . . 4.5nV/Hz * Low Supply Current . . . . . . . . . . . . . . . . . . . . 10mA (Max) * Wide Supply Range . . . . . . . . . . . . . . . . . . . 5V to 15V * Output Enable/Disable * High Performance Replacement for EL2020
Applications
* Unity Gain Video/Wideband Buffer * Video Gain Block * Video Distribution Amp/Coax Cable Driver * Flash A/D Driver * Waveform Generator Output Driver * Current to Voltage Converter; D/A Output Buffer * Radar Systems * Imaging Systems
Ordering Information
PART NUMBER (BRAND) HA3-5020-5 HA9P5020-5 (H50205) TEMP. RANGE (oC) 0 to 75 0 to 75 -40 to 85 PACKAGE 8 Ld PDIP 8 Ld SOIC 8 Ld PDIP PKG. NO. E8.3 M8.15 E8.3
Pinout
HA-5020 (PDIP, SOIC) TOP VIEW
HA3-5020-9
BAL ININ+ V-
1 2 3 4
8
DISABLE V+ OUT BAL
+
-
7 6 5
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
HA-5020
Absolute Maximum Ratings (Note 1)
Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . . . . . . . 36V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V Output Current . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) JC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 130 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A Maximum Junction Temperature (Plastic Packages, Note 1) . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range HA-5020-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC HA-5020-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Maximum power dissipation, including output load, must be designed to maintain junction temperature below 150oC for plastic packages. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VSUPPLY = 15V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified TEMP. (oC) HA-5020-5, -9 MIN TYP MAX UNITS
PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (Notes 3, 14)
TEST CONDITIONS
25 Full
60 50 64 60 -
2 10 3 12 25 -
8 10 8 20 0.1 0.5 0.06 0.2 20 50 0.4 0.5 0.2 0.5
mV mV V/oC dB dB dB dB A A A/V A/V A/V A/V A A A/V A/V A/V A/V
Average Input Offset Voltage Drift VIO Common Mode Rejection Ratio (Note 14) VCM = 10V 4.5V VS 18V
Full 25 Full
VIO Power Supply Rejection Ratio (Note 14)
25 Full
Non-Inverting Input (+IN) Current (Note 14)
25 Full
+IN Common Mode Rejection
VCM = 10V 4.5V VS 18V
25 Full
+IN Power Supply Rejection
25 Full
Inverting Input (-IN) Current (Note 14)
25 Full
-IN Common Mode Rejection
VCM = 10V 4.5V VS 18V
25 Full
-IN Power Supply Rejection
25 Full
TRANSFER CHARACTERISTICS Transimpedance (Notes 9, 14) 25 Full Open Loop DC Voltage Gain (Note 9) RL = 400, VOUT = 10V RL = 100, VOUT = 2.5V 25 Full 25 Full 3500 1000 70 65 60 55 V/mA V/mA dB dB dB dB
Open Loop DC Voltage Gain
2
HA-5020
Electrical Specifications
VSUPPLY = 15V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (Continued) TEMP. (oC) HA-5020-5, -9 MIN TYP MAX UNITS
PARAMETER OUTPUT CHARACTERISTICS Output Voltage Swing (Note 14)
TEST CONDITIONS
RL = 150
25 to 85 -40 to 0
12 11 30 27.5
12.7 11.8 31.7 -
-
V V mA mA
Output Current (Guaranteed by Output Voltage Test)
25 Full
POWER SUPPLY CHARACTERISTICS Quiescent Supply Current (Note 14) Supply Current, Disabled (Note 14) Disable Pin Input Current Minimum Pin 8 Current to Disable (Note 4) Maximum Pin 8 Current to Enable (Note 5) AC CHARACTERISTICS (AV = +1) Slew Rate (Note 6) 25 Full Full Power Bandwidth (Note 7) (Guaranteed by Slew Rate Test) Rise Time (Note 8) Fall Time (Note 8) Propagation Delay (Notes 8, 14) -3dB Bandwidth (Note 14) Settling Time to 1% Settling Time to 0.25% AC CHARACTERISTICS (AV = +10, RF = 383) Slew Rate (Notes 6, 9) 25 Full Full Power Bandwidth (Note 7) (Guaranteed by Slew Rate Test) Rise Time (Note 8) Fall Time (Note 8) Propagation Delay (Notes 8, 14) -3dB Bandwidth Settling Time to 1% Settling Time to 0.1% INTERSIL VALUE ADDED SPECIFICATIONS Input Noise Voltage (Note 14) +Input Noise Current (Note 14) -Input Noise Current (Note 14) Input Common Mode Range -IBIAS Adjust Range (Note 3) Overshoot (Note 14) f = 1kHz f = 1kHz f = 1kHz 25 25 25 Full Full 25 10 25 4.5 2.5 25 12 40 7 nV/Hz pA/Hz pA/Hz V A % VOUT = 100mV 10V Output Step 10V Output Step 25 Full 25 25 25 25 25 25 900 700 14.3 11.1 1100 17.5 8 8 9 60 55 90 V/s V/s MHz MHz ns ns ns MHz ns ns VOUT = 100mV 10V Output Step 10V Output Step 25 Full 25 25 25 25 25 25 600 500 9.6 8.0 800 700 12.7 11.1 5 5 6 100 45 100 V/s V/s MHz MHz ns ns ns MHz ns ns DISABLE = 0V DISABLE = 0V Full Full Full Full Full 350 7.5 5 1.0 10 7.5 1.5 20 mA mA mA A A
3
HA-5020
Electrical Specifications
VSUPPLY = 15V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (Continued) TEMP. (oC) Full Full 25 25 25 DISABLE = 0V 25 HA-5020-5, -9 MIN 50 5 TYP 65 10 200 6 MAX 1 15 UNITS mA A s ns V pF
PARAMETER Output Current, Short Circuit (Note 14) Output Current, Disabled (Note 14) Output Disable Time (Notes 10, 14) Output Enable Time (Notes 11, 14) Supply Voltage Range Output Capacitance, Disabled (Note 12) VIDEO CHARACTERISTICS Differential Gain (Notes 13, 14) Differential Phase (Notes 13, 14) Gain Flatness
TEST CONDITIONS VIN = 10V, VOUT = 0V DISABLE = 0V, VOUT = 10V
RL = 150 RL = 150 To 5MHz
25 25 25
-
0.03 0.03 0.1
-
% Degrees dB
Electrical Specifications
V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified. Parameters are not tested. The limits are guaranteed based on lab characterizations, and reflect lot-to-lot variation. TEMP. (oC) HA-5020-5, -9 MIN TYP MAX UNITS
PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (Notes 3, 14)
TEST CONDITIONS
25 Full
50 35 55 50 -
2 10 3 12 25 -
8 10 8 20 0.1 0.5 0.06 0.2 20 50 0.4 0.5 0.2 0.5
mV mV V/oC dB dB dB dB A A A/V A/V A/V A/V A A A/V A/V A/V A/V
Average Input Offset Voltage Drift VIO Common Mode Rejection Ratio (Notes 14, 15) 3.5V VS 6.5V
Full 25 Full
VIO Power Supply Rejection Ratio (Note 14)
25 Full
Non-Inverting Input (+IN) Current (Note 14)
25 Full
+IN Common Mode Rejection (Note 15)
25 Full
+IN Power Supply Rejection
3.5V VS 6.5V
25 Full
Inverting Input (-IN) Current (Note 14)
25 Full
-IN Common Mode Rejection (Note 15)
25 Full
-IN Power Supply Rejection
3.5V VS 6.5V
25 Full
TRANSFER CHARACTERISTICS Transimpedance (Notes 9, 14) 25 Full Open Loop DC Voltage Gain RL = 400, VOUT = 2.5V 25 Full 1000 850 65 60 V/mA V/mA dB dB
4
HA-5020
Electrical Specifications
V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified. Parameters are not tested. The limits are guaranteed based on lab characterizations, and reflect lot-to-lot variation. (Continued) TEMP. (oC) 25 Full HA-5020-5, -9 MIN 50 45 TYP MAX UNITS dB dB
PARAMETER Open Loop DC Voltage Gain
TEST CONDITIONS RL = 100, VOUT = 2.5V
OUTPUT CHARACTERISTICS Output Voltage Swing (Note 14) 25 to 85 -40 to 0 Output Current (Guaranteed by Output Voltage Test) POWER SUPPLY CHARACTERISTICS Quiescent Supply Current (Note 14) Supply Current, Disabled (Note 14) Disable Pin Input Current Minimum Pin 8 Current to Disable (Note 16) Maximum Pin 8 Current to Enable (Note 5) AC CHARACTERISTICS (AV = +1) Slew Rate (Note 17) Full Power Bandwidth (Note 18) Rise Time (Note 8) Fall Time (Note 8) Propagation Delay (Note 8) Overshoot -3dB Bandwidth (Note 14) Settling Time to 1% Settling Time to 0.25% AC CHARACTERISTICS (AV = +2, RF = 681) Slew Rate (Note 17) Full Power Bandwidth (Note 18) Rise Time (Note 8) Fall Time (Note 8) Propagation Delay (Note 8) Overshoot -3dB Bandwidth (Note 14) Settling Time to 1% Settling Time to 0.25% AC CHARACTERISTICS (AV = +10, RF = 383) Slew Rate (Note 17) Full Power Bandwidth (Note 18) Rise Time (Note 8) Fall Time (Note 8) Propagation Delay (Note 8) Overshoot 25 25 25 25 25 25 350 28 475 38 8 9 9 1.8 V/s MHz ns ns ns % VOUT = 100mV 2V Output Step 2V Output Step 25 25 25 25 25 25 25 25 25 475 26 6 6 6 12 95 50 100 V/s MHz ns ns ns % MHz ns ns VOUT = 100mV 2V Output Step 2V Output Step 25 25 25 25 25 25 25 25 25 215 22 400 28 6 6 6 4.5 125 50 75 V/s MHz ns ns ns % MHz ns ns DISABLE = 0V DISABLE = 0V Full Full Full Full Full 350 7.5 5 1.0 10 7.5 1.5 20 mA mA mA A A RL = 100 25 Full 2.5 2.5 16.6 16.6 3.0 3.0 20 20 V V mA mA
5
HA-5020
Electrical Specifications
V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified. Parameters are not tested. The limits are guaranteed based on lab characterizations, and reflect lot-to-lot variation. (Continued) TEMP. (oC) 25 25 25 HA-5020-5, -9 MIN TYP 65 75 130 MAX UNITS MHz ns ns
PARAMETER -3dB Bandwidth (Note 14) Settling Time to 1% Settling Time to 0.25% INTERSIL VALUE ADDED SPECIFICATIONS Input Noise Voltage (Note 14) +Input Noise Current (Note 14) -Input Noise Current (Note 14) Input Common Mode Range Output Current, Short Circuit Output Current, Disabled (Note 14) Output Disable Time (Notes 14, 20) Output Enable Time (Notes 14, 21) Supply Voltage Range Output Capacitance, Disabled (Note 19) VIDEO CHARACTERISTICS Differential Gain (Notes 13, 14) Differential Phase (Notes 13, 14) Gain Flatness
TEST CONDITIONS VOUT = 100mV 2V Output Step 2V Output Step
f = 1kHz f = 1kHz f = 1kHz
25 25 25 Full
2.5V 40 5 -
4.5 2.5 25 - 60 40 40 6
2 15 -
nV/Hz pA/Hz pA/Hz V mA A s ns V pF
VIN = 2.5V, VOUT = 0V DISABLE = 0V, VOUT = 2.5V, VIN = 0V
Full Full 25 25 25
DISABLE = 0V
25
RL = 150 RL = 150 To 5MHz
25 25 25
-
0.03 0.03 0.1
-
% Degrees dB
NOTES: 3. Suggested VOS Adjust Circuit: The inverting input current (-IBIAS) can be adjusted with an external 10k pot between pins 1 and 5, wiper connected to V+. Since -IBIAS flows through the feedback resistor (RF), the result is an adjustment in offset voltage. The amount of offset voltage adjustment is determined by the value of RF (VOS = -IBIAS*RF). 4. RL = 100, VIN = 10V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is considered disabled when -10mV VOUT +10mV. 5. VIN = 0V. This is the maximum current that can be pulled out of the Disable pin with the HA-5020 remaining enabled. The HA-5020 is considered disabled when the supply current has decreased by at least 0.5mA. 6. VOUT switches from -10V to +10V, or from +10V to -10V. Specification is from the 25% to 75% points. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. Slew Rate FPBW = -------------------------- ; V PEAK = 10V. 2V PEAK
RL = 100, VOUT = 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation. VIN = +10V, Disable = +15V to 0V. Measured from the 50% point of Disable to VOUT = 0V. VIN = +10V, Disable = 0V to +15V. Measured from the 50% point of Disable to VOUT = 10V. VIN = 0V, Force VOUT from 0V to 10V, tR = tF = 50ns. Measured with a VM700A video tester using a NTC-7 composite VITS. See "Typical Performance Curves" for more information. VCM = 2.5V. At -40oC product is tested at VCM = 2.25V because short test duration does not allow self heating. RL = 100. VIN = 2.5V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is considered disabled when -10mV VOUT +10mV. 17. VOUT switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points. Slew Rate 18. FPBW = -------------------------- ; V PEAK = 2V . 2V PEAK 19. VIN = 0V, Force VOUT from 0V to 2.5V, tR = tF = 50ns. 20. VIN = +2V, Disable = +5V to 0V. Measured from the 50% point of Disable to VOUT = 0V. 21. VIN = +2V, Disable = 0V to +5V. Measured from the 50% point of Disable to VOUT = 2V.
6
HA-5020 Test Circuits and Waveforms
+
-
DUT
50 HP4195 NETWORK ANALYZER 50
FIGURE 1. TEST CIRCUIT FOR TRANSIMPEDANCE MEASUREMENTS
VIN DUT VOUT RL 100 RF, 1k 50
+
DUT VOUT RL 400
-
VIN 50
+
-
RF, 681 RI 681
FIGURE 2. SMALL SIGNAL PULSE RESPONSE CIRCUIT
FIGURE 3. LARGE SIGNAL PULSE RESPONSE CIRCUIT
VIN
VIN
VOUT
VOUT
Vertical Scale: VIN = 100mV/Div., VOUT = 100mV/Div. Horizontal Scale: 20ns/Div. FIGURE 4. SMALL SIGNAL RESPONSE
Vertical Scale: VIN = 1V/Div., VOUT = 1V/Div. Horizontal Scale: 50ns/Div. FIGURE 5. LARGE SIGNAL RESPONSE
7
Schematic Diagram
V+ R2 800 R5 2.5K R6 15K D2 R10 820 QP8 QP9 QP11 QP1 QP5 QN5 R11 1K QP10 QN12 QN8 QP12 QP3 QN1 R7 15K DIS R3 6K QN6 QP4 QP6 R12 280 -IN QN13 QP13 QP15 C1 1.4pF R28 20 R15 400 R19 400 QP14 R17 280 R18 280 R24 140 R20 140 R33 2K QP18 QP19 R31 QP16 QP20 5 R29 9.5
R27 200
8
R8 1.25K QP2 R1 60K +IN QN2 D1 QN4 QN3 QP7 R13 1K QN7 R4 800 VR33 800 R9 820 QN9
HA-5020
QP17 QN17 C2 1.4pF QN15 R21 140 R25 20
QN10 R14 280 QN14 R16 400 R22 280 QN16
QN21 R32 5 QN20 R26 200 QN19 R30 7 O
R25 140 QN18
R23 400
R26 200
QN11
HA-5020 Application Information
Optimum Feedback Resistor
The plots of inverting and non-inverting frequency response illustrate the performance of the HA-5020 in various closed loop gain configurations. Although the bandwidth dependency on closed loop gain isn't as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier's unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF, in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier's bandwidth is inversely proportional to RF. The HA-5020 design is optimized for a 1000 RF at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot. At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth.
GAIN (ACL) -1 +1 +2 +5 +10 -10 BANDWIDTH (MHz) 100 125 95 52 65 22
Driving Capacitive Loads
Capacitive loads will degrade the amplifier's phase margin resulting in frequency response peaking and possible oscillations. In most cases the oscillation can be avoided by placing an isolation resistor (R) in series with the output as shown in Figure 6.
VIN RT RI RF + R VOUT CL
-
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION RESISTOR, R
The selection criteria for the isolation resistor is highly dependent on the load, but 27 has been determined to be a good starting value.
Enable/Disable Function
When enabled the amplifier functions as a normal current feedback amplifier with all of the data in the electrical specifications table being valid and applicable. When disabled the amplifier output assumes a true high impedance state and the supply current is reduced significantly. The circuit shown in Figure 7 is a simplified schematic of the enable/disable function. The large value resistors in series with the DISABLE pin makes it appear as a current source to the driver. When the driver pulls this pin low current flows out of the pin and into the driver. This current, which may be as large as 350A when external circuit and process variables are at their extremes, is required to insure that point "A" achieves the proper potential to disable the output. The driver must have the compliance and capability of sinking all of this current.
+VCC R6 15K D1 R7 15K R10 R33 QP18 R8 A QP3
RF () 750 1000 681 1000 383 750
PC Board Layout
The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended. If leaded components are used the leads must be kept short especially for the power supply decoupling components and those components connected to the inverting input. Attention must be given to decoupling the power supplies. A large value (10F) tantalum or electrolytic capacitor in parallel with a small value (0.1F) chip capacitor works well in most cases. A ground plane is strongly recommended to control noise. Care must also be taken to minimize the capacitance to ground seen by the amplifier's inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. It is recommended that the ground plane be removed under traces connected to -IN, and that connections to -IN be kept as short as possible to minimize the capacitance from this node to ground.
ENABLE/ DISABLE INPUT
FIGURE 7. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE FUNCTION
When VCC is +5V the DISABLE pin may be driven with a dedicated TTL gate. The maximum low level output voltage of the TTL gate, 0.4V, has enough compliance to insure that the amplifier will always be disabled even though D1 will not turn on, and the TTL gate will sink enough current to keep point "A" at its proper voltage. When VCC is greater than +5V the DISABLE pin should be driven with an open collector device that has a breakdown rating greater than VCC .
9
HA-5020
Referring to Figure 7, it can be seen that R6 will act as a pull-up resistor to +VCC if the DISABLE pin is left open. In those cases where the enable/disable function is not required on all circuits some circuits can be permanently enabled by letting the DISABLE pin float. If a driver is used to set the enable/disable level, be sure that the driver does not sink more than 20A when the DISABLE pin is at a high level. TTL gates, especially CMOS versions, do not violate this criteria so it is permissible to control the enable/disable function with TTL. such as an A/D converter. The first problem is the low source impedance which tends to make amplifiers oscillate and causes gain errors. The second problem is the multiplexer which supplies no gain, introduces all kinds of distortion and limits the frequency response. Using op amps which have an enable/disable function, such as the HA-5020, eliminates the multiplexer problems because the external mux chip is not needed, and the HA-5020 can drive low impedance (large capacitance) loads if a series isolation resistor is used. Referring to Figure 9, both inputs are terminated in their characteristic impedance; 75 is typical for video applications. Since the drivers usually are terminated in their characteristic impedance the input gain is 0.5, thus the amplifiers, U2, are configured in a gain of +2 to set the circuit gain equal to one. Resistors R2 and R3 determine the amplifier gain, and if a different gain is desired R2 should be changed according to the equation G = (1 + R3/R2). R3 sets the frequency response of the amplifier so you should refer to the manufacturers data sheet before changing its value. R5, C1 and D1 are an asymmetrical charge/discharge time circuit which configures U1 as a break before make switch to prevent both amplifiers from being active simultaneously. If this design is extended to more channels the drive logic must be designed to be break before make. R4 is enclosed in the feedback loop of the amplifier so that the large open loop amplifier gain of U2 will present the load with a small closed loop output impedance while keeping the amplifier stable for all values of load capacitance. The circuit shown in Figure 9 was tested for the full range of capacitor values with no oscillations being observed; thus, problem one has been solved. The frequency and gain characteristics of the circuit are now those of the amplifier and independent of any multiplexing action; thus, problem two has been solved. The multiplexer transition time is approximately 15s with the component values shown.
Typical Applications
Two Channel Video Multiplexer
Referring to the amplifier U1A in Figure 8, R1 terminates the cable in its characteristic impedance of 75, and R4 back terminates the cable in its characteristic impedance. The amplifier is set up in a gain configuration of +2 to yield an overall network gain of +1 when driving a double terminated cable. The value of R3 can be changed if a different network gain is desired. R5 holds the disable pin at ground thus inhibiting the amplifier until the switch, S1, is thrown to position 1. At position 1 the switch pulls the disable pin up to the plus supply rail thereby enabling the amplifier. Since all of the actual signal switching takes place within the amplifier, it's differential gain and phase parameters, which are 0.03% and 0.03 degrees respectively, determine the circuit's performance. The other circuit, U1B, operates in a similar manner. When the plus supply rail is 5V the disable pin can be driven by a dedicated TTL gate as discussed earlier. If a multiplexer IC or its equivalent is used to select channels its logic must be break before make. When these conditions are satisfied the HA-5020 is often used as a remote video multiplexer, and the multiplexer may be extended by adding more amplifier ICs.
Low Impedance Multiplexer
Two common problems surface when you try to multiplex multiple high speed signals into a low impedance source
VIDEO INPUT #1 U1A + R1 75 R3 681 R4 75
R2 681 R5 2000 1 2 R9 75
VIDEO OUTPUT TO 75 LOAD
+5V IN + 0.1F
+5V 10F
VIDEO INPUT #2
U1B
R11 100 +5V S1
-5V IN 0.1F
-5V 10F +
3 ALL OFF
R6 75 R8 681 R7 681 R10 2000
NOTES: 22. U1 is HA-5020. 23. All resistors in . 24. S1 is break before make. 25. Use ground plane.
FIGURE 8. TWO CHANNEL HIGH IMPEDANCE MULTIPLEXER
10
HA-5020
INPUT B R1A 75 INPUT A R1B 75 U1C 2000 CHANNEL SWITCH C1A 0.047F R5B INHIBIT U1A R6 100K U1B U1D 2000 C1B 0.047F R2B 681 D1A 1N4148 R5A R2A 681 U2A R3A 681 R4A 27 -5V 0.01F R3B 681 U2B +
+
+5V 0.01F
R4B OUTPUT 27
NOTES: 26. U2: HA-5020. 27. U1: CD4011.
D1B 1N4148
FIGURE 9. LOW IMPEDANCE MULTIPLEXER
Typical Performance Curves
100 AV = +10 INPUT NOISE VOLTAGE (nV/Hz)
VSUPPLY = 15V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified
100 INPUT NOISE CURRENT (pA/Hz) 2.5
-INPUT NOISE CURRENT
OFFSET VOLTAGE (mV)
2.0 VSUPPLY = 15V 1.5 VSUPPLY = 4.5V
10 INPUT NOISE VOLTAGE
10
1.0
0.5
VSUPPLY = 10V
+INPUT NOISE CURRENT 1 10 100 1K FREQUENCY (Hz) 10K 1 100K 0.0 -60 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (oC)
FIGURE 10. INPUT NOISE vs FREQUENCY (AVERAGE OF 18 UNITS FROM 3 LOTS)
FIGURE 11. INPUT OFFSET VOLTAGE vs TEMPERATURE (ABSOLUTE VALUE AVERAGE OF 30 UNITS FROM 3 LOTS)
2.0
0
-0.5 BIAS CURRENT (A) BIAS CURRENT (A)
1.8 VSUPPLY = 15V VSUPPLY = 10V 1.4
-1.0
VSUPPLY = 15V VSUPPLY = 10V
1.6
-1.5 VSUPPLY = 4.5V
-2.0
1.2
VSUPPLY = 4.5V
-2.5 -60
-40
-20
0
20 40 60 80 TEMPERATURE (oC)
100
120
140
1.0 -60
-40
-20
0
20 40 60 80 TEMPERATURE (oC)
100
120
140
FIGURE 12. +INPUT BIAS CURRENT vs TEMPERATURE (AVERAGE OF 30 UNITS FROM 3 LOTS)
FIGURE 13. -INPUT BIAS CURRENT vs TEMPERATURE (ABSOLUTE VALUE AVERAGE OF 30 UNITS FROM 3 LOTS)
11
HA-5020 Typical Performance Curves
6
VSUPPLY = 15V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified (Con8 125oC SUPPLY CURRENT (mA)
5 OPEN LOOP GAIN (M)
VSUPPLY = 15V VSUPPLY = 10V
7
25oC -55oC
4
6
3
VSUPPLY = 4.5V
5
2
4 1 -60 -40 -20 0 20 40 60 80 TEMPERATURE (oC) 100 120 140 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 15
FIGURE 14. TRANSIMPEDANCE vs TEMPERATURE (AVERAGE OF 30 UNITS FROM 3 LOTS)
FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE (AVERAGE OF 30 UNITS FROM 3 LOTS)
7 DISABLE = 0V 6 SUPPLY CURRENT (mA) 5 4 125oC 3 2 1 0 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 15 -55oC 25oC SUPPLY CURRENT (mA)
9 8 7 6 5 4 3 2 1 0 1 3 5 7 9 11 13 15 DISABLE INPUT VOLTAGE (V) VSUPPLY = 4.5V VSUPPLY = 10V VSUPPLY = 15V
FIGURE 16. DISABLE SUPPLY CURRENT vs SUPPLY VOLTAGE (AVERAGE OF 30 UNITS FROM 3 LOTS)
FIGURE 17. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE
0 -10 FEEDTHROUGH (dB) -20 -30 -40 -50 -60 -70 -80 0 2 4 6 8 10 12 14 16 18 20 DISABLE = 0V VIN = 5VP-P RF = 750 OUTPUT LEAKAGE CURRENT (A)
1.0
0.5
VOUT = +10V
0 VOUT = -10V -0.5
-1.0 -60
-40
-20
0
20
40
60
80
100
120
140
FREQUENCY (MHz)
TEMPERATURE (oC)
FIGURE 18. DISABLE MODE FEEDTHROUGH vs FREQUENCY
FIGURE 19. DISABLED OUTPUT LEAKAGE vs TEMPERATURE (AVERAGE OF 30 UNITS FROM 3 LOTS)
12
HA-5020 Typical Performance Curves
2.0 1.8 1.6 ENABLE TIME (s) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -10 -8 -6 -4 -2 0 2 4 6 8 10 DISABLE TIME ENABLE TIME
VSUPPLY = 15V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified (Con20 18 NORMALIZED GAIN (dB) 16 DISABLE TIME (s) 14 12 10 8 6 4 2 0 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 0 24 48 72 96 120 FREQUENCY (MHz) AV = +10 AV = +6 AV = +2 VOUT = 0.2VP-P CL = 10pF AV = +1
OUTPUT VOLTAGE (V)
FIGURE 20. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE (AVERAGE OF 9 UNITS FROM 3 LOTS)
FIGURE 21. NON-INVERTING GAIN vs FREQUENCY
2 1 NORMALIZED GAIN (dB) 0 -1 -2 -3 -4 -5 -6 -7 -8 0 24 48 72 96 120 FREQUENCY (MHz) AV = -10 AV = -6 AV = -2 INVERTING PHASE (DEGREES) GAIN PEAKING (dB) VOUT = 0.2VP-P CL = 10pF RF = 750 AV = -1 NON-INVERTING PHASE (DEGREES) +180 AV = -1 +45 0 -45 -90 -135 -180 -225 -270 0 24 AV = +1 AV = +2 AV = +6 AV = +10 48 72 96 120 +135 AV = -2 AV = -6 AV = -10 +90 +45 0 -45 -90 -135 -180
FREQUENCY (MHz)
FIGURE 22. INVERTING FREQUENCY RESPONSE
FIGURE 23. PHASE vs FREQUENCY
110 CL = 10pF VOUT = 0.2VP-P -3dB BANDWIDTH (MHz) 100 -3dB BANDWIDTH
5
105 CL = 10pF -3dB BANDWIDTH (MHz) VOUT = 0.2VP-P GAIN PEAKING (dB) 100 -3dB BANDWIDTH 95
20
4
15
90 GAIN PEAKING 80
3
10
2
90 GAIN PEAKING
5
70
1
60 0 200 400 600 LOAD RESISTANCE () 800
0 1000
85 700 900 1.1K 1.3K FEEDBACK RESISTOR ()
0 1.5K
FIGURE 24. BANDWIDTH AND GAIN PEAKING vs LOAD RESISTANCE
FIGURE 25. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
13
HA-5020 Typical Performance Curves
100 CL = 10pF, AV = +2 VOUT = 0.2VP-P -3dB BANDWIDTH (MHz) GAIN PEAKING (dB) 95 15 -3dB BANDWIDTH (MHz) 70 60 50 40 30 20 0 1.2K 10 200
VSUPPLY = 15V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified (Con20 80 CL = 10pF, AV = +10 VOUT = 0.2VP-P GAIN PEAKING = 0dB
-3dB BANDWIDTH 90 10
85 GAIN PEAKING
5
80 400 600 800 1.0K FEEDBACK RESISTOR ()
400
600
800
1000
FEEDBACK RESISTOR ()
FIGURE 26. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
75
FIGURE 27. BANDWIDTH vs FEEDBACK RESISTANCE
0 -10 AV = +10
REJECTION RATIO (dB)
REJECTION RATIO (dB)
70
-20 -30 -40 -50 -60 -70 -80 +PSRR -PSRR CMRR
PSRR 65
60
CMRR
55 -60
-40
-20
0
20
40
60
80
100
120
140
-90 10K
100K
TEMPERATURE (oC)
1M FREQUENCY (Hz)
10M
FIGURE 28. REJECTION RATIOS vs TEMPERATURE (AVERAGE OF 30 UNITS FROM 3 LOTS)
FIGURE 29. REJECTION RATIOS vs FREQUENCY
3.5 OUTPUT SWING OVERHEAD (V) OUTPUT VOLTAGE SWING (VP-P) VSUPPLY = 15V 3.0 (VSUPPLY) - (VOUT )
30 VSUPPLY = 15V 25 20 VSUPPLY = 10V 15 10 5 0 10 100 1K LOAD RESISTANCE () 10K VSUPPLY = 4.5V
VSUPPLY = 10V
2.5 VSUPPLY = 4.5V 2.0
1.5 -60
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (oC)
FIGURE 30. OUTPUT SWING OVERHEAD vs TEMPERATURE (AVERAGE OF 30 UNITS FROM 3 LOTS)
FIGURE 31. OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
14
HA-5020 Typical Performance Curves
100 SHORT CIRCUIT CURRENT (mA) 90 80 -ISC 70 60 50 40 -60 5.0 -60 +ISC
VSUPPLY = 15V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified (Con7.0
PROPAGATION DELAY (ns)
6.5 RLOAD = 100 VOUT = 1VP-P 6.0
5.5
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE 32. SHORT CIRCUIT CURRENT LIMIT vs TEMPERATURE
FIGURE 33. PROPAGATION DELAY vs TEMPERATURE (AVERAGE OF 18 UNITS FROM 3 LOTS)
11.0 10.0 9.0 8.0 AV = +2 7.0 6.0 5.0 3 5 7 9 11 13 15 SUPPLY VOLTAGE (V) RLOAD = 100 VOUT = 1VP-P AV = +1 AV = +10 (RF = 383) OVERSHOOT (%)
15 VOUT = 100mVP-P, CL = 10pF VSUPPLY = 5V 10 AV = +2 AV = +1 VSUPPLY = 15V 5 AV = +1 AV = +2 0 0 200 400 600 800 1000 LOAD RESISTANCE ()
FIGURE 34. PROPAGATION DELAY vs SUPPLY VOLTAGE (AVERAGE OF 18 UNITS FROM 3 LOTS)
PROPAGATION DELAY (ns)
FIGURE 35. SMALL SIGNAL OVERSHOOT vs LOAD RESISTANCE
-50 VO = 2VP-P CL = 30pF -60 DISTORTION (dBc) DIFFERENTIAL GAIN (%) 3RD ORDER IMD HD2 (GEN) -70 3RD ORDER IMD (GENERATOR) -80 HD2 -90 HD3 (GEN) 1M FREQUENCY (Hz) 10M HD3
0.07 FREQUENCY = 3.58MHz 0.06 0.05 RLOAD = 75 0.04 0.03 0.02 0.01
RLOAD = 150
RLOAD = 1K 3 5 7 9 11 13 15
SUPPLY VOLTAGE (V)
FIGURE 36. DISTORTION vs FREQUENCY
FIGURE 37. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE (AVERAGE OF 18 UNITS FROM 3 LOTS)
15
HA-5020 Typical Performance Curves
0.07 DIFFERENTIAL PHASE (DEGREES) 0.06 SLEW RATE (V/s) 0.05 0.04 0.03 0.02 RLOAD = 1K 0.01 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 15 600 -60 RLOAD = 150 RLOAD = 75 1000
VSUPPLY = 15V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified (Con1200
FREQUENCY = 3.58MHz VOUT = 20VP-P
+SLEW RATE -SLEW RATE
800
-40
-20
0
20
40
60
80
100
120
140
TEMPERATURE (oC)
FIGURE 38. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE (AVERAGE OF 18 UNITS FROM 3 LOTS)
FIGURE 39. SLEW RATE vs TEMPERATURE (AVERAGE OF 30 UNITS FROM 3 LOTS)
Typical Performance Curves
5 4 NORMALIZED GAIN (dB)
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified
5 4 AV + 2 NORMALIZED GAIN (dB) 3 2 1 0 -1 -2 -3 -4 AV = -10 2 10 FREQUENCY (MHz) 100 200 AV = -2 AV = -1
3 2 1 0 -1 -2 -3 -4 -5 2 10 FREQUENCY (MHz) AV + 10 AV + 1
100
200
-5
FIGURE 40. NON-INVERTING FREQUENCY RESPONSE
FIGURE 41. INVERTING FREQUENCY RESPONSE
-3dB BANDWIDTH (MHz)
5 NON-INVERTING PHASE (DEGREES) 4 3 2 1 0 -1 -2 -3 -4 -5 2 10 FREQUENCY (MHz) 100 200 AV + 10 AV - 10 INVERTING PHASE (DEGREES) AV + 1 AV - 1 180 135 90 45 0 -45 -90 -135 -180
140 VOUT = 0.2VP-P CL = 10pF AV = +1
130
5 GAIN PEAKING 500 700 900 1100 1300 0 1500
FEEDBACK RESISTOR ()
FIGURE 42. PHASE RESPONSE AS A FUNCTION OF FREQUENCY
FIGURE 43. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
16
GAIN PEAKING (dB)
120
-3dB BANDWIDTH
10
HA-5020 Typical Performance Curves
-3dB BANDWIDTH (MHz) 100 VOUT = 0.2VP-P CL = 10pF AV = +2 -3dB BANDWIDTH (MHz) 95
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified (Continued)
130
120 -3dB BANDWIDTH 110 6 GAIN PEAKING (dB) 30
-3dB BANDWIDTH 90 10 GAIN PEAKING (dB)
100
4
5 GAIN PEAKING 350 500 650 800 950 0 1100
90
GAIN PEAKING
VOUT = 0.2VP-P CL = 10pF AV = +1 600 800
2
80 0 200 400 LOAD RESISTOR ()
0 1000
FEEDBACK RESISTOR ()
FIGURE 44. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
FIGURE 45. BANDWIDTH AND GAIN PEAKING vs LOAD RESISTANCE
80 VOUT = 0.2VP-P CL = 10pF AV = +10 60 0 -10 REJECTION RATIO (dB) -20 -30 -40 -50 -60 -70 -80 0 200 350 500 650 FEEDBACK RESISTOR () 800 950 0.001
AV = +1
-3dB BANDWIDTH (MHz)
40
CMRR
20
NEGATIVE PSRR POSITIVE PSRR 0.01 0.1 1 FREQUENCY (MHz) 10
FIGURE 46. BANDWIDTH vs FEEDBACK RESISTANCE
FIGURE 47. REJECTION RATIOS vs FREQUENCY
8.0 RL = 100 VOUT = 1.0VP-P AV = +1 7.5 SLEW RATE (V/s)
500 VOUT = 2VP-P 450 400 350 300 250 200 150 - SLEW RATE + SLEW RATE
PROPAGATION DELAY (ns)
7.0
6.5
6.0 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC)
100 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC)
FIGURE 48. PROPAGATION DELAY vs TEMPERATURE
FIGURE 49. SLEW RATE vs TEMPERATURE
17
HA-5020 Typical Performance Curves
0.8 0.6 NORMALIZED GAIN (dB) 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 5 10 15 20 25 30 FREQUENCY (MHz) AV = 10, RF = 383 AV = +1, RF = 1k AV = +5, RF = 1k AV = +2, RF = 681 NORMALIZED GAIN (dB) VOUT = 0.2VP-P CL = 10pF
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified (Continued)
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 5 10 15 20 25 30 FREQUENCY (MHz) AV = -10 AV = -2 AV = -5 VOUT = 0.2VP-P CL = 10pF RF = 750 AV = -1
FIGURE 50. NON-INVERTING GAIN FLATNESS vs FREQUENCY
FIGURE 51. INVERTING GAIN FLATNESS vs FREQUENCY
100 AV = 10, RF = 383 VOLTAGE NOISE (nV/Hz)
1000
74 72 REJECTION RATIO (dB) +PSRR
80
800
CURRENT NOISE (pA/Hz)
-INPUT NOISE CURRENT
70 68 66 64 62 60 CMRR -PSRR
60 +INPUT NOISE CURRENT 40 +INPUT NOISE VOLTAGE
600
400
20
200
0 0.01
0 0.1 1 FREQUENCY (kHz) 10 100
58 -100
-50
0
50
100
150
200
250
TEMPERATURE (oC)
FIGURE 52. INPUT NOISE CHARACTERISTICS
FIGURE 53. REJECTION RATIO vs TEMPERATURE
4.0
32 30 28 ENABLE
20 18 16 14 ENABLE 12 10 8 DISABLE 6 4 DISABLE 0 0.5 1.0 1.5 2.0 2 0 2.5 DISABLE TIME (s)
OUTPUT SWING (V)
ENABLE TIME (ns) -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (oC)
26 24 22 20 18 16 14
3.8
3.6
12 -2.5 -2.0 -1.5 -1.0 -0.5
OUTPUT VOLTAGE (V)
FIGURE 54. OUTPUT SWING vs TEMPERATURE
FIGURE 55. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE
18
HA-5020 Typical Performance Curves
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified (Continued)
0 -10 FEEDTHROUGH (dB) -20 -30 -40 -50 -60 -70 -80 0.1
DISABLE = 0V VIN = 5VP-P RF = 750
TRANSIMPEDANCE (M)
10 1 0.1 0.01 0.001 180 135 90 45 0 -45 -90 PHASE ANGLE (DEGREES) RL = 100
1 FREQUENCY (MHz)
10
20
0.001
0.01
0.1 1 FREQUENCY (MHz)
10
100
-135
FIGURE 56. DISABLE FEEDTHROUGH vs FREQUENCY
FIGURE 57. TRANSIMPEDANCE vs FREQUENCY
TRANSIMPEDANCE (M)
10 1 0.1 PHASE ANGLE (DEGREES) 0.01 0.001 180 135 90 45 0 -45 -90 -135 0.001 0.01 0.1 1 10 100 FREQUENCY (MHz) RL = 400
FIGURE 58. TRANSIMPEDENCE vs FREQUENCY
19
HA-5020 Die Characteristics
DIE DIMENSIONS: 1640m x 1520m x 483m METALLIZATION: Type: Aluminum, 1% Copper Thickness: 16kA 2kA SUBSTRATE POTENTIAL (Powered Up): VPASSIVATION: Type: Nitride over Silox Silox Thickness: 12kA 2kA Nitride Thickness: 3.5kA 1kA TRANSISTOR COUNT: 62 PROCESS: High Frequency Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5020
BAL DISABLE V+
IN-
2
1
8
7
6
OUT
IN+
3
4
5
V-
BAL
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
20

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