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| SI9707DY Vishay Siliconix Si9707 PC Card (PCMCIA) Dual Interface Switch FEATURES * Single SO-16 Package * CMOS Logic Compatible Inputs * Smart Switching * Slow VCC Ramp Times * Extremely Low RON * Supports Dual PC Card Slots * Reverse Blocking Switches * Low Power Consumption * Safe Power-Up DESCRIPTION The SI9707DY offers an integrated solution for dual PC Card power interfaces that require only VCC switching. This part is ideal for systems that operate at 5 V and provide VPP from the main supply, or from a dedicated Flash RAM 12-V supply. The SI9707DY operates off the 5-V supply with built-in level shifting. The VCC outputs function independently and internal logic protects each slot against a control logic error that would short 5 V to the 3.3-V supply. This protection logic also allows the SI9707DY to be configured for positive or negative control logic for compatibility with a variety of PC Card controllers. These control inputs are CMOS logic compatible and can be driven to 3.3 V or 5 V. The PC Card Dual Interface Switch is available in a SO-16 narrow-body package and is rated over the industrial temperature range of -40 to 85C. FUNCTIONAL BLOCK DIAGRAM FaxBack 408-970-5600, request 70018 www.siliconix.com S-60752--Rev. E, 05-Apr-99 1 SI9707DY Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Voltages Referenced to Ground +5 VINA, +5 VINB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V +3.3 VINA, +3.3 VINB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V S1A and S2A, S1B, S2B (CMOS Inputs) . . . . . . . . . . . . . . . . . . . . . . 7 V All Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V IOUT VCCAa, IOUT VCCBb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 A PD Maxc: (TA = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.65 W (TA = 85C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.65 W Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125C Thermal Ratings: RJAc . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60C/W Notes a. Pins 5, 6 connected together externally. b. Pins 3, 4 connected together externally. c. Mounted on 1-IN2, FR4 PC Board. RECOMMENDED OPERATING CONDITIONS +5 VINA, +5 VINB (must be present) . . . . . . . . . . . . . . . . . . .5 V 10% +3.3 VINA, +3.3 VINB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 V 10% CSRA, CSRB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 nF IOUT VCCAa, IOUT VCCBb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 A VCC Load Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . 150 F Max Notes a. Pins 5, 6 connected together externally. b. Pins 3, 4 connected together externally. SPECIFICATIONS Limits Test Conditions Unless Otherwise Specified Parameter Switch SW1A, SW1B On-Resistance RON I = 500 mA, S1 = High S2 = Low +5 VIN = 5.5 V, VCC = 0 V S1= S2 = Low S2 = Low, See Figure 1. TA = 25C TA = 85C TA = 25C TA = 85C 0.2 10 1.7 30 58 73 70 m 90 1 10 5 ms 50 A -40 to 85C Symbol CSR = 33 nF, +5 VIN= 5 V +3.3 VIN = 3.3 V, Low 0.8 V, High 2.2 V Mina Typ Maxa Unit Off Current (VCC) Rise Time Fall Time IOFF tS1(on) tS1(off) Switch SW2A, SW2B On-Resistance RON I = 500 mA, S2 = High S1 = Low +3.3 VIN = 3.6 V, VCC = 0 V S1 = S2= Low S1 = Low, See Figure 1. TA = 25C TA = 85C TA = 25C TA = 85C 0.1 5 0.9 20 44 55 55 m 70 1 A 10 5 ms 40 Off Current (+3.3 VIN) Rise Time Fall Time IOFF tS2(on) tS2(off) Switch SW3A, SW3B On-Resistance RON I = 2 mA, S1 = S2 = Low TA = 25C TA = 85C 140 200 400 500 Power Supply +5 VIN Current Input (on) +5 VIN Current Input (off) I+5VIN(1) I+5VIN(2) I+5VIN(3) S1 = 0 V, S2 = 3 V S1 = 3 V, S2 = 0V S1 = S2 = 0 V 20 20 <1 50 50 10 A Switch Control Inputs S1X, S2X Input Voltage High VI(H) +5 VINX = 5.5 V +5 VINX = 4.5 V +5 VINX = 5.5 V +5 VINX = 4.5 V S1X , S2X = 5 V S1X , S2X = GND -1.0 2.2 2.2 1.8 1.6 V 1.6 1.4 0.8 0.8 1.0 A Input Voltage Low Input Current High Input Current Low VI(L) II(H) II(L) Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. S-60752--Rev. E, 05-Apr-99 2 FaxBack 408-970-5600, request 70018 www.siliconix.com SI9707DY Vishay Siliconix TIMING WAVEFORMS FIGURE 1. Switch Ramp Time PIN CONFIGURATION AND DESCRIPTION PIN DESCRIPTION Function S1A S1B S2A S2B GND VCCA VCCB +3.3 VINA +3.3 VINB +5 VINA +5 VINB SRA SRB Pin Number 10 15 7 2 1, 8 5, 6 3, 4 11 14 12 13 9 16 Description Control input for selecting +5 VINA to VCCA. Control input for selecting +5 VINB to VCCB. Control input for selecting +3.3 VINA to VCCA. Control input for selecting +3.3 VINB to VCCB. Ground connection. Supply voltage to slot. Supply voltage to slot. +3.3-V supply. +3.3-V supply. +5-V supply. +5-V supply. Slew rate control pin. Slew rate control pin. TRUTH TABLE S1X 0 0 1 1 Notes a. The smart switching of the Si9707 avoids potential host damage by defaulting to off during error conditions. S2X 0 1 0 1 Switch 1X Off Off On Off Switch 2X Off On Off Off Switch 3X On Off Off On FaxBack 408-970-5600, request 70018 www.siliconix.com S-60752--Rev. E, 05-Apr-99 3 SI9707DY Vishay Siliconix TYPICAL CHARACTERISTICS (25C UNLESS OTHERWISE NOTED) S-60752--Rev. E, 05-Apr-99 4 FaxBack 408-970-5600, request 70018 www.siliconix.com |
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