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(R) STY34NB50F N - CHANNEL 500V - 0.11 - 34 A - Max247 PowerMESHTM MOSFET TYPE STY34NB50F s s s s s s s V DSS 500 V R DS(on) < 0.14 ID 34 A TYPICAL RDS(on) = 0.11 EXTREMELY HIGH dv/dt CAPABILITY 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED LOW INTRINSIC CAPACITANCE GATE CHARGE MINIMIZED REDUCED VOLTAGE SPREAD 1 2 3 DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLY (SMPS) s DC-AC CONVERTER FOR WELDING EQUIPMENT AND UNINTERRUPTABLE POWER SUPPLY AND MOTOR DRIVE s Max247TM INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDS V DGR V GS ID ID IDM (*) P tot dv/dt(1) T stg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k) Gate-source Voltage Drain Current (continuous) at T c = 25 o C Drain Current (continuous) at T c = 100 C Drain Current (pulsed) Total Dissipation at T c = 25 o C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature o Value 500 500 30 34 21.4 136 450 3.61 4.5 -65 to 150 150 (1) ISD 34 A, di/dt 200 A/s, VDD V(BR)DSS, Tj TJMAX Unit V V V A A A W W/ o C V/ns o o C C (*) Pulse width limited by safe operating area December 1999 1/8 STY34NB50F THERMAL DATA R thj-case R thj-amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 0.277 30 0.1 300 o o C/W C/W o C/W o C AVALANCHE CHARACTERISTICS Symbol IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j max) Single Pulse Avalanche Energy (starting T j = 25 o C, I D = I AR , V DD = 50 V) Max Value 34 1000 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbol V (BR)DSS I DSS Parameter Drain-source Breakdown Voltage Test Conditions I D = 250 A V GS = 0 Min. 500 10 100 100 Typ. Max. Unit V A A nA Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating o C Gate-body Leakage Current (V DS = 0) V GS = 30 V T c = 125 IGSS ON () Symbol V GS(th) R DS(on) I D(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance V DS = V GS V GS = 10 V Test Conditions I D = 250 A I D = 17 A 34 Min. 3 Typ. 4 0.11 Max. 5 0.14 Unit V A On State Drain Current V DS > I D(on) x R DS(on)max V GS = 10 V DYNAMIC Symbol g fs () C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions V DS > I D(on) x R DS(on)max V DS = 25 V f = 1 MHz I D = 17 A V GS = 0 Min. Typ. 27 5.9 880 80 Max. Unit S nF pF pF 2/8 STY34NB50F ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions V DD = 250 V I D =17 A V GS =15 V R G = 4.7 (see test circuit, figure 3) V DD = 400 V I D = 34 A V GS = 10 V Min. Typ. 45 35 140 38 61 196 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions V DD = 400 V I D = 17 A V GS = 15 V R G = 4.7 (see test circuit, figure 5) Min. Typ. 28 30 60 Max. Unit ns ns ns SOURCE DRAIN DIODE Symbol ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 34 A V GS = 0 715 11.8 33 I SD = 34 A di/dt = 100 A/s V DD = 100 V T j = 150 o C (see test circuit, figure 5) Test Conditions Min. Typ. Max. 34 136 1.6 Unit A A V ns C A () Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STY34NB50F Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STY34NB50F Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STY34NB50F Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STY34NB50F Max247 MECHANICAL DATA mm MIN. A A1 b b1 b2 c D e E L L1 4.70 2.20 1.00 2.00 3.00 0.40 19.70 5.35 15.30 14.20 3.70 TYP. MAX. 5.30 2.60 1.40 2.40 3.40 0.80 20.30 5.55 15.90 15.20 4.30 MIN. inch TYP. MAX. DIM. P025Q 7/8 STY34NB50F Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. 8/8 http://www.st.com . |
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