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19-1697; Rev 0; 4/00 2.75Gbps Dual Mux/Buffer General Description The MAX3781 is a 2.75Gbps dual multiplexer (mux) and buffer. Each half of the MAX3781 has a transmitter with a fanout of two and a receiver with a 2:1 mux. Operating from a single +3.3V supply, this device accepts CML or AC-coupled PECL inputs and provides CML outputs. The outputs can be AC-coupled for compatibility with PECL inputs if needed. The MAX3781 is packaged in a compact 48-pin 7x7mm TQFP exposedpaddle package and typically consumes 1.2W power. A power-saving mode disables the unused buffer output and reduces typical power to 0.9W. o 15ps Deterministic Jitter o On-Chip Termination Resistors Compatible with 50 Transmission Lines at All Ports o 1.2W Power Consumption (0.9W in Power-Saving Mode) o +3.3V Power Supply o Two-Port Integration Features MAX3781 ________________________Applications System Interconnect Redundancy Serial Backplane Redundancy 2.75Gbps Serial Communications Typical Application Circuit PART VCC SIA+ OUT SIASERDES A LO1B+ LO1BLI1A+ SWITCH 1 VCC SOA+ SOA- Ordering Information TEMP. RANGE 0C to +85C PIN-PACKAGE 48 TQFP-EP* MAX3781UCM MAX3781 LO1A+ LO1A- *EP = Exposed paddle Pin Configuration VCC LO1A+ LO1AVCC LO2A+ LO2A41 40 39 LI1ALI1B+ LI1BLO2A+ GND VCC SIASIA+ SELA PD SELB GND SIB+ SIBVCC GND 1 2 3 4 5 6 7 8 9 10 11 12 IN SOA- 48 47 46 45 VCC SOA+ 44 43 42 38 37 VCC GND 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 SIB+ OUT SIBSERDES B LO2ALO2B+ LO2BLI2A+ SWITCH 2 MAX3781 SOB+ IN SOB- LI2ALI2B+ LI2BGND LI2ALI2A+ VCC LI1A+ LI1AGND GND LI1BLI1B+ VCC LI2B+ LI2B- VCC VCC LO1B+ LO1B- LO2B+ LO2B- SOB+ SOB- NOTE: COUPLING CAPACITORS ARE OPTIONAL. SELB SELA PD TYPICAL VALUES ARE 0.1F. TQFP-EP 1 ________________________________________________________________ Maxim Integrated Products For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. VCC GND VCC VCC 2.75Gbps Dual Mux/Buffer MAX3781 ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC ...............................................-0.5 to +4.0V Continuous Current at Serial Outputs (SO_, LO_ _ Pins) .........................................................36mA Voltage at SELA, SELB, PD Pins ................-0.5V to (VCC + 0.5V) Common-Mode Input Voltage (SI_, LI_ _ Pins).......................................-0.5V to (VCC + 0.5V) Differential Input Voltage (Note 1) ......................................2.8V Continuous Power Dissipation (TA = +85C) 48-Pin TQFP-EP (derate 27mW/C above +85C) ........1.76W Operating Temperature Range.............................. 0C to +85C Storage Temperature Range .............................-55C to +150C Lead Temperature (soldering, 10s) .................................+300C Note 1: The sum of the common-mode voltage and differential voltage on any input pin should be within -0.5V to (VCC + 0.5V). Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +3.0V to +3.6V, RLOAD = 100 differential, data rate = 2.75Gbps, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C, VCC = +3.3V.) PARAMETER Serial Data Rate Power Dissipation Supply Current Differential Output Voltage Output Impedance Input Impedance Differential Input Voltage Random Jitter Deterministic Jitter Serial Output Edge Speed (20%-80%) Progagation Delay TTL Input Current High TTL Input Current Low VIH = +2.0V to (VCC + 0.3V) VIL = -0.3V to +0.8V tr, tf K28.5 pattern (Note 2) 2.75Gbps input 1.25Gbps input VOUT ROUT RIN VIN PD = low PD = high PD = low PD = high RL= 50 to VCC, or 100 differential Single ended Differential 1200 42.5 85 200 1 11 90 90 275 SYMBOL CONDITIONS MIN 0 TYP 2750 1.2 0.9 365 273 1600 50 100 1.53 1.14 425 316 2200 57.5 116 2200 2 25 135 200 500 180 410 MAX UNITS Mbps W mA mVP-P mVP-P psRMS psP-P ps ps A A Note 2: Deterministic jitter is measured with a repeating K28.5 pattern (00111110101100000101). 2 _______________________________________________________________________________________ 2.75Gbps Dual Mux/Buffer Typical Operating Characteristics (VCC = +3.3V, TA = +25C, unless otherwise noted.) DIFFERENTIAL OUTPUT VOLTAGE vs. DIFFERENTIAL INPUT VOLTAGE MAX3781-01 MAX3781-02 MAX3781 SUPPLY CURRENT vs. TEMPERATURE 1800 1600 OUTPUT VOLTAGE (mVp-p) 1400 1200 1000 800 600 400 200 250 0 20 40 60 80 TEMPERATURE (C) 0 1 450 SUPPLY CURRENT (mA) DETERMINISTIC JITTER vs. INPUT AMPLITUDE 26 24 22 20 18 16 14 12 10 8 6 4 2 0 100 400 700 1000 1300 1600 1900 2200 MAX3781-03 400 PD = 0 350 PD = 1 300 10 100 1000 10,000 INPUT VOLTAGE (mVp-p) DETERMINISTIC JITTER (psp-p) INPUT VOLTAGE (mVp-p) INPUT VSWR (BY SIMULATION) MAX3781-04 OUTPUT VSWR (BY SIMULATION) 1.7 1.6 1.5 VSWR 1.4 1.3 1.2 1.1 1.0 MAX3781-05 1.8 1.7 1.6 1.5 VSWR 1.4 1.3 1.2 1.1 1.0 100 1000 FREQUENCY (MHz) 1.8 10,000 100 1000 FREQUENCY (MHz) 10,000 _______________________________________________________________________________________ 3 2.75Gbps Dual Mux/Buffer MAX3781 Pin Description PIN 1, 8, 12, 24, 30, 31, 37 2, 11, 13, 16, 17, 20, 23, 27, 34, 38, 41, 44, 45, 48 3 4 5 6 7 9 10 14 15 18 19 21 22 25 26 28 29 32 33 35 36 39 40 42 43 46 47 EP NAME GND Ground FUNCTION VCC SIASIA+ SELA PD SELB SIB+ SIBSOB+ SOBLO1B+ LO1BLO2B+ LO2BLI2BLI2B+ LI1B+ LI1BLI1ALI1A+ LI2A+ LI2ALO2ALO2A+ LO1ALO1A+ SOASOA+ Exposed Paddle Power Serial Input A Negative Serial Input A Positive Select Line A. Set high to select channel 1; set low for channel 2 (internally pulled high). Power-Down Mode Select. Set high for power-down mode (internally pulled high). Select Line B. Set high to select channel 1; set low for channel 2 (internally pulled high). Serial Input B Positive Serial Input B Negative Serial Output B Positive Serial Output B Negative Line Output 1B Positive Line Output 1B Negative Line Output 2B Positive Line Output 2B Negative Line Input 2B Negative Line Input 2B Positive Line Input 1B Positive Line Input 1B Negative Line Input 1A Negative Line Input 1A Positive Line Input 2A Positive Line Input 2A Negative Line Output 2A Negative Line Output 2A Positive Line Output 1A Negative Line Output 1A Positive Serial Output A Negative Serial Output A Positive Ground. This must be soldered to a circuit board for proper thermal performance (see Exposed Paddle (EP) Package). 4 _______________________________________________________________________________________ 2.75Gbps Dual Mux/Buffer MAX3781 SOA 2 MAX3781 CML VCC 15k 0 1 LI2A 2 2 CML LI1A 2 LO2A SELA SIA 2 VCC CML 15k PD 0 SOB 2 CML VCC 15k SELB SIB 2 1 2 CML LI2B 2 LI1B 2 LO1A CONTROL 2 LO2B CONTROL CML 2 LO1B Figure 1. Functional Diagram Detailed Description VCC MAX3781 IN+ The MAX3781 is a 2.75Gbps dual mux/buffer. Each half of the MAX3781 has a transmitter with a fanout of two and a receiver with a 2:1 mux. Figure 1 is a functional diagram of the MAX3781 dual mux/buffer. Input Stages 50 VCC - 0.4V 50 VCC The input amplifiers accept CML or AC-coupled PECL signals and have an on-chip 100 differential impedance to simplify termination. The input structure is shown in Figure 2. IN- Figure 2. Input Structure _______________________________________________________________________________________ 5 2.75Gbps Dual Mux/Buffer MAX3781 Table 1. Operating Modes MAX3781 VCC SEL_ 0 0 1 1 PD 0 1 0 1 LO1_ SI_ - SI_ SI_ LO2_ SI_ SI_ SI_ - SO_ LI2_ LI2_ LI1_ LI1_ Control Lines 50 50 OUT+ OUT- TTL-compatible control lines are provided to select the MAX3781's operating mode (Table 1). SELA and SELB select the data routing in to and out of the chip. The PD pin may be asserted (high) to disable the unused output to save power. All control lines are internally pulled high through 15k resistors. Output Buffers The outputs are high-speed CML interfaces. They have 50 back termination, eliminating the need for external matching resistors. The output structure is shown in Figure 3. 32mA Exposed-Paddle (EP) Package The exposed-paddle, 48-pin TQFP-EP incorporates features that provide a very low thermal resistance path for heat removal from the IC. The paddle is electrical ground on the MAX3781 and should be soldered to the circuit board for proper thermal and electrical performance. Figure 3. CML Output Structure Chip Information TRANSISTOR COUNT: 2805 PROCESS: BIPOLAR 6 _______________________________________________________________________________________ 2.75Gbps Dual Mux/Buffer Package Information 48L,TQFP.EPS MAX3781 _______________________________________________________________________________________ 7 2.75Gbps Dual Mux/Buffer MAX3781 Package Information (continued) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. |
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