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| RAM Mapping 32 X 4 LCD Controller for I/O uC *********************************************************************************************************** General Descriptions The ESC1621 is a 128-pattern (32x4), memory mapping, and multi- function LCD driver. The S/W configuration feature of the ESC1621 makes it suitable for multiple LCD applications including LCD modules and display subsystems. Only three or four lines are required for the interface between the host controller and the ESC1621. The ESC1621 contains a power down command to reduce power consumption. Features * * * * * * * * * * * * * * * * * * * Operating voltage: 2.4V~5.2V. Built- in 256kHz RC oscillator. External 32.768kHz crystal or 256kHz frequency source input. Selection of 1/2 or 1/3 bias, and selection of 1/2 or 1/3 or 1/4 duty LCD applications. Internal time base frequency sources. Two selectable buzzer frequencies (2kHz/4kHz). Built- in time base generator and WDT. Time base or WDT overflow output. Power down command reduces power Consumption. 8 kinds of time base/WDT clock sources. 32x4 LCD driver. Built- in 32x4 bit display RAM. 3-wire serial interface. Internal LCD driving frequency source. Software configuration feature. Data mode and command mode instructions. R/W address auto increment. Three data accessing modes. VLCD pin for adjusting LCD operating voltage. p. 1 Last update: 2004-03-05 12:03 ESC1621 Block Diagram BZ BZ Tone Generator Watchdog Timer & Time Base Generator IRQ VDD GND CS VLCD COM0 WR RD DATA Control Logic & Timing Generator LCD Driver & Bias Circuit COM3 SEG0 SEG31 OSCI OSCO Display Memory Note: CS: Chip selection BZ, BZ: Tone outputs WR, RD, DATA: Serial interface IRQ: Time base or WDT overflow output COM0~COM3, SEG0~SEG31: LCD outputs p. 2 Last update: 2004-03-05 12:13 ESC1621 Pin Assignment ESC1621B-48SSOP ESC1621D-28SKDIP p. 3 Last update: 2004-03-05 12:13 ESC1621 Pad Description Pad No. Pad Name I/O Function Chip selection input with pull-high resistor When the CS is logic high, the data and command read from or written to the ESC1621 are disabled. The serial interface circuit is also reset. But if CS is at logic low level and is input to the CS pad, the data and command transmission between the host controller and the ESC1621 are all enabled. READ clock input with pull-high resistor Data in the RAM of the ESC1621 are clocked out on the falling edge of the RD signal. The clocked out data will appear on the DATA line. The host controller can use the next rising edge to latch the clocked out data. WRITE clock input with pull-high resistor Data on the DATA line are latched into the ESC1621 on the rising edge of the WR signal. Serial data input/output with pull-high resistor Negative power supply, ground The OSCI and OSCO pads are connected to a 32.768kHz crystal in order to generate a system clock. If the system clock comes from an external clock source, the external clock source should be connected to the OSCI pad. But if and on-chip RC oscillator is selected instead, the OSCI and OSCO pads can be left open. LCD power input Positive power supply Time base or WDT overflow flag, NMOS open drain output 2kHz or 4kHz tone frequency output pair LCD common outputs LCD segment outputs 1 CS I 2 RD I 3 4 5 6 7 8 9 10 11,12 13~16 48~17 WR I I/O -- O I I -- O O O O DATA GND OSCO OSCI VLCD VDD IRQ BZ, BZ COM0~COM3 SEG0~SEG31 Absolute Maximum Ratings Supply Voltage....................... -0.3V ~ 5.5V Input Voltage... ... ... V SS - 0.3V ~ VDD + 0.3V Storage Temperature... ... ... ... ... -50 ~ 125 C C Operating Temperature... ... ... ... . . -25 C ~ 75 C Note: These are stress ratings only. Stresses exceeding the range specified under " Absolute Maximum Ratings"may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. p. 4 Last update: 2004-03-05 12:13 ESC1621 D.C. Characteristics Symbol VDD IDD1 IDD2 IDD3 ISTB VIL VIH IOL1 IOH1 IOL2 IOH2 IOL3 IOH3 RPH Parameter VDD Operating Voltage Operating Current Operating Current Operating Current Standby Current Input Low Voltage Input High Voltage DATA, BZ, BZ, IRQ DATA, BZ, BZ LCD Common Sink Current LCD Common Source Current LCD Segment Sink Current LCD Segment Source Current Pull-high Resistor -- 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V 3V 5V Test Conditions Conditions -- No load/LCD ON On-chip RC oscillator No load/LCD ON Crystal oscillator No load/LCD ON External clock source No load Power down mode DATA, WR, CS, RD DATA, WR, CS, RD VOL =0.3V VOL =0.5V VOH =2.7V VOH =4.5 V VOL =0.3V VOL =0.5V VOH =2.7V VOH =4.5 V VOL =0.3V VOL =0.5V VOH =2.7V VOH =4.5 V DATA, WR, CS, RD 2.4 -- -- -- -- -- -- -- -- 0 0 2.4 4.0 0.5 1.3 -0.4 -0.9 80 150 -80 -120 60 120 -40 -70 40 30 -- 220 450 90 180 150 300 0.1 0.3 -- -- -- -- 1.2 2.6 -0.8 -1.8 150 250 -120 -200 120 200 -70 -100 80 60 5.2 300 600 120 240 200 400 5 10 0.6 1.0 3.0 5.0 -- -- -- -- -- -- -- -- -- -- -- -- 150 100 V A A A A A A A A V V V V mA mA mA mA A A A A A A A A kO kO Min. Typ. Max. Unit p. 5 Last update: 2004-03-05 12:13 ESC1621 A.C. Characteristics Sym. Parameter VDD fSYS1 System Clock 3V 5V fSYS2 System Clock 3V 5V fSYS3 System Clock 3V 5V On-chip RC oscillator fLCD LCD Clock -- Crystal oscillator External clock source tCOM LCD Common Period fCLK1 Serial Data Clock (WR Pin) 3V 5V fCLK2 Serial Data Clock (RD Pin) fTONE Tone Frequency tCS Serial Interface Reset Pulse Width (Figure 3) 3V 5V 3V tCLK Write mode Read mode 5V Rise/Fall Time Serial Data Clock Width (Figure 1) Setup Time for DATA to WR, RD Clock Width (Figure 2) Hold Time for DATA to WR, RD Clock Width (Figure 2) Setup Time for CS to WR, RD Clock Width (Figure 3) Hold Time for CS to WR, RD Clock Width (Figure 3) 3V -- 5V 3V -- 5V 3V -- 5V 3V -- 5V 3V -- 5V -- 100 -- ns -- 100 -- ns -- 120 -- ns -- 120 -- ns -- 120 -- ns Write mode Read mode tr, tf 3.34 6.67 1.67 3.34 -- -- -- -- -- -- -- -- s s 3V 5V On-chip RC oscillator Duty cycle 50% n: Number of COM Duty cycle 50% External clock source Crystal oscillator Test Conditions Conditions On-chip RC oscillator -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2.0 or 4.0 250 256 256 32.768 32.768 256 256 FSYS1 /1024 FSYS2 /128 FSYS3 /1024 n/fLCD -- -- -- -- -- -- -- -- -- -- 150 300 75 150 -- -- kHz kHz kHz kHz kHz kHz Hz Hz Hz s kHz kHz kHz kHz kHz ns Min. Typ. Max. Unit CS WR, RD Input Pulse Width (Figure 1) tsu th tsu1 th1 p. 6 Last update: 2004-03-05 12:13 ESC1621 Application Circuits Host controller with a ESC1621 display system CS * VDD RD * WR VLCD DATA VR C ESC1621 BZ * R IRQ OSCI Clock Out OSCO COM0~ COM3 SEG0 ~ SEG31 Piezo BZ External Clock 1 External Clock 2 On-chip OSC 1/2 or 1/3 Bias; 1/2, 1/3 or 1/4 Duty LCD PANEL Crystal 32768Hz Note: The connection of IRQ and RD pin can be selected depending on the requirement of the C. The voltage applied to VLCD pin must be lower than VDD. Adjust VR to fit LCD display, at VDD=5V, VLCD=4V, VR=15kO+20% Adjust R (external pull- high resistance) to fit user' time base clock. s p. 7 Last update: 2004-03-05 12:13 |
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