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| Product News High-performance mega-pixel series for digital still cameras CCD Area Image Sensor MN39482PJ Overview MN39482PJ is a 1/2.5 type CCD image sensor having a square picture element array. A total pixel count of 4.24 mega-pixels allows these sensors to deliver stable highresolution images, proving ideal for improving digital still camera picture quality. Feature * High sensitivity * Low smear * low noise amp * Horizontal CCD at 3.3V for low power consumption * Highly reliable packaging Applications Digital still cameras System Block Diagram MN39482PJ NN12060A NN12061A Digital pre-processor Timing generator Vertical driver MN103S5405YD SDRAM 64M CCD Digital Signal processor Video out Analog RGB Flash card Products and specifications are subject to change without notice. Please ask for the latest Product Standards to guarantee the satisfaction of your product requirements. , New publication, effective from 5 Feb. 2004 M00626AE 1 Kotari-yakemachi, Nagaokakyo, Kyoto 617-8520, Japan Tel. +81-75-951-8151 http://panasonic.co.jp/semicon Block Diagram (OB 14 + OBtransient 2 +transient 16+ valid area 2304 + transient 16 +OBtransient 2+ OB 54) (OB 1 + OB transient 2 +transient 8+ valid area 1728 + transient8 +OBtransient 2+ OB 9+1 dummie) Vertical shift register Photo diode 1 2 3 4 5 6 7 8 VV6 VV5B VV5A VV4 VV3B VV3A VV2 VV1 VO OD PW 9 10 12 Output section 14 Sub SW 15 VSub Horizontal shift register (28 dummies + 2408) 13 VPT 18 H2 OB block 11 16 VHL 1728 VRG Element Construction 0 Vertical dummy bit (without PD) 1 Shielding block 2 Shielding block transient(PDs exist) 8 For transient (PDs exist) Active pixels 2304 14 2 16 16 H1 17 2 54 9 2 9 Shielding block 1 Vertical dummy bit (without PD) 28 Horizontal dummy bit 2408 Pin Description Pin No. 1 2 3 4 5 6 7 8 9 Symbol VV6 VV5B VV5A VV4 VV3B VV3A VV2 VV1 VO Pin Description Vertical shift register clock pulse 6 Vertical shift register clock pulse 5B Vertical shift register clock pulse 5A Vertical shift register clock pulse 4 Vertical shift register clock pulse 3B Vertical shift register clock pulse 3A Vertical shift register clock pulse 2 Vertical shift register clock pulse 1 CCD output Pin No. 10 11 12 13 14 15 16 17 18 Symbol VOD VRG PW VPT SubSW VSub VHL VH1 VH2 Pin Description Output drain Reset pulse GND P-Well Substrate control Substrate Horizontal shift register clock pulse Horizontal shift register clock pulse 1 Horizontal shift register clock pulse 2 Pin Arrays VV6 VV5B VV5A VV4 VV3B VV3A VV2 VV1 VO 1 2 3 4 5 6 7 8 9 Top View 18 17 16 15 14 13 12 11 VVH2 VVH1 VHL Vsub Sub SW VPT PW VRG VOD Device Parameter Parameter Total pixel number Effective pixel number (Transient exist) Active pixel number Pixel dimension Image sensing block dimension Value 2,408(H ) x 1,758(V) = 4,233,264 2,336(H ) x 1,744(V) = 4,073,984 2,304(H ) x 1,728(V) = 3,981,312 2.5 x 2.5 5.7600(H) x 4.3200(V) Unit pixel pixel pixel m2 mm2 Optical Characteristics Parameter Saturation output Sensitivity Smear Matsushita tester value Symbol Vsat SoG Sm Condition - - - Min - - - Typ 600 200 -86 Max - - - Unit mV mV dB |
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