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IDT5V926 SINGLE OUTPUT CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
SINGLE OUTPUT CLOCK GENERATOR
IDT5V926
FEATURES:
* * * * * * * *
3V to 3.6V operating voltage 48MHz to 160MHz output frequency range Input from fundamental crystal oscillator or external source Internal PLL feedback (loading feedback output relative to other outputs, adjusts propagation delay between REF inputs and outputs) Select inputs (S[1:0]) for FB divide selection (multiply ratio of 2, 3, 4, 4.25, 5, 6, 6.25, and 8) Low jitter PLL bypass for testing and power-down control (S1 = H, S0 = H, powers part down <500A) Available in TSSOP package
The IDT5V926 is a low-cost, low skew, low jitter, and high-performance clock synthesizer with a reference clock from lower frequency crystal or clock input. It has been specially designed to interface with Gigabit Ethernet and Fast Ethernet applications by providing a 125MHz clock from 25MHz input. It can be programmed to provide output frequencies ranging from 48MHz to 160MHz, with input frequencies ranging from 6MHz to 80MHz. The IDT5V926 includes an internal RC filter that provides excellent jitter characteristics and eliminates the need for external components. When using the optional crystal input, the chip accepts a 10 - 40MHz fundamental mode crystal with a maximum equivalent series resistance of 50.
DESCRIPTION:
APPLICATIONS:
* * * * * * Gigabit ethernet Router Network switches SAN Instrumentation Fibre channel
FUNCTIONAL BLOCK DIAGRAM
OE
VCO DIVIDE 1/N
PHASE DETECTOR
CHARGE PUMP
LOOP FILTER
VCO
QOUT
0 1 X1/REF CRYSTAL OSCILLATOR X2 SELECT MODE QREF
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
S1
S0
REFE
INDUSTRIAL TEMPERATURE RANGE
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c 2003 Integrated Device Technology, Inc.
APRIL 2003
DSC 5405/4
IDT5V926 SINGLE OUTPUT CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Supply Voltage to Ground Input Voltage Output Current Storage Temperature Junction Temperature Max. - 0.5 to +4.6 - 0.5 to +4.6 50 - 65 to +150 150 Unit V V mA C C
REFE X1/REF X2 VDD VDDQ GND QREF VDDQ
1 2 3 4 5 6 7 8
TSSOP TOP VIEW
1 6 1 5 1 4 1 3 1 2 1 1 1 0 9
S0 S1 OE GND VDDQ GND QOUT VDDQ
VDD/VDDQ VI IO TSTG TJ
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
PIN DESCRIPTION
Pin Name Type S[1:0] OE I I Description Three level divider/mode select pins. Float to MID. Output enable bar. Outputs QOUT and QREF are tristated when HIGH. Set OE LOW for normal operation (has internal pulldown). QREF enable input. QREF stopped LOW when HIGH. When set REFE LOW, the QREF is enabled (has internal pull-down). Crystal oscillator input or clock input Crystal oscillator output. Leave unconnected for clock input. Output at N*REF frequency Output at REF frequency Power supply for the device outputs. Connect to VDD on PCB. Power supply for the device core and inputs. Connect to VDD on PCB. GND PWR Ground supply
REFE X1/REF X2 QOUT
I I I O O PWR PWR
CRYSTAL SPECIFICATION
The crystal oscillators should be fundamental mode quartz crystals: overtone crystals are not suitable. Crystal frequency should be specified for parallel resonance with 50 maximum equivalent series resonance. Crystal tuning capacitors should be connected from X1/REF to GND and from X2 to GND.
QREF VDDQ VDD
DIVIDE SELECTION TABLE(1)
S1 L L L M M M H H H S0 L M H L M H L M H Divide-by-N Value 2 3 4 4.25 5 6 6.25 8 TEST Mode PLL PLL PLL PLL PLL PLL PLL PLL TEST (2)
NOTES: 1. H = HIGH M = MEDIUM L = LOW 2. Test mode for low frequency testing. In this mode, REF clock bypasses the VCO (VCO powered down) and the crystal oscillator is powered down.
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IDT5V926 SINGLE OUTPUT CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
COMMON OUTPUT FREQUENCY EXAMPLES (MHz)
Output Input FB Divide Selection S[1:0] Output Input FB Divide Selection S[1:0] 48 24 LL 106.25 17 HL 60 10 MH 106.25 25 ML 64 16 LH 120 15 HM 72 12 MH 125 20 HL 75 25 LM 125 25 MM 80 10 HM 125 62.5 LL 90 15 MH 150 25 MH 100 20 MM 155.52 19.44 HM
OPERATING CONDITIONS
Symbol VDD/VDDQ TA CL CIN Parameter Power Supply Voltage Operating Temperature Output Load Capacitance Input Capacitance, OE, F = 1MHz, VIN = 0V, TA = 25C Min. 3 - 40 -- -- Typ. 3.3 25 -- 5 Max. 3.6 +85 15 7 Unit V C pF pF
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VDD/VDDQ = 3.3V 0.3V
Symbol VIL VIH VIHH VIMM VILL I3 IIH VOL VOH Parameter Input LOW Voltage Input HIGH Voltage Input HIGH Voltage Input MID Voltage Input LOW Voltage 3-Level Input DC Current, S[1:0] Input HIGH Current Output LOW Voltage Output HIGH Voltage Test Conditions Min. -- 2 VDD - 0.6 VDD/2 - 0.3 -- -- - 50 - 200 -- -- -- 2.4 Typ. -- -- -- -- -- -- -- -- -- 2 -- -- Max 0.8 -- -- VDD/2 + 0.3 0.6 +200 +50 -- 100 4 0.4 -- Unit V V V V V A A mA V V
3-level input only 3-level input only 3-level input only VIN = VDD VIN = VDD/2 VIN = GND VIN = VDD VIN = VDD, S[1:0] = HH IOL = 12mA IOH = -12mA
HIGH Level MID Level LOW Level OE, REFE X1/REF
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IDT5V926 SINGLE OUTPUT CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol IDD_PD Parameter Power Down Current Test Conditions (1) VDD = Max. S[1:0] = HH OE = L; X1/REF = L All outputs unloaded IDD IDD Supply Current per Input Dynamic Supply Current VDD = Max., VIN = 3V VDD = 3.6V S[1:0] = LL OE = L FOUT = 150MHz All outputs unloaded
NOTE: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
Min. --
Typ. --
Max 500
Unit A
-- --
-- --
30 130
A mA
AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Symbol tR, tF dT Parameter Rise Time, Fall Time Output/Duty Cycle Test Conditions 0.8V to 2V VT = VDDQ/2 FOUT = 106.25MHz tJ fOUT Cycle - Cycle Jitter Output Frequency FOUT = 125MHz FOUT = 155.52MHz -- QOUT QREF QOUT QREF Min. -- -- 45 40 - 100 - 75 - 75 48 Typ. 0.7 0.7 -- -- -- -- -- -- Max. 1.5 2 55 60 100 75 75 160 MHz ps % Unit ns
INPUT TIMING REQUIREMENTS
Symbol tR, tF tPWC DH fOSC fIN Description(1) Maximum input rise and fall time, 0.8V to 2V(2) Input clock pulse, HIGH or LOW(2) Input duty cycle(2) XTAL oscillator frequency Input frequency(2) Min. -- 2 10 -- 48/N Max. 10 -- 90 40 160/N Unit ns/V ns % MHz MHz
NOTES: 1. Where pulse width implied by DH is less than the tPWC limit, tPWC limit applies, 2. When using a clock input.
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IDT5V926 SINGLE OUTPUT CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
AC TEST LOADS AND WAVEFORMS
VDD
150
OUTPUT
15pF
150
AC Test Load
3V 2V VTH = VDD/2 0.8 0V
1ns
1ns
Input Test Waveform
VDDQ 2V VTH = VDDQ/2 0.8 0V
tR
tF
Output Waveform
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IDT5V926 SINGLE OUTPUT CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XXXX Device Type X Package X Process
I PG 5V926
-40C to +85C (Industrial) Thin Shrink Small Outline Package Single Output Clock Generator
CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054
for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com
for Tech Support: logichelp@idt.com (408) 654-6459
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