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 Compact, 1.5 A Linear Charger for Single-Cell Li+ Battery ADP2291
FEATURES
Simple, safe linear charger for single cell lithium battery 4.5 V to 12 V input voltage range Adjustable charging current up to 1.5 A Low cost PNP external pass element Automatic reverse isolation with no external blocking diode Output overshoot protection Deep discharge precharge mode Thermal shutdown Automatic recharge Programmable termination timer LED charging status indicator 4.2 V output voltage with 1% accuracy over line and temperature 1 A shutdown supply current Small, 8-pin MSOP and 3 x 3 mm LFCSP packages
GENERAL DESCRIPTION
The ADP2291 is a constant-current/constant-voltage linear charger for a single cell lithium ion battery, requiring just a few components to provide a simple and safe charging system that operates from a wide 4.5 V to 12 V input voltage range. It features an internally controlled, multistep charging cycle that improves battery life. An external, low cost, PNP provides the charging current to the battery and an external resistor sets the maximum charge current. A small external capacitor programs the maximum charge time. The controller includes an LED driver to indicate the battery charging status. Safety features include charging stop mode for battery faults, output overshoot protection, and thermal shutdown. The ADP2291 also features automatic reverse isolation, which does not require an additional blocking diode. The multistep charge cycle optimizes the battery charging time in a safe manner. It features a trickle charge mode for a deeply discharged cell and a fast charging mode with a maximum current of 1.5 A. The ADP2291 controls the end of charge with a 4.2 V output voltage that is 1% accurate over line and temperature. It automatically recharges the battery if the cell voltage drops. When the input supply is removed, the part enters a low current state and reduces the current drawn from the battery to below 1 A. The ADP2291 is available in both a small, 8-pin MSOP package and a 3 x 3 mm LFCSP package that is ideally suited for small, portable applications.
APPLICATIONS
Wireless handsets Smart handhelds and PDAs Digital cameras Single cell lithium ion-powered systems Cradle chargers
TYPICAL OPERATING CIRCUIT
INPUT 4.6V-12V CIN CS IN DRV BAT RS Q1 + COUT
ADP2291
CHG TIMER CTIMER ADJ SHUTDOWN
04873-0-001
GND
Figure 1. Basic Circuit Configuration
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
ADP2291 TABLE OF CONTENTS
Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration And Functional Descriptions......................... 6 Typical Performance Characteristics ............................................. 7 Theory of Operation ...................................................................... 10 Precharge Mode.......................................................................... 10 End-of-Charge Mode................................................................. 10 Shutdown Mode.......................................................................... 10 Charge Restart............................................................................. 10 Programmable Timer................................................................. 10 Charge Status Indicator ............................................................. 10 Automatic Reverse Isolation ..................................................... 10 Overshoot Protection................................................................. 10 Power Supply Checks ................................................................. 10 Thermal Shutdown .................................................................... 11 Application Information................................................................ 12 Setting the Maximum Charge Current.................................... 12 Setting the Maximum Charge Time ........................................ 12 External Capacitors.................................................................... 12 Reverse Input Protection........................................................... 12 External Pass Transistor ............................................................ 13 Typical Application Circuit ....................................................... 14 EOC Terminates Charging........................................................ 14 Selectable Charge Current......................................................... 14 Thermal Protection.................................................................... 14 Printed Circuit Board Layout Considerations........................ 16 LFSCP Layout Considerations.................................................. 16 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 18
REVISION HISTORY
10/04--Initial Version: Revision 0
Rev. 0 | Page 2 of 20
ADP2291 SPECIFICATIONS
VIN = 5.5 V, VBAT = 4.2 V, RADJ open, TA = -40C to +85C, typical values are at 25C unless otherwise noted.1
Table 1. Electrical Characteristics
Parameter Power Supply, IN Input Voltage Current Draw Battery Voltage, BAT Voltage Accuracy, End-of-charge (VBAT, EOC) Conditions Min 4.5 Fast charge/precharge/end-of-charge modes Timeout/shutdown/battery fault TA = 0C to +50C VIN = 4.5 V to 12 V VIN - VCS = VRS/10 VIN - VCS = 0 to VRS Timeout mode VIN = 4.5 V to 12 V Battery fault/shutdown mode VIN = 4.5 V to 12 V Power-down mode VIN = float, VBAT = 4.2 V VIN - VCS, RADJ = open VIN = 4.5 V to 12 V VBAT = 3.6 V VIN - VCS, RADJ = 100 k VIN = 4.5 V to 12 V VBAT = 3.6 V per V of (3 V - VADJ) VIN - VCS, RADJ = open VIN = 4.5 V to 12 V VBAT = 2 V VIN - VCS, RADJ = 100 k VIN = 4.5 V to 12 V VBAT = 2 V VBAT rising 4.158 6 1.4 4.2 Typ Max 12 9 1.8 4.242 Unit V mA mA V
Load Regulation, No Battery Current Draw Current Draw Reverse Leakage Current Fast Charge Mode Sense Voltage Setpoint (VRS)
-80 45 0.1 0.1 1
mV A A A
140
150
160
mV
Sense Voltage Setpoint (VRS)
40
50
60
mV
Current Regulation Adjustment Precharge Mode Sense Voltage Setpoint (VRS)
67 10 15 20
mV/V mV
Sense Voltage Setpoint (VRS)
5
10
15
mV
BAT Precharge Threshold Hysteresis Shutdown Mode ADJ Shutdown Threshold Hysteresis Pullup current from ADJ Power-Down Mode VIN Powerdown Threshold Hysteresis VIN_Good Comparator Threshold (VIN > VBAT) Hysteresis EOC Comparator Current Threshold Current Threshold Hysteresis Restart Comparator BAT Restart Threshold
2.65 70
2.85
V mV V mV A V mV mV mV % % mV mV
VADJ falling, VIN = 4.5 V VADJ = 0 VIN rising
0.30 40 40 3.6 220
0.45
4
VIN rising
125
170 110 10 10 12
220
VIN - VCS falling, RADJ = open, relative to VRS VIN - VCS falling, RADJ = 100 k, relative to VRS
7 6
13 16
VIN > 4.5 V, VBAT falling, relative to VBAT, EOC
-170
Rev. 0 | Page 3 of 20
ADP2291
Parameter Battery Charge Timer Charge/Discharge TIMER Current Low Threshold High Threshold High-Low Threshold Delta2 Overshoot Protection BAT Threshold Current Sink CHG Output Output Voltage Low Output Leakage Current Base Drive Capability Max Base Drive Current Thermal Shutdown Shutdown Threshold Hysteresis Conditions Min 21.0 Typ 24.0 1.2 2.0 Max 27.0 Unit A V V mV V A V A mA 135 35 C C
750 4.7 <2 ms duration Current = 20 mA VCHG = 5 V 40 TA rising 5 1.5
850 5.3
0.1
0.45 1
1 2
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Typical values are at TA = 25 C. Guaranteed by design, not tested in production.
Rev. 0 | Page 4 of 20
ADP2291 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter IN, DRV1, CS, CHG, to GND BAT, ADJ, TIMER to GND Operating Ambient Temperature Operating Junction Temperature JA, 2-layer MSOP-8 JA, 4-layer MSOP-8 JA, 2-layer LFCSP-8 JA, 4-layer LFCSP-8 Storage Temperature Lead Temperature Range Soldering (10 sec) Rating -0.3 V to +13.5 V -0.3 V to (VIN + 0.3 V) -40C to +85C -40C to +125C 220C/W 158C/W 62C/W 48C/W -65C to +150C 300C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condition s above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified all other voltages referenced to GND.
1
Pulling current from the DRV pin by driving it below ground, while VIN is applied, may cause permanent damage to the device.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 20
ADP2291 PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
DRV 1 GND 2 BAT 3 CS 4
8
CHG TIMER IN ADJ
04873-0-002
ADP2291
TOP VIEW (Not to Scale)
7 6 5
DRV 1 GND 2 BAT 3 CS 4
PIN 1 INDICATOR
8 CHG 7 TIMER 5 ADJ
04873-0-003
ADP2291
TOP VIEW (Not to Scale)
6 IN
Figure 2. 8-Lead MSOP
Figure 3. 8-Lead LFCSP
Table 3. Pin Function Descriptions
Pin No. 1 2 3 4 5 6 7 8 Mnemonic DRV GND BAT CS ADJ IN TIMER CHG Description Base Driver Output. Controls the base of an external PNP pass transistor. Ground. Battery Voltage Sense Input. Current Sense Resistor Negative Input. Charging Current Adjust and Charger Shutdown Input. Power Input and Current-Sense Resistor Positive Input. Timer Programming Input/Disable. LED Charge-Status Indicator. This is an open-collector output.
Rev. 0 | Page 6 of 20
ADP2291 TYPICAL PERFORMANCE CHARACTERISTICS
4.21 800.0 700.0 4.205 600.0 500.0
ICHG (mA) VBAT (V)
4.20
400.0 300.0
4.195
04873-0-004
200.0 100.0 0.0 2.50
04873-0-007
4.19 4 6 8 VIN (V) 10
12
3.00
3.50 IBAT (V)
4.00
4.50
Figure 4. Battery Voltage vs. Input Voltage
Figure 7. Charge Current vs. Battery Voltage, RS = 200 m, VADJ = 3 V
4.21
250
200 4.205
IREVERSE (nA)
04873-0-005
VBAT (V)
150
4.20
100
4.195 50
04873-0-008
4.19 -50
-25
0
25 50 TEMPERATURE (C)
75
100
125
0 -50
-25
0
25 50 75 TEMPERATURE (C)
100
125
Figure 5. Battery Voltage vs. Temperature
Figure 8. Battery Reverse Current vs. Temperature VIN = float, VBAT = 4.2 V
4.10
4.22
4.09
4.21
VRESTART (V)
04873-0-006
VBAT (V)
4.08
4.20
4.07
4.19
4.06
04873-0-009
4.18 0 200 400 ICHG (mA) 600
800
4.05 -40
-20
0
20 40 60 TEMPERATURE (C)
80
100
Figure 6. Battery Voltage vs. Charge Current, RS = 200 m, VADJ = 3 V
Figure 9. Restart Threshold
Rev. 0 | Page 7 of 20
ADP2291
16.0 153
15.8
152
VRS (mV)
VRS (mV)
15.6
151
15.4
150
15.2
04873-0-010
149
04873-0-013
15.0 4 6 8 VIN (V) 10
148 4 6 8 VIN (V) 10
12
12
Figure 10. Precharge VRS vs. Input Voltage
Figure 13. Fast Charge VRS vs. Input Voltage
15.5
152
15.4
151
VRS (mV)
15.3
VRS (mV)
04873-0-011
150
15.2
149
04873-0-014
15.1 -50
-25
0
25 50 75 TEMPERATURE (C)
100
125
148 -50
-25
0
25 50 75 TEMPERATURE (C)
100
125
Figure 11. Precharge VRS vs. Temperature
Figure 14. Fast Charge VRS vs. Temperature
16
160
140 14 120
VRS (mV) VRS (mV)
12
100
80 10
04873-0-012
8 100
1k RADJ (k)
10k
40 100
1k RADJ (k)
10k
Figure 12. Precharge VRS vs. RADJ
Figure 15. Fast Charge VRS vs. RADJ
Rev. 0 | Page 8 of 20
04873-0-015
60
ADP2291
135
CH1 = VBAT 4.18V OFFSET
130
BASE DRIVE (mA)
1
125
120
04873-0-016
CH2 = VIN 5V OFFSET VIN = 5V TO 8V 2
04873-0-018
115 4 6 8 VIN (V) 10
12
CH1 10.0mV BW CH2 1.00V
BW M200s
CH2
6.18V
Figure 16. Base Drive vs. Input Voltage
Figure 18. Line Transient Response IBAT = 350 mA
122 120 118
BASE DRIVE (mA)
CH1 = VBAT 4.18V OFFSET 1
116 114 112 110 108 106 104 -40 -20 0 20 40 60 TEMPERATURE (C) 80
04873-0-017
CH3 = IBAT 200mA/DIV IBAT = 70mA TO 700mA
04873-0-019
3 CH1 20.0mV BW CH3 10.0mV M100s CH3 10.0mV
100
Figure 17. Base Drive vs. Temperature VIN = 5 V
Figure 19.Load Transient Response VIN = 5 V
Rev. 0 | Page 9 of 20
ADP2291 THEORY OF OPERATION
The ADP2291 is intended to charge a single cell, lithium battery from a supply voltage or wall adapter providing 4.5 V to 12 V. The charge controller adjusts the base current of an external PNP transistor to optimize current and voltage applied to the battery during charging. A low value resistor placed in series with the battery charging current provides current measurement for the ADP2291. To assure safety and long battery lifetime, the ADP2291 charges the battery using a simple step-by-step cycle, as shown in the state diagram of Figure 26. The normal charge cycle begins by measuring the battery voltage to determine charge level. If the battery is deeply discharged, then low current precharge is initiated. Once precharge is complete, normal fast charge at the maximum current (denoted as IMAX) begins. This maximum current can be adjusted by varying the sense resistor value or by varying the voltage at the adjust pin. As the battery approaches full capacity, the charging current is reduced until the end-ofcharge condition is reached. Batteries that are not deeply discharged skip the precharge mode and immediately begin fast charging. Each of these modes and associated fault conditions are discussed in detail.
CHARGE RESTART
Once charge is complete in end-of-charge or timeout modes, the ADP2291 continually monitors the cell voltage and charge current. When the cell voltage falls by 100 mV or the charge current increases beyond the EOC hysteresis, the ADP2291 initiates another charge cycle to keep the cell fully charged. See the state diagram in Figure 26.
PROGRAMMABLE TIMER
The on-chip timer, controlled by an external capacitor CTIMER, determines the timeout intervals of the various charger modes. For example, a CTIMER value of 0.1 F results in a precharge timeout interval of 30 minutes, a fast charge timeout of 3 hours, and an end-of-charge timeout of 30 minutes. The ratio between precharge and end-of-charge to fast charge time-out is always 1/6. All these time intervals are proportional to the CTIMER capacitor value, allowing them to be adjusted over a wide range. Connecting the TIMER pin to ground disables the timer.
CHARGE STATUS INDICATOR
The ADP2291 contains a charge status output, CHG, that sinks current when the ADP2291 is charging the battery. This output can be used as a visual signal by connecting it to an LED, or it may be used to generate a logic-level charge status signal by connecting a resistor between CHG and logic high.
PRECHARGE MODE
For deeply-discharged cells, the ADP2291 charges at a reduced rate when the battery voltage VBAT < 2.8 V. This reduced rate is IMAX/10 when the ADJ pin voltage is 3 V, and IMAX/5 when the ADJ pin voltage is 1.5 V. For ADJ pin voltages in between, the charge current can be interpolated. If the battery voltage does not increase past 2.8 V before the precharge timer elapses (typically 30 minutes), a battery fault is assumed and the ADP2291 shuts down and does not restart until the input voltage is cycled OFF and then back ON. Note that in this mode shutdown commands are ignored.
AUTOMATIC REVERSE ISOLATION
When the voltage on the BAT pin is higher than the voltage on IN, the ADP2291 automatically connects the base of the pass device to BAT. This removes the necessity of having an external diode between the pass device and battery, further reducing the charger's footprint and component count.
END-OF-CHARGE MODE
Once the voltage loop reduces the charge current to 1/10 of its nominal value, IMAX (irrespective of the ADJ voltage), the ADP2291 detects the end-of-charge (EOC) state and the charge status indicator becomes high-impedance. Low level charging continues until the timer terminates the charge (nominally 30 minutes).
OVERSHOOT PROTECTION
In the event of a battery disconnect during charging, a voltage overshoot condition on BAT could occur. The ADP2291 includes an overshoot protection circuit that activates when VBAT rises to 5 V and sinks up to 1.5 A to protect the external components.
POWER SUPPLY CHECKS
To assure proper operation, the ADP2291 checks the absolute voltage level of the input supply and the supply voltage relative to the battery. When the supply IN is below 3.8 V, the chip is internally powered down and does not respond to external control. In this power-down mode, the device draws less than 1 A from the battery. The VIN good comparator halts operation if the supply voltage is less than 165 mV above the battery voltage, insuring that charging only occurs if the supply voltage is sufficient.
SHUTDOWN MODE
When the ADJ input is pulled below 0.4 V, the ADP2291 is put into shutdown mode. When in this mode, the charger is disabled, the current drawn from the battery falls to less than 1 A and the current drawn from IN falls to 0.7 mA. When the charger is re-enabled, the charger returns to the START state but quickly sequences through the states until the proper charge mode is reached.
Rev. 0 | Page 10 of 20
ADP2291
THERMAL SHUTDOWN
In the event that the ADP2291 junction temperature rises above 135C, thermal shutdown occurs. Extreme junction temperatures may be the result of excessive current operation and/or high ambient temperatures. A 35C temperature hysteresis is
IN CS DRV
included so that the ADP2291 does not return to operation during thermal shutdown until the on-chip temperature drops below 100C.
BAT
3V 5V GM ADJ GM GM 1.2V VOLTAGE REFERENCE
TEMP
SHUTDOWN 0.4V IN BAT IN 3.8V IPNP C/10 END_OF_CHARGE TIMER POWER_DOWN VIN_GOOD CONTROL LOGIC
RESTART
BAT 4.1V
PRECHARGE
BAT 2.5V
CHG
TIMER
Figure 20. Functional Block Diagram
Rev. 0 | Page 11 of 20
04873-0-020
ADP2291 APPLICATION INFORMATION
SETTING THE MAXIMUM CHARGE CURRENT
The maximum charge current is set by choosing the proper current sense resistor, RS, and the voltage on the ADJ input. The charger nominally regulates its output current at the point where the voltage across the current sense resistor VIN-VCS (defined as VRS) is 150 mV. This setpoint voltage can be adjusted by pulling down on the ADJ input, which is internally attached through a 100 k pull-up resistor to 3 V. Each volt of pull-down from 3 V will reduce VRS by 67 mV during fast charge. A minimum of 50 mV is reached when a 100 k resistor is attached between ADJ and ground. During slow charge the voltage across the current sense resistor is 15 mV with no connection to ADJ and drops to 10 mV with a 100 k resistor attached to ground. Therefore the maximum charge rate IMAX can be calculated as
SETTING THE MAXIMUM CHARGE TIME
The maximum charge time is intended as a safety mechanism to prevent the charger from trickle charging the cell indefinitely. It does not terminate charging under normal charging conditions, but only when there is a failure to reach end-of-charge. A typical cell charges at a 1 C rate in about 1.5 hours, depending on the cell type, temperature, and manufacturer. Generally, a three hour time limit is sufficient to prevent a normal charge cycle from being interrupted by the charge timer. It is recommended that the cell manufacturer be consulted for timing details. The maximum charge time is set by selecting the value of the CTIMER capacitor. Calculate the timer capacitance using CTIMER = tCHG(minutes) x
1 F 1800 minutes
(4)
I MAX =
VRS (mV) R S (m)
(1)
where 50 mV VRS 150 mV After determining suitable values for VRS and RS, the value of VADJ and RADJ can be calculated as
The precharge and end-of-charge periods are 1/6 the duration of the fast charge time limit. The charge timers are completely disabled by connecting the TIMER pin to ground. If the timers are disabled, the FAULT and TIMEOUT states are never reached, so the timers should only be disabled if charging is monitored and controlled externally.
V ADJ =
VRS (mV) + 50 mV 66.7 mV
EXTERNAL CAPACITORS
V (2) Use an input supply capacitor (CIN) with a value in the 1 F to 10 F range and place it close to the ADP2291. This should provide adequate input bypassing, but the selected capacitor should be checked in the actual application circuit. Check that the input voltage does not droop or overshoot excessively during the start-up transient. Use a battery output capacitor (COUT) with a value of at least 10 F. This capacitance provides compensation when no battery load is present. In addition, the battery and interconnections appear inductive at high frequencies and must be accounted for when the charger is operated with a battery load. Therefore, a small amount of output capacitance is necessary to compensate for the inductive nature of the battery and connections. Use a minimum output capacitance value of 1 F for applications where the battery cannot be removed.
VADJ RADJ = 100 k x 3V - VADJ
Examples of resistor combinations are shown in Table 4.
Table 4. Examples of RS and RADJ Selection
IMAX 1.5 A 1A 750 mA 500 mA 750 mA 500 mA 375 mA 250 mA 500 mA 333 mA 250 mA 167 mA RS 100 m 100 m 100 m 100 m 200 m 200 m 200 m 200 m 300 m 300 m 300 m 300 m VRS 150 mV 100 mV 75 mV 50 mV 150 mV 100 mV 75 mV 50 mV 150 mV 100 mV 75 mV 50 mV VADJ 3V 2.25 V 1.87 V 1.5 V 3V 2.25 V 1.87 V 1.5 V 3V 2.25 V 1.87 V 1.5 V
(3)
RADJ Open 300 K 167 K 100 K Open 300 K 167 K 100 K Open 300 K 167 K 100 K
REVERSE INPUT PROTECTION
The diode, D1, shown in Figure 22 through Figure 25 is optional. It is only required if the input adapter voltage can be applied with a reverse polarity. If the adapter voltage is high enough, a Schottky diode is recommended to minimize the voltage difference from the adapter to the charger input and the power dissipation. Choose a diode with a continuous current rating high enough to handle battery charging current at the maximum ambient temperature. Use a diode whose voltage rating is greater than the maximum adapter voltage.
Rev. 0 | Page 12 of 20
ADP2291
In cases where the voltage drop across the protection device must be kept low, a P MOSFET is recommended. Connect the MOSFET as shown in Figure 21.
INPUT 4.6V-12V CIN CS IN CHG
04873-0-021
The power handling capabilities of the PNP pass transistor is another important parameter. The maximum power dissipation of the pass transistor is estimated using
PDISS (W) = IMAX x (VADAPTER(MAX) - VPROTECT - VRS - VBAT) (7)
RS
DRV
ADP2291
where VRS = 150 mV at VADJ = 3.0 V = 50 mV at VADJ = 1.5 V VBAT = 2.8 V, the lowest cell voltage where fast charge can occur It should be noted that the adapter voltage can be either preregulated or unregulated. In the preregulated case the difference between the maximum and minimum adapter voltage is small. In this case use the maximum regulated adapter voltage to determine the maximum power dissipation. In the unregulated case, the adapter voltage can have a wide range specified. However, the maximum voltage specified is usually with no load applied. Therefore, the worst-case power dissipation calculation often leads to an over-specified pass device. In either case, it is best to determine the load characteristics of the adapter to optimize the charger design. For example:
VADAPTER(MIN) = 5.0 V VADAPTER(MAX) = 6.0 V IMAX = 500 mA VPROTECT = 0.2 V at 500 mA VADJ = 3 V VRS = 150 mV
Figure 21. Reverse Input Protection
EXTERNAL PASS TRANSISTOR
Choose the external PNP pass transistor based on the given operating conditions and power handling capabilities. The pass device is determined by the base drive available, the input and output voltage, and the maximum charge current. Select the pass transistor with a collector-emitter breakdown voltage that exceeds the maximum adapter voltage. A VCEO rating of at least 15 V is recommended. To provide a charge current of IMAX with a minimum base drive of 40 mA requires a PNP beta of at least
MIN =
IMAX IMAX = 40mA I
(5)
Note that the beta of a transistor drops off with collector current. Therefore, make sure the beta at IMAX meets the minimum requirement. For cases where the adapter voltage is low (less than 5.5 V) calculate the saturation voltage using the following equation:
VCE(SAT) = VADAPTER(MIN) - VPROTECT - VRS - VBAT
MIN =
IMAX 500mA = = 12.5 40mA I
(6)
VCE(SAT) = VADAPTER(MIN) - VPROTECT - VRS - VBAT = 5.0 V - 0.2 V - 0.15 V - 4.2 V = 0.45 V PDISS (W) = IMAX x (VADAPTER(MAX) - VPROTECT - VRS - VBAT) = 0.50 A x (6.0 V - 0.2 V - 0.15 V - 2.8 V) = 1.4 W
where VPROTECT = the forward drop of the reverse input protection.
A guide for selecting the PNP transistor is given in Table 5.
Table 5. PNP Pass Transistor Selection Guide
Vendor Fairchild
ON Semi
Philips ZETEX
Part Number FSB6726 NZT45H8 MTB35200 BCP53T1 MMJT9435 BCP51 ZXT10P20DE6 ZXT2M322 FZT549 FMMT549
Package SuperSOT SOT223 TSOP-6 SOT223 SOT223 SOT223 SOT23-6 2 mm x 2 mm MLP SOT223 SOT23
Max PD@ 25C 0.5 W 1.5 W 0.625 W 1.5 W 1.6 W 1.3 W 1.1 W 1.5 W 2W 0.5 W
Beta @1A 150 110 200 35 200 50 270 270 130 130
VCE (SAT) 0.5 V 0.1 V 0.175 V 0.3 V 0.18 V 0.5 V 0.17 V 0.17 V 0.25 V 0.25 V
Rev. 0 | Page 13 of 20
ADP2291
TYPICAL APPLICATION CIRCUIT
A typical application circuit is shown in Figure 22. The circuit is capable of a 750 mA charge current for an input voltage of 4.5 V to 6 V. Higher input voltages can be used, but the increased power dissipation of the pass device must be taken into account.
INPUT 4.6V-12V D1 BAT1000 CIN 2.2F IN RS 200m Q1 FZT549 + CS DRV BAT COUT 10F
LOW/HIGH INPUT 4.6V-12V D1 BAT1000 CIN 2.2F IN RS 200m Q1 FZT549 + CS DRV BAT COUT 10F LI-ION CELL
ADP2291
CHG TIMER CTIMER 100nF ADJ R2 100k
04873-0-024
GND
Q2 2N7002
ADP2291
CHG TIMER CTIMER 100nF ADJ
04873-0-022
GND
Figure 24. Selectable Charge Current Circuit
THERMAL PROTECTION
In applications where the overall size must be small or the input voltage range is wide, adding thermal regulation is suggested. This allows the charger to monitor the temperature of the pass device and decrease the charge current as the temperature increases. By adding a NTC thermistor to the ADJ pin it is possible to accomplish this; however, care is still required to ensure that the power dissipation of the pass device is not exceeded.
INPUT 4.6V-12V D1 BAT1000 CIN 2.2F RS 200m Q1 FZT549 + CS IN DRV BAT COUT 10F LI-ION CELL
Figure 22. Typical Application Circuit
EOC TERMINATES CHARGING
In some applications, the charger is required to terminate charging when the EOC threshold is reached. Automatic charger restart is not desired. Adding components R1, C1, and Q2 terminates charging when the CHG pin opens and prevents further charging until the adapter is removed and reasserted.
INPUT 4.6V-12V D1 BAT1000 CIN 2.2F R1 500k IN RS 200m Q1 FZT549 + CS DRV BAT COUT 10F LI-ION CELL
ADP2291
CHG TIMER ADJ R1 470k NTC LOCATED NEAR Q1 R2 100k GND
ADP2291
CHG TIMER CTIMER 100nF C1 100nF
04873-0-023
GND ADJ
CTIMER 100nF
Q2 2N7002
Figure 25. Thermal Regulation Circuit
Figure 23. Self-Termination Circuit
Some suggested NTC thermistor suppliers are listed in Table 6.
Table 6. NTC Thermistor Manufacturers
Vendor BetaTherm Murata Panasonic Vishay Part Number SMD2500KJ435J NCP18WM474J ERTJ0EV474J 2322 615 1.474 Website www.betatherm.com www.murata .com www.panasonic.com www.vishay.com
SELECTABLE CHARGE CURRENT
In applications where the charge current needs to be selectable, use the circuit shown in Figure 24. This circuit allows a processor to determine if the charge current needs to be reduced due to an input source limitation or a different battery capacity option, or simply to reduce the stress on the pass transistor. R2 and Q2 allow the charge current to be selected between HIGH--750 mA, and LOW--250 mA.
Rev. 0 | Page 14 of 20
04873-0-025
ADP2291
VIN < 3.8V FROM ANYWHERE ASYNCHRONOUSLY POWER-DOWN VRS = 0mV CHG = OPEN
VIN > 3.8V
START VRS = 0mV CHG = OPEN
START SEQUENCE ENDS
PRECHARGE VRS = 15mV CHG = LOW
VBAT > 2.8V VBAT < 2.8V
FAST CHARGE VRS = 150mV CHG = LOW IPNP < C/10 AND VBAT > 4.1V
T = 30 MIN VADJ < 0.4V BATTERY FAULT VRS = 0mV CHG = OPEN
VBAT < 4.1V OR IPNP > C/10 END OF CHARGE VRS = 150mV CHG = OPEN T = 30 MIN
T = 3 HOUR
VADJ > 0.4V AND TEMP < 100C
VADJ < 0.4V
SHUTDOWN VRS = 0mV CHG = OPEN
VADJ < 0.4V
TIME OUT VRS = 0mV CHG = OPEN
VBAT < 4.1V
TEMP > 135C FROM ANYWHERE ASYNCHRONOUSLY
Figure 26. State Diagram for the ADP2291, CTIMER = 0.1F
Rev. 0 | Page 15 of 20
04873-0-026
ADP2291
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
Use the following general guidelines when designing printed circuit boards:
* * *
Keep the output capacitor as close to the BAT and GND pins as possible. Keep the input capacitor as close to the IN and GND pins as possible. PC board traces with larger cross-sectional areas remove more heat from the pass transistor. For optimum heat transfer, specify thick copper and use wide traces. Use additional copper layers or planes to reduce the thermal resistance. When connecting to other layers, use multiple vias if possible.
Note that the thermal pad is attached to the die substrate, so the thermal planes that the vias attach the package to must be electrically isolated or connected to GND.
*
The solder mask opening should be about 120 microns (4.7 mils) larger than the pad size, resulting in a minimum of 60 microns (2.4 mils) clearance between the pad and the solder mask. The paste mask opening is typically designed to match the pad size used on the peripheral pads of the LFCSP package. This should provide a reliable solder joint as long as the stencil thickness is about 0.125 mm. The paste mask for the thermal pad needs to be designed for the maximum coverage to effectively remove the heat from the package. However, due to the presence of thermal vias and the size of the thermal pad, eliminating voids may not be possible. The recommended paste mask stencil thickness is 0.125 mm. Use a laser cut stainless steel stencil with trapezoidal walls. Use a no clean, Type 3 solder paste for mounting the LFCSP package. A nitrogen purge during the reflow process is recommended. The package manufacturer recommends that the reflow temperature not exceed 220C and the time above liquidus is less than 75 seconds. Make sure the preheat ramp is 3C/second or lower. The actual temperature profile depends on the board's density and should be determined by the assembly house.
*
*
LFSCP LAYOUT CONSIDERATIONS
The CSP package has an exposed die paddle on the bottom that efficiently conducts heat to the PCB. In order to achieve the optimum performance from the CSP package, give special consideration to the layout of the PCB. Use the following layout guidelines for the CSP package:
* *
*
The pad pattern is shown in Figure 27. Follow the pad dimension closely for reliable solder joints while maintaining reasonable clearances to prevent solder bridging. The thermal pad of the CSP package provides a low thermal impedance path (approximately 20C/W) to the PCB. Therefore a properly designed PCB effectively conducts the heat away from the package. This is achieved by adding thermal vias to the PCB that provide a thermal path to the inner or bottom layers. Note that the via diameter is small to prevent the solder from flowing through the via and leaving voids in the thermal pad solder joint.
*
*
Rev. 0 | Page 16 of 20
ADP2291
2x VIAS, 0.250 35m PLATING 0.73 0.30 1.80 0.90 0.50 2.36
Table 7. Variables Description
Variable Name VX VRS VBAT, EOC IMAX
1.40 1.90 3.36
04873-0-027
IMAX0 C rate
Figure 27. 3 mm x 3 mm LFCSP Pad Pattern (Dimensions in mm)
Description The voltage on Pin X The regulation setpoint for the voltage across the sense resistor (RS) The battery voltage at the point charging current is 1/10 the current setpoint The charge current corresponding to VRS, including the effects of ADJ pin voltage The charge current corresponding to the VRS setpoint, ignoring ADJ effects (i.e. C0 = 150 mV/RS) The charge current (mA) expressed as a multiple of the nominal battery capacity (mAh). A 900 mAh capacity battery charged at a 1/10 C rate, is equivalent to a 90 mA charge current.
Rev. 0 | Page 17 of 20
ADP2291 OUTLINE DIMENSIONS
3.00 BSC SQ 0.45
8
0.60 MAX
0.50 0.40 0.30
PIN 1 INDICATOR
1
PIN 1 INDICATOR
TOP VIEW
2.75 BSC SQ 0.50 BSC
5
(BOTTOM VIEW)
EXPOSED PAD
1.50 REF
4
1.90 1.75 1.60
0.90 0.85 0.80
12 MAX
0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.30 0.23 0.18 0.20 REF
0.25 MIN
1.60 1.45 1.30
SEATING PLANE
Figure 28. 8-lead 3 x 3 LFCSP Package (CP-8) Dimensions Shown in Millimeters
3.00 BSC
8
5
3.00 BSC
4
4.90 BSC
PIN 1 0.65 BSC 1.10 MAX 8 0 0.80 0.60 0.40
0.15 0.00 0.38 0.22 COPLANARITY 0.10
0.23 0.08 SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 29. 8-Lead MSOP Package (RM-8) Dimensions Shown in Millimeters
ORDERING GUIDE
Models ADP2291ARMZ-R71 ADP2291ACPZ-R71 Temperature Range -40C to +85C -40C to +85C Package Description 8-Lead MSOP 8-Lead LFCSP Package Option RM-8 CP-8 Branding P08 P08
1
Z = Pb-free part.
Rev. 0 | Page 18 of 20
ADP2291 NOTES
Rev. 0 | Page 19 of 20
ADP2291 NOTES
(c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04873-0-10/04(0)
Rev. 0 | Page 20 of 20


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