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 19-2126; Rev 1; 10/01
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23
General Description
The MAX5712 is a small footprint, low-power, 12-bit digital-to-analog converter (DAC) that operates from a single +2.7V to +5.5V supply. The MAX5712 on-chip precision output amplifier provides Rail-to-Rail(R) output swing. Drawing only 85A supply current at +3V, the MAX5712 is ideally suited for portable battery-operated equipment. The MAX5712 utilizes a 3-wire serial-interface that is compatible with SPITM/QSPITM/MICROWIRETM and DSP-interface standards. All logic inputs are CMOS-logic compatible and buffered with Schmitt triggers to allow direct interfacing to optocouplers. The MAX5712 incorporates a power-on reset (POR) circuit that ensures the DAC begins in a zero-volt-state upon power-up. A power-down mode that reduces current consumption to 0.3A may be initiated through a software command. The MAX5712 is available in a small 6-pin SOT23 package. For dual and quad 12-bit versions, see the MAX5722 and MAX5742 data sheets. For single, dual, and quad 10-bit versions, see the MAX5711, MAX5721 and MAX5741 data sheets. The MAX5712 is specified over the automotive temperature range of -40C to +125C.
Features
o Wide -40C to +125C Operating Temperature Range o Low 85A Supply Current o Ultra Low 0.3A Power-Down Supply Current o Single +2.7V to +5.5V Supply Voltage o Fast 20MHz 3-Wire SPI/QSPI/MICROWIRE and DSP-Compatible Serial Interface o Schmitt-Triggered Inputs for Direct Interfacing to Optocouplers o Rail-to-Rail Output Buffer o Tiny 6-Pin SOT23 Package o Power-On Reset to 0V o Three Software-Selectable Power-Down Output Impedances (100k, 1k, Hi-Z)
MAX5712
Ordering Information
PART MAX5712EUT MAX5712AUT TEMP RANGE -40C to +85C -40C to +125C PINPACKAGE 6 SOT23 6 SOT23 TOP MARK ABCQ AAUD
Applications
Automatic Tuning Gain and Offset Adjustment Power Amplifier Control Process Control I/O Boards Battery-Powered Equipment VCO Control
Pin Configuration appears at end of data sheet. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor, Corp.
Functional Diagram
VDD GND REF+ REFDAC REGISTER 12-BIT DAC OUTPUT BUFFER 100k INPUT CONTROL LOGIC POWER-DOWN CONTROL LOGIC 1k
MAX5712 OUT
POWER-ON RESET CS SCLK DIN
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 MAX5712
ABSOLUTE MAXIMUM RATINGS
VDD to GND ..............................................................-0.3V to +6V OUT, SCLK, DIN, CS to GND ......................-0.3V to (VDD+ 0.3V) Maximum Current into Any Pin .........................................50mA Continuous Power Dissipation (TA = +70C) 6-Pin SOT23 (derate 9.1mW/C above +70C)...........727mW Operating Temperature Range .........................-40C to +125C Maximum Junction Temperature .....................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.5V, GND = 0, RL = 5k, CL = 200pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V. TA = +25C)
PARAMETER STATIC ACCURACY (NOTE 1) Resolution Differential Nonlinearity Error Integral Nonlinearity Error Zero-Code Error Zero-Code Error Tempco Gain Error Gain-Error Tempco DAC OUTPUT Output Voltage Range DC Output Impedance Short Circuit Current Wake-Up Time Output Leakage Current DIGITAL INPUTS (SCLK, DIN, CS) Input High Voltage Input Low Voltage Input Leakage Current Input Capacitance DYNAMIC PERFORMANCE Voltage-Output Slew Rate Voltage-Output Settling Time Digital Feedthrough Digital-Analog Glitch Impulse SR 400 hex to C00 hex (Note 4) Any digital inputs from 0 to VDD Major carry transition (code 7FF hex to code 800 hex) 0.5 4 0.2 12 10 V/s s nV-s nV-s VIH VIL IIN CIN VDD = +3V, +5V VDD = +3V, +5V Digital Inputs = 0 or VDD 0.1 5 0.7 x VDD 0.3 x VDD 1 V V A pF No-load (Note 3) Code = 800 hex VDD = +3V VDD = +5V VDD = +3V VDD = +5V Power-down mode = output high-impedance 0 0.8 15 48 8 8 18 33 VDD V mA s nA GE Code = FFF hex Integral 0.26 N DNL INL OE Guaranteed monotonic (Note 2) (Note 2) Code = 000 2 0.4 2.3 -3 12 1 16 1.5 Bits LSB LSB % of FS ppm/C % of FS ppm/C SYMBOL CONDITIONS MIN TYP MAX UNITS
2
_______________________________________________________________________________________
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.5V, GND = 0, RL = 5k, CL = 200pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V. TA = +25C)
PARAMETER POWER REQUIREMENTS Supply Voltage Range Supply Current with No-Load Power-Down Supply Current SCLK Clock Frequency SCLK Pulse Width High SCLK Pulse Width Low CS Fall-to-SLCK Rise Setup DIN Setup Time DIN Hold Time SCLK Falling Edge-to-CS Rising Edge CS Pulse Width High VDD IDD IDDPD fSCLK tCH tCL tCSS tDS tDH tCSH tCSW All digital inputs at 0 or VDD, VDD = +3.6V All digital inputs at 0 or VDD, VDD = +5.5V All digital inputs at 0 or VDD, VDD = +5.5V 0 20 20 15 15 0 10 80 2.7 85 105 0.29 5.5 150 187 1 V A A MHz ns ns ns ns ns ns ns SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5712
TIMING CHARACTERISTICS (FIGURE 2) (TIMING IS TESTED WITH NO-LOAD) 20
Note 1: Note 2: Note 3: Note 4:
DC Specifications are tested without output loads. Linearity guaranteed from code 115 to code 3981. Offset and gain error limit the FSR. Guaranteed by design.
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs. CODE, TA = +25C
MAX5712 toc01
DIFFERENTIAL NONLINEARITY vs. CODE, TA = +25C
MAX5712 toc02
TOTAL UNADJUSTED ERROR vs. CODE, TA = +25C
0.8 0.6 0.4 TUE (%) 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 VDD = +3V 0 512 1024 1536 2048 2560 3072 3584 4096 CODE VDD = +5V
MAX5712 toc03
16 12 8 4 INL (LSB) 0 -4 -8 -12 -16 0 VDD = +3V VDD = +5V
1.0 0.8 0.6 0.4 DNL (LSB) 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0
1.0
512 1024 1536 2048 2560 3072 3584 4096 CODE
0
512 1024 1536 2048 2560 3072 3584 4096 CODE
_______________________________________________________________________________________
3
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 MAX5712
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs. CODE, TA = -40C
MAX5712 toc04
DIFFERENTIAL NONLINEARITY vs. CODE, TA = -40C
MAX5712 toc05
TOTAL UNADJUSTED ERROR vs. CODE, TA = -40C
0.8 0.6 0.4 TUE (%) 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 VDD = +3V 0 512 1024 1536 2048 2560 3072 3584 4096 CODE VDD = +5V
MAX5712 toc06
16 12 8 4 INL (LSB) 0 -4 -8 -12 -16 0 VDD = +3V VDD = +5V
1.0 0.8 0.6 0.4 DNL (LSB) 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0
1.0
512 1024 1536 2048 2560 3072 3584 4096 CODE
0
512 1024 1536 2048 2560 3072 3584 4096 CODE
INTEGRAL NONLINEARITY vs. CODE, TA = +125C
MAX5712 toc07
DIFFERENTIAL NONLINEARITY vs. CODE, TA = +125C
MAX5712 toc08
TOTAL UNADJUSTED ERROR vs. CODE, TA = +125C
0.8 0.6 0.4 TUE (%) 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 VDD = +3V 0 512 1024 1536 2048 2560 3072 3584 4096 CODE VDD = +5V
MAX5712 toc09
16 12 8 INL (LSB) 4 0 -4 -8 -12 -16 0 VDD = +3V VDD = +5V
1.0 0.8 0.6 0.4 DNL (LSB) 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0
1.0
512 1024 1536 2048 2560 3072 3584 4096 CODE
0
512 1024 1536 2048 2560 3072 3584 4096 CODE
WORST CASE INL AND DNL vs. TEMPERATURE
MAX5712 toc10
SOURCE-AND-SINK CURRENT CAPABILITY (VDD = +3V)
MAX5712 toc11
SOURCE-AND-SINK CURRENT CAPABILITY (VDD = +5V)
4.5 4.0 3.5 VOUT (V) 3.0 2.5 2.0 1.5 1.0 CODE = FFF HEX, SOURCING CURRENT FROM OUT
MAX5712 toc12
16 12 8 INL/DNL (LSB) 4 MAXIMUM DNL 0 -4 MINIMUM DNL -8 -12 -16 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) MINIMUM INL MAXIMUM INL
3.0 2.5 2.0 VOUT (V) 1.5 1.0 0.5 0.0 0 2 4 6 8 CODE = C00 HEX, SOURCING CURRENT FROM OUT
5.0
CODE = FFF HEX, SOURCING CURRENT FROM OUT
CODE = 400 HEX, SINKING CURRENT INTO OUT
CODE = C00 HEX, SOURCING CURRENT FROM OUT CODE = 400 HEX, SINKING CURRENT INTO OUT CODE = 000 HEX, SINKING CURRENT INTO OUT 0 5 10 15 20 25 30 35 40
CODE = 000 HEX, SINKING CURRENT INTO OUT 10 12 14 16
0.5 0.0
ISOURCE/SINK (mA)
ISOURCE/SINK (mA)
4
_______________________________________________________________________________________
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5712 toc13
MAX5712
POWER-DOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5712 toc14
SUPPLY CURRENT vs. CS INPUT VOLTAGE
800 SUPPLY CURRENT (A) 700 600 500 400 300 200 VDD = +3V VDD = +5V
MAX5712 toc15
120 CODE = FFF HEX 100 SUPPLY CURRENT (A) 80 CODE = 000 60 40 20 0 2.7 3.2 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V)
300 POWER-DOWN SUPPLY CURRENT (nA) 250 200 150 100 50
900
100 0 2.7 3.2 3.7 4.2 4.7 SUPPLY VOLTAGE (V) 5.2 0 0 1 2 3 4 5 CS INPUT VOLTAGE (V)
FULL-SCALE SETTLING TIME (VDD = +5V)
MAX5712 toc16
FULL-SCALE SETTLING TIME (VDD = +5V)
VSCLK 5V/div
MAX5712 toc17
HALF-SCALE SETTLING TIME (VDD = +3V)
VSCLK 5V/div
MAX5712 toc18
VSCLK 5V/div
VOUT 1V/div VOUT 1V/div CODE 000 TO FFF HEX RL = 5k CL = 200pF 1s/div CODE 400 HEX TO C00 HEX RL = 5k CL = 200pF 1s/div
VOUT 1V/div
CODE FFF HEX TO 000 RL = 5k CL = 200pF 2s/div
HALF-SCALE SETTLING TIME (VDD = +3V)
MAX5712 toc19
EXITING POWER-DOWN (VDD = +5V)
VSCLK 5V/div
DIGITAL-TO-ANALOG GLITCH IMPULSE (VDD = +5V)
MAX5712 toc20
MAX5712 toc21
VSCLK 5V/div
CODE 800 HEX VOUT 1V/div CODE C00 HEX TO 400 HEX RL = 5k CL = 200pF 1s/div 5s/div
VOUT 10mV/div VOUT CODE 800 HEX TO 7FF HEX RL = 5k CL = 200pF 500ns/div
1V/div RL = 5k CL = 200pF
_______________________________________________________________________________________
5
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 MAX5712
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
DIGITAL-TO-ANALOG GLITCH IMPULSE (VDD = +5V)
MAX5712 toc22
CLOCK FEEDTHROUGH (VDD = +5V)
MAX5712 toc23
VSCLK 2V/div
VOUT 10mV/div CODE 7FF HEX TO 800 HEX RL = 5k CL = 200pF 500ns/div 500ns/div VOUT 1mV/div RL = 5k CL = 200pF
Pin Description
PIN 1 2 3 4 5 6 NAME VDD GND DIN SCLK CS OUT Power-Supply Input Ground Serial-Data Input Serial-Clock Input Active Low Chip-Select Input DAC Output Voltage FUNCTION
6
_______________________________________________________________________________________
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23
Detailed Description
The MAX5712 voltage output, 12-bit DAC, offers a full 12-bit performance in a small 6-pin SOT23 package. The SOT23 footprint is less than 9mm2. The MAX5712 has less than 1LSB differential nonlinearity error, ensuring monotonic performance. The device uses a simple 3-wire, SPI/QSPI/MICROWIRE and DSP-compatible serial interface that operates up to 20MHz. The MAX5712 incorporates three shutdown modes, making it ideal for low-power. down and upon wake-up, the DAC output is restored to its pre-power-down voltage. Power-On Reset The MAX5712 has a POR circuit to set the DACs output to zero when VDD is first applied. This ensures that unwanted DAC output voltages will not occur immediately following a system start-up, such as after a loss of power. Upon initial power-up, an internal power-onreset circuit ensures that all DAC registers are cleared, the DAC is powered-down, and its output is terminated to GND by a 100k resistor. An 8s recovery time after issuing a wake-up command is needed before writing to the DAC registers.
MAX5712
Analog Section
The MAX5712 consists of a resistor string, an output buffer, and a POR circuit. Monotonic digital to analog conversion is achieved using a resistor string architecture. Since VDD is the reference for the MAX5712, the accuracy of the DAC depends on the accuracy of VDD. The low bias current of the MAX5712 allows its power to be supplied by a voltage reference such as the MAX6030. The 12-bit DAC code is binary-unipolar with 1LSB = VDD/4096. Output Buffer The DAC output buffer has a rail-to-rail output and is capable of driving a 5k resistive load in parallel with a 200pF capacitive load. With a capacitive load of 200pF, the output buffer slews 0.5V/s. With a 1/4FS to 3/4FS output transition, the amplifier output settles to 1/2LSB in less than 10s when loaded with 5k in parallel with 200pF. The buffer amplifier is stable with any combination of resistive loads greater than 5k and capacitive loads less than 200pF. Program the input register bits to power-down the device. The DAC registers are preserved during power-
Digital Section
3-Wire Serial Interface
The MAX5712 digital interface is a standard 3-wire connection compatible with SPI/QSPI/MICROWIRE/DSP interfaces. The chip-select input (CS) frames the serial data loading at DIN. Immediately following CS high-tolow transition, the data is shifted synchronously and latched into the input register on the falling edge of the serial clock input (SCLK). After 16 bits have been loaded into the serial input register, it transfers its contents to the DAC latch. CS may then either be held low or brought high. CS must be brought high for a minimum of 80ns before the next write sequence, since a write sequence is initiated on a falling edge of CS. Not keeping CS low during the first 15 SCLK cycles discards input data. The serial clock (SCLK) can idle either high or low between transitions. Figure 1 shows the complete 3-wire serial interface transmission. Table 1 lists serial-interface mapping.
tCH
tCL tCSW tCSS tDH tDS tCSH
C3
SO
Figure 1. Timing Diagram
_______________________________________________________________________________________
7
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 MAX5712
Table 1. Serial Interface Mapping
16-BIT SERIAL WORD MSB C3 0 1 1 1 1 C2 0 1 1 1 1 C1 0 1 1 1 1 C0 0 1 1 1 1 X X X X X X X X X X X X X X X X LSB D11 D10 D09 D08 D07 D06 D05 D04 D03 D02 D01 D00 12-Bit DAC Code X X X X X X X X X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 Set and update DAC Wake-Up Power-Down Power-Down Power-Down VOUT = VDD x CODE/4096 Current DAC setting (initially 0) Floating 1k to GND 100k to GND MODE OUTPUT
Shutdown Modes
The MAX5712 includes three software-controlled shutdown modes that reduce the supply current to below 1A. In two of the three shutdown modes, OUT is connected to GND through a resistor. Table 1 lists the three shutdown modes of operation.
Digital Inputs and Interface Logic
The 3-wire digital interface for the MAX5712 is compatible with SPI, QSPI, MICROWIRE, and DSP. The three digital inputs (CS, DIN, and SCLK) load the digital input serially into the DAC. All of the digital inputs include Schmitt-trigger buffers to accept slow-transition interfaces. This allows optocouplers to interface directly to the MAX5712 without additional external logic. The digital inputs are compatible with CMOS-logic levels.
Applications Information
Device Powered by an External Reference
The MAX5712 generates an output voltage proportional to VDD, coupling power supply noise to the output. The circuit in Figure 2 rejects this power-supply noise by powering the device directly with a precision voltage reference, improving overall system accuracy. The MAX6030 (+3V, 75ppm) or the MAX6050 (+5V, 75ppm) precision voltage references are ideal choices due to the low-power requirements of the MAX5712. This solution is also useful when the required full-scale output voltage is less than the available supply voltages.
Power-Supply Bypassing and Layout
Careful PC board layout is important for optimal system performance. Keep analog and digital signals separate to reduce noise injection and digital feedthrough. Use a ground plane to ensure that the ground return from GND to the supply ground is short and low impedance. Bypass VDD with a 0.1F capacitor to ground as close as possible to the device.
Pin Configuration
TOP VIEW
VDD 1 6 OUT
IN
OUT VDD MAX6050 MAX6030 MAX5712 GND GND OUT
GND 2
MAX5712
5
CS
DIN 3
4
SCLK
SOT23
Chip Information
Figure 2. MAX5712 Powered By Reference
TRANSISTOR COUNT: 3856 PROCESS: BiCMOS
8
_______________________________________________________________________________________
12-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23
Package Information
6LSOT.EPS
MAX5712
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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