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LTC3035 300mA VLDO Linear Regulator with Charge Pump Bias Generator
FEATURES

DESCRIPTIO
Wide Input Voltage Range: 1.7V to 5.5V Wide Adjustable Output Voltage Range: 0.4V to 3.6V Built-In Charge Pump Generates High Side Bias Very Low Dropout: 45mV at 300mA 2% Voltage Accuracy Over Temperature, Supply, Load Fast Transient Recovery Low Operating Current: IIN = 100A Typ Low Shutdown Current: IIN = 1A Typ Stable with Ceramic Capacitor Down to 1F Output Current Limit Thermal Overload Protected Reverse Output Current Protected Available in 8-Lead (3mm x 2mm) DFN Package
APPLICATIO S

The LTC(R)3035 is a micropower, VLDOTM (very low dropout) linear regulator which operates from input voltages as low as 1.7V. The device is capable of supplying 300mA of output current with a typical dropout voltage of only 45mV. To allow operation at low input voltages the LTC3035 includes a charge pump generator that provides the necessary bias voltage for the internal LDO circuitry. Output current comes directly from the input supply for high efficiency regulation. The charge pump bias generator requires only a 0.1F flying capacitor and a 1F bypass capacitor for operation. The low 0.4V internal reference voltage allows the LTC3035 to be programmed to much lower output voltages than commonly available in LDOs. The output voltage is programmed via two tiny SMD resistors. The LTC3035's low quiescent current makes it an ideal choice for use in battery-powered systems. Other features include high output voltage accuracy, excellent transient response, stability with ultralow ESR ceramic capacitors as small as 1F, short-circuit and thermal overload protection, output current limiting and reverse output current protection. The LTC3035 is available in a tiny, low profile (3mm x 2mm x 0.75mm) 8-lead DFN package.
, LTC and LT are registered trademarks of Linear Technology Corporation. VLDO is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6411531, others pending.
Li-Ion to 3.3V Low Dropout Supplies 2 x AA to 1.8V Low Dropout Supplies Low Power Handheld Devices Low Voltage Logic Supplies DSP Power Supplies Cellular Phones Portable Electronic Equipment Handheld Medical Instruments Post Regulator for Switching Supply Noise Rejection
TYPICAL APPLICATIO
0.1F
Dropout Voltage vs Load Current
70 60
DROPOUT VOLTAGE (mV)
3.3V Output Voltage from Li-Ion Battery
TA = 25C
50 40 30 20 10 0 0 50 100 200 150 IOUT (mA) 250 300
3035 TA01b
CP IN Li-Ion BATTERY 3.4V TO 4.2V 1F 0.4V
CM BIAS CBIAS 1F OUT VOUT 3.3V COUT 300mA 1F
BIAS GENERATOR
+ -
LTC3035
ADJ
294k 40.2k
3035 TA01a
OFF ON
SHDN
GND
U
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LTC3035
ABSOLUTE
(Notes 1, 2)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW CP 1 CM 2 GND 3 IN 4 9 8 7 6 5 BIAS SHDN ADJ OUT
VIN to GND .................................................. - 0.3V to 6V SHDN to GND ............................................. - 0.3V to 6V CP, CM, BIAS to GND ................................. - 0.3V to 6V ADJ to GND ................................................ - 0.3V to 6V VOUT to GND ............................................... - 0.3V to 6V Operating Junction Temperature (Note 3) ........................................... - 40C to 125C Storage Temperature Range ................ - 65C to 125C Output Short Circuit Duration .......................... Indefinite
DDB PACKAGE 8-LEAD (3mm x 2mm) PLASTIC DFN TJMAX = 125C, JA = 76C/W EXPOSED PAD (PIN 9) IS GND,MUST BE SOLDERED TO PCB
ORDER PART NUMBER LTC3035EDDB
DDB PART MARKING LBRM
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PARAMETER VIN Operating Voltage (Note 4) VBIAS Output Voltage Range VOUT Output Voltage Range VIN Operating Current VIN Shutdown Current VADJ Regulation Voltage (Note 5) IADJ ADJ Input Current OUT Load Regulation (Referred to ADJ Pin) Dropout Voltage (Note 6) IOUT Continuous Output Current IOUT Short Circuit Output Current VOUT Output Noise Voltage VIH SHDN Input High Voltage VIL SHDN Input Low Voltage IIH SHDN Input High Current IIL SHDN Input Low Current
The denotes specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25C. VIN = 3.6V, VOUT = 3.3V, CFLY = 0.1F, COUT = 1F, CIN = 1F, CBIAS = 1F (all capacitors ceramic) unless otherwise noted.
CONDITIONS
2.63V < VIN < 5.5V 1.7V < VIN < 2.63V IOUT = 10A VSHDN = 0V 1mA < IOUT < 300mA, 1.7V < VIN < 5.5V, VOUT = 1.5V VADJ = 0.4V IOUT = 1mA to 300mA VIN = 1.7V, VADJ = 0.37V, IOUT = 300mA VADJ = VOUT = 0 F = 10Hz to 100kHz, IOUT = 150mA

MIN 1.7 4.8 1.85 * VIN VADJ
TYP 5 1.90 * VIN 100 1 0.4 0 -0.2 45 760 150
0.392 -50
MAX 5.5 5.3 1.95 * VIN 3.6 200 5 0.408 50 100
UNITS V V V V A A V nA mV mV mA mA Vrms V V A A
300

1.1 -1 -1 0.3 1 1
SHDN = VIN SHDN = 0V
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
Note 3: The LTC3035 regulator is tested and specified under pulse load conditions such that TJ TA. The LTC3035 is 100% production tested at 25C. Performance at -40C and 125C is assured by design, characterization and correlation with statistical process control. Note 4: Min Operating Input Voltage required for regulation is: VIN > VOUT + VDROPOUT and VIN > 1.7V
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LTC3035
ELECTRICAL CHARACTERISTICS
Note 5: Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. Note 6: Dropout voltage is minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to VIN - VDROPOUT.
TYPICAL PERFOR A CE CHARACTERISTICS
Dropout Voltage vs Load Current
70 60
DROPOUT VOLTAGE (mV)
5.0 4.5 4.0
50 TA = 125C
IIN (A)
TA = 25C 30 20 TA = -40C 10 0 0 50 100 200 150 IOUT (mA) 250 300
3035 G01
2.5 2.0 1.5 1.0 0.5 0 0 1 TA = -40C 2 3 VIN (V) 4 5 6 TA = 85C TA = 25C
IIN (A)
40
VIN No Load Operating Current
120 110 100 VOUT = 1.5V TA = 125C ADJUST VOLTAGE (mV) TA = 85C 404 403 402 401 400 399 398 397 0 1 2 3 VIN (V) 4 5 6
3035 G04
ADJ VOLTAGE (mV)
IIN (A)
90 80 70 60
TA = 25C TA = -40C
UW
VIN Shutdown Current
115 110 105
VIN No Load Operating Current
VOUT = 3.3V TA = 125C TA = 85C 100 95 90 TA = -40C 85 80 3 3.5 4 4.5 VIN (V) 5 5.5 6
3035 G03
3.5 3.0
TA = 25C
LT1108 * TPC12
ADJ Voltage vs Temperature
VOUT = 3.3V
ADJ Voltage vs Input Voltage
404 403 402 401 400 399 398 397 VOUT = 1.5V
396 -45 -25 -5
15 35 55 75 TEMPERATURE (C)
95 115
3035 G05
396 0 1 2 3 VIN (V) 4 5 6
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LTC3035 TYPICAL PERFOR A CE CHARACTERISTICS
BIAS Voltage vs Input Voltage
6 5
1000 900
SHDN THRESHOLD (mV)
SHDN THRESHOLD (mV)
BIAS VOLTAGE (V)
4 3 2 1 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VIN (V)
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Current Limit vs Input Voltage
900 800 700
CURRENT LIMIT (mA) REJECTION (dB)
VOUT = 0V
600 500 400 300 200 100 0 1.5 2 2.5 3 3.5 VIN (V)
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Transient Response
VOUT 20mV/DIV AC
IOUT
300mA 10mA VIN = 3.6V VOUT = 3.3V COUT = 1F 200s/DIV
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4
UW
SHDN Threshold (Rising) vs Temperature
1000 900
VIN = 5.5V 800 VIN = 3.6V 700 VIN = 1.7V 600 500 400 -45
SHDN Threshold (Falling) vs Temperature
VIN = 5.5V 800 VIN = 3.6V 700 600 500 400 -45 VIN = 1.7V
-20
55 30 5 80 TEMPERATURE (C)
105
130
-20
55 30 5 80 TEMPERATURE (C)
105
130
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VIN Ripple Rejection vs Frequency
70 60 50 40 30 20 10 VIN = 3.6V VOUT = 3.3V IOUT = 100mA 1k 10k 100k 1M 10M
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COUT = 10F
COUT = 1F
4
4.5
5
5.5
0 100
FREQUENCY (Hz)
BIAS Output Ripple
VBIAS 50mV/DIV AC VOUT 5mV/DIV AC
VIN = 3.6V VOUT = 3.3V CBST = 1F CFLY = 0.1F COUT = 1F IOUT = 1mA
500s/DIV
3035 G12
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LTC3035
PI FU CTIO S
CP (Pin 1): Flying Capacitor Positive Terminal. CM (Pin 2): Flying Capacitor Negative Terminal. GND (Pin 3): Ground. Connect to a ground plane. IN (Pin 4): Input Supply Voltage. The output load current is supplied directly from IN. The IN pin should be locally bypassed to ground if the LTC3035 is more than a few inches away from another source of bulk capacitance. In general, the output impedance of a battery rises with frequency, so it is usually adviseable to include an input bypass capacitor when supplying IN from a battery. A capacitor of 1F is usually sufficient. OUT (Pin 5): Regulated Output Voltage. The OUT pin supplies power to the load. A minimum ceramic output capacitor of at least 1F is required to ensure stability. Larger output capacitors may be required for applications with large transient loads to limit peak voltage transients. See the Applications Information section for more information on output capacitance. ADJ (Pin 6): Adjust Input Pin. This is the input to the error amplifier. The ADJ pin reference voltage is 0.4V referenced to ground. The output voltage range is 0.4V to 3.6V and is set by connecting ADJ to a resistor divider from OUT to GND. SHDN (Pin 7): Shutdown Input, Active Low. This pin is used to put the LTC3035 into shutdown. The SHDN pin current is typically less than 10nA. The SHDN pin cannot be left floating and must be tied to a valid logic level if not used. BIAS (Pin 8): BIAS Output Voltage Pin. BIAS is the output of the charge pump and provides the high side supply for the LTC3035 LDO circuitry. This pin should be locally bypassed to ground by a 1F or greater capacitor as close as possible to the pin. Nothing else should be connected to this pin. Exposed Pad (Pin 9): Ground and Heat Sink. Must be soldered to PCB ground plane or large pad for optimal thermal performance.
BLOCK DIAGRA
8 BIAS
1.9 * VIN VIN
VMIN
4
7
SHDN
0.400V
BIAS UVLO GND PINS 3, 9 ADJ
+
SHDN
REFERENCE
-
+
5V
-
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EN
800kHz OSCILLATOR CHARGE PUMP CP
1
CM
2
SOFT-START
BIAS
OUT 2.5k
5
6
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LTC3035
APPLICATIO S I FOR ATIO
The LTC3035 is a VLDO (very low dropout) linear regulator which operates from input voltages between 1.7V and 5.5V. The LDO uses an internal NMOS transistor as the pass device in a source-follower configuration. The internal charge pump generator provides the high supply necessary for the LDO circuitry while the output current comes directly from the IN input for high efficiency regulation. Charge Pump Operation The LTC3035 contains a charge pump to produce the necessary bias voltage supply for the LDO. The charge pump utilizes Burst Mode operation to achieve high efficiency for the relatively low current levels needed for the LDO circuitry. The charge pump requires only a small 0.1F flying capacitor between the CP and CM pins and a 1F bypass capacitor at BIAS. An internal oscillator centered at 800kHz controls the two-phase switching cycle of the charge pump. During the first phase a current source charges the flying capacitor between VIN and GND. During the second phase, the capacitor's positive terminal connects to BIAS and the current source drives the capacitor's minus terminal, delivering charge to the BIAS bypass capacitor and increasing its voltage. A burst comparator with hysteresis monitors the voltage on the BIAS pin. When BIAS is above the upper threshold of the comparator, the oscillator is disabled and no switching occurs. When BIAS falls below the comparator's lower threshold, the oscillator is enabled and the BIAS pin gets charged. The thresholds of the burst comparator are dynamically adjusted to maintain a DC level shown by Figure 1. BIAS regulates to 1.9 * VIN or 5V, whichever voltage is lower. The voltage ripple at BIAS is controlled to approximately 1% of its DC value. LDO Operation An undervoltage lockout comparator (UVLO) senses the BIAS voltage to ensure that the BIAS supply for the LDO is greater than 90% of its regulation value before enabling the LDO. Once the LDO gets enabled, the UVLO threshold switches to 50% of its regulation value. Thus the BIAS voltage must fall below 50% of its regulation voltage
BIAS (V)
6
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(Refer to Block Diagram)
5 1.9 * VIN 3.23
1.7
2.63 VIN (V)
5.5
3035 F01
Figure 1. LTC3035 BIAS Voltage vs VIN Voltage
before the LDO disables. When the LDO is disabled, OUT is pulled to GND through the external divider and an internal 2.5k resistor. The LDO provides a high accuracy output capable of supplying 300mA of output current with a typical dropout voltage of only 45mV. A single ceramic capacitor as small as 1F is all that is required for output bypassing. The low reference voltage allows the LTC3035 output to be programmed from 0.4V to 3.6V. As shown in the Block Diagram, the charge pump output at BIAS supplies the LDO circuitry while the output current comes directly from the IN input for high efficiency regulation. The low quiescent supply current, IIN = 100A, drops to IIN = 1A typical in shutdown making the LTC3035 an ideal choice for use in battery-powered systems. The device also includes current limit, thermal overload protection, and reverse output current protection. The fast transient response of the follower output stage overcomes the traditional tradeoff between dropout voltage, quiescent current and load transient response inherent in most LDO regulator architectures. The LTC3035 also includes overshoot detection circuitry which brings the output back into regulation when going from heavy to light output loads (see Figure 2). The LTC3035 also includes a soft-start feature to prevent excessive current flow during start-up. After the BIAS voltage reaches regulation, the soft-start circuitry gradually increases the LDO reference voltage from 0V to 0.4V over a period of about 600s. There is a short 700s delay from the time BIAS reaches regulation until the LDO output starts to rise (see Figure 3).
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LTC3035
APPLICATIO S I FOR ATIO
VOUT 20mV/DIV AC
300mA IOUT 0mA VIN = 3.6V VOUT = 3.3V COUT = 1F 200s/DIV
3035 F02
Figure 2. Output Step Response
ON SHDN OFF VBIAS 2V/DIV 0V VOUT 2V/DIV 0V VIN = 3.6V VOUT = 3.3V COUT = 1F CBIAS = 1F 500s/DIV
3035 F03
Figure 3. Bias and Output Start-Up Waveforms
Adjustable Output Voltage The output voltage is set by the ratio of two external resistors as shown in Figure 4. The device servos the output to maintain the ADJ pin voltage at 0.4V (referenced to ground). Thus the current in R1 is equal to 0.4V/R1. For good transient response, stability and accuracy the current in R1 should be at least 8A, thus the value of R1 should be no greater than 50k. The current in R2 is the current in R1 plus the ADJ pin bias current. Since the ADJ pin bias current is typically <10nA it can be ignored in the output voltage calculation. The output voltage can be calculated using the formula in Figure 4. Note that in shutdown the output is turned off and the divider current will be zero once COUT is discharged. The LTC3035 operates at a relatively high gain of -0.7V/mA referred to the ADJ input. Thus a load
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VOUT R2 ADJ R1 GND
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R2 VOUT = 0.4V 1 + R1
()
COUT
Figure 4. Programming the LTC3035
current change of 1mA to 300mA produces a - 0.2mV drop at the ADJ input. To calculate the change refered to the output simply multiply by the gain of the feedback network (i.e., 1 + R2/R1). For example, to program the output for 3.3V choose R2/R1 = 7.25. In this example an output current change of 1mA to 300mA produces -0.2mV * (1 + 7.25) = 1.65mV drop at the output. Output Capacitance and Transient Response The LTC3035 is designed to be stable with a wide range of ceramic output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. An output capacitor of 1F or greater with an ESR of 0.05 or less is recommended to ensure stability. The LTC3035 is a micropower device and output transient response will be a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Note that bypass capacitors used to decouple individual components powered by the LTC3035 will increase the effective output capacitor value. High ESR tantalum and electrolytic capacitors may be used, but a low ESR ceramic capacitor must be in parallel at the output. There is no minimum ESR or maximum capacitor size requirements. Extra consideration must be given to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitances in a small package, but exhibit strong voltage and temperature coefficients as shown in Figures 5 and 6. When used with a 3.3V regulator, a 1F Y5V capacitor can lose as much as 80% of its rated capacitance over the operating
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LTC3035
APPLICATIO S I FOR ATIO
20 0 CHANGE IN VALUE (%) -20 Y5V -40 -60 -80 -100 X5R BOTH CAPACITORS ARE 1F, 6.3V, 0402 CASE SIZE
0
1
4 5 3 2 DC BIAS VOLTAGE (V)
6
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Figure 5. Ceramic Capacitor DC Bias Characteristics
20 0
CHANGE IN VALUE (%)
X5R -20 Y5V -40 -60 -80
BOTH CAPACITORS ARE 1F, 6.3V, 0402 CASE SIZE -100 0 25 50 -50 -25 TEMPERATURE (C)
75
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Figure 6. Ceramic Capacitor Temperature Characteristics
temperature range. The X5R only loses about 40% of its rated capacitance over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature and bias voltage, while the X5R is less expensive and is available in higher values. In all cases, the output capacitance should never drop below 0.4F, or instability or degraded performance may occur. Charge Pump Component Selection The flying capacitor controls the strength of the charge pump. In order for the charge pump to deliver its maximum
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available current, a 0.1F or greater ceramic capacitor should be used. Warning: A polarized capacitor such as tantalum or aluminum should never be used for the flying capacitor since its voltage can reverse upon start-up of the LTC3035. Low ESR ceramic capacitors should always be used for the flying capacitor. A 1F or greater low ESR (<0.1) ceramic capacitor is recommended to bypass the BIAS pin. Larger values of capacitance will not reduce the size of the BIAS ripple much, but will decrease the ripple frequency proportionally. The BIAS pin should maintain 0.4F of capacitance at all times to ensure correct operation. High ESR tantalum and electrolytic capacitors may be used, but a low ESR ceramic must be used in parallel for correct operation. It is also recommended that IN be bypassed to ground with a 1F or greater ceramic capacitor. Thermal Considerations The power handling capability of the device will be limited by the maximum rated junction temperature (125C). The power dissipated by the device will be the output current multiplied by the input/output voltage differential: (IOUT)(VIN - VOUT) The LTC3035 has internal thermal limiting designed to protect the device during momentary overload conditions. For continuous normal conditions, the maximum junction temperature rating of 125C must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. For surface mount devices, heat sinking is accomplished by using the heat-spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through holes can also be used to spread the heat generated by power devices. A junction to ambient thermal coefficient of 76C/W is achieved by connecting the Exposed Pad of the DFN package directly to a ground plane of about 2500mm2.
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LTC3035 OPERATIO
Calculating Junction Temperature Example: Given an output voltage of 1.5V, an input voltage of 1.8V to 3V, an output current range of 0mA to 100mA and a maximum ambient temperature of 50C, what will the maximum junction temperature be? The power dissipated by the device will be approximately: IOUT(MAX)(VIN(MAX) - VOUT) where: IOUT(MAX) = 100mA VIN(MAX) = 3V so: P = 100mA(3V - 1.5V) = 0.15W Even under worst-case conditions LTC3035's BIAS pin power dissipation is only about 1mW, thus can be ignored. The junction to ambient thermal resistance will be on the order of 76C/W. The junction temperature rise above ambient will be approximately equal to: 0.15W(76C/W) = 11.4C The maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: T = 50C + 11.4C = 61.4C Short-Circuit/Thermal Protection The LTC3035 has built-in output short-circuit current limiting as well as over temperature protection. During short-circuit conditions, internal circuitry automatically limits the output current to approximately 760mA. At higher temperatures, or in cases where internal power dissipation causes excessive self heating on chip, the thermal shutdown circuitry will shut down the charge pump and LDO when the junction temperature exceeds approximately 155C. It will reenable the converter and LDO once the junction temperature drops back to approximately 140C. The LTC3035 will cycle in and out of thermal shutdown without latch-up or damage until the
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overstress condition is removed. Long term overstress (TJ>125C) should be avoided as it can degrade the performance or shorten the life of the part. Layout Considerations Connection from the BIAS and OUT pins to their respective ceramic bypass capacitor should be kept as short as possible. The ground side of the bypass capacitors should be connected directly to the ground plane for best results or through short traces back to the GND pin of the part. Long traces will increase the effective series ESR and inductance of the capacitor which can degrade performance. The CP and CM pins of the charge pump are switching nodes. The transition edge rates of these pins can be quite fast (~10ns). Thus care must be taken to make sure these nodes do not couple capacitively to other nodes (especially the ADJ pin). Place the flying capacitor as close as possible to the CP and CM pins for optimum charge pump performance. Because the ADJ pin is relatively high impedance (depending on the resistor divider used), stray capacitance at this pin should be minimized (<10pF) to prevent phase shift in the error amplifier loop. Additional special attention should be given to any stray capacitances that can couple external signals onto the ADJ pin producing undesirable output ripple. For optimum performance connect the ADJ pin to R1 and R2 with a short PCB trace and minimize all other stray capacitance to the ADJ pin. Figure 7 shows an example layout for the LTC3035.
CBIAS 1 CP CF 2 CM 3 GND 4 IN CIN SHDN 7 ADJ 6 OUT 5 COUT
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BIAS 8 R1 R2
VIA CONNECTION TO GND PLANE
Figure 7. Suggested Layout
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LTC3035
TYPICAL APPLICATIO
L1 10H
S S S
3 VIN = 2.7V TO 4.2V
S
SW1 LTC3440 VIN SHDN/SS MODE/SYNC RT
7 8
Li-Ion
+
C1 10F
*
2 1 RT 60.4k
S
S
OFF ON
S
Efficiency vs Output Current
100 90 80 VIN = 2.7V Burst Mode(R) OPERATION
LTC3440 OUTPUT AC 20mV/DIV
EFFICIENCY (%)
70 60 50 40 30 20 10 0 0.1
VIN = 4.2V VIN = 3.6V
LTC3035 OUTPUT AC 20mV/DIV IOUT = 25mA 20s/DIV
3035 TA02c
10 1 100 OUTPUT CURRENT (mA)
Burst Mode IS A REGISTERED TRADEMARK OF LINEAR TECHNOLOGY CORPORATION
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Low Noise Li-Ion to 3.3V Supply
0.1F 3.4V 600mA 4 6 9 C5 1.5nF VC GND 10 5 R3 15k R2 200k
S S S S
CP IN LTC3035 SHDN
CM BIAS
CBIAS 1F
SW2 VOUT FB
CIN 1F R1 357k GND
S
OUT
S
S
294k ADJ
S
VOUT = 3.3V 300mA I COUT OUT 1F
40.2k C2 22F
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*1 = Burst Mode OPERATION 0 = FIXED FREQUENCY C1: TAIYO YUDEN JMK212BJ106MG C2: TAIYO YUDEN JMK325BJ226MM CIN, CBIAS, COUT: TDK C1005X5R0J105K L1: SUMIDA CDRH6D38-100
Ripple Rejection
1000
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LTC3035
PACKAGE DESCRIPTIO U
DDB Package 8-Lead Plastic DFN (3mm x 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
0.61 0.05 (2 SIDES) 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.20 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5 0.40 0.10 8 3.00 0.10 (2 SIDES) R = 0.05 TYP 2.00 0.10 (2 SIDES) 0.56 0.05 (2 SIDES) 0.75 0.05 4 0.25 0.05 2.15 0.05 (2 SIDES) BOTTOM VIEW--EXPOSED PAD 1 0.50 BSC PIN 1 R = 0.20 OR 0.25 x 45 CHAMFER
(DDB8) DFN 0905 REV B
PIN 1 BAR TOP MARK (SEE NOTE 6)
0.200 REF
0 - 0.05
NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC3035
TYPICAL APPLICATIO S
Dual LDO Output (1.8V, 1.5V) from 2.5V Supply Rail
VIN 2.5V 0.1F
1F
CP CM IN BIAS LTC3035 SHDN OUT GND ADJ
OFF ON
VIN 1.8V
1F
CP CM IN BIAS LTC3035 SHDN OUT GND ADJ
OFF ON
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ThinSOT is a trademark of Linear Technology Corporation.
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
U
1F
0.1F BIAS LTC3025 SHDN OUT IN VOUT = 1.8V IOUT < 300mA 1F
0.1F
140k 40.2k
110k GND ADJ 40.2k
VOUT = 1.5V IOUT < 300mA 1F
3035 TA03
Dual LDO Output (1.5V, 1.2V) from 1.8V Supply Rail
0.1F
1F
0.1F BIAS LTC3025 SHDN OUT IN VOUT = 1.5V IOUT < 300mA 1F
0.1F
110k 40.2k
80k GND ADJ 40.2k
VOUT = 1.2V IOUT < 300mA 1F
3035 TA04
COMMENTS VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 20A, ISD < 1A, VOUT = Adj, 1.5V, 1.8V, 2V, 2.5V, 2.8V, 3V, 3.3V, 5V, ThinSOTTM Package. Low Noise < 20VRMSP-P, Stable with 1F Ceramic Capacitors VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25A, ISD < 1A, VOUT = Adj, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20VRMSP-P VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30A, ISD < 1A, VOUT = 1.5, 1.8V, 2.5V, 3V, 3.3V, 5V, S8 Package. Low Noise < 20VRMSP-P VIN: 1.6V to 6.5V, VOUT(MIN) = 1.25V, VDO = 0.08V, IQ = 40A, ISD < 1A, VOUT = Adj, 1.5V, 1.8V, 2.5V, 2.8V, 3.3V, ThinSOT Package. Low Noise < 30VRMSP-P, Stable with 1F Ceramic Capacitors VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30A, ISD < 1A, VOUT = 1.5, 1.8V, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20VRMSP-P VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, VDO = 0.15V, IQ = 120A, ISD < 3A, VOUT = Adj, DFN, MS8 Package VIN: 0.9V to 5.5V, VBIAS: 2.5V to 5.5V, VOUT(MIN) = 0.4V, VDO = 0.05V, IQ = 54A, ISD < 1A, VOUT = Adj, DFN Package. Stable with 1F Ceramic Capacitors VIN: 1.14V to 3.5V (Boost Enabled), 1.14V to 5.5V (External 5V Boost), VOUT(MIN) = 0.4V, VDO = 0.15V, IQ = 400A, ISD < 1A, VOUT = Adj, DFN, MSOP Packages. Stable with 10F Ceramic Capacitors
LT 1105 * PRINTED IN USA
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(c) LINEAR TECHNOLOGY CORPORATION 2005

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