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PH2625L
N-channel TrenchMOSTM logic level FET
Rev. 02 -- 24 February 2005 Preliminary data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOSTM technology.
1.2 Features
s Optimized for use in DC-to-DC converters s Low threshold voltage s Very low switching and conduction losses s Low thermal resistance.
1.3 Applications
s DC-to-DC converters s Voltage regulators s Switched-mode power supplies s Notebook computers.
1.4 Quick reference data
s VDS 25 V s Qgd = 7.3 nC (typ) s RDSon 2.8 m (VGS = 10 V) s ID 100 A s Qg(tot) = 32 nC (typ) s RDSon 4.1 m (VGS = 4.5 V).
2. Pinning information
Table 1: Pin 1, 2, 3 4 mb Pinning Description source gate mounting base; connected to drain
mb
G
mbb076
Simplified outline
Symbol
D
S
1234
SOT669 (LFPAK)
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
3. Ordering information
Table 2: Ordering information Package Name PH2625L LFPAK Description plastic single-ended surface mounted package; 4 leads Version SOT669 Type number
4. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage drain current (DC) peak drain current total power dissipation storage temperature junction temperature source (diode forward) current (DC) Tmb = 25 C peak source (diode forward) current Tmb = 25 C; pulsed; tp 10 s Tmb = 25 C; VGS = 10 V; Figure 2 and 3 Tmb = 100 C; VGS = 10 V; Figure 2 Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 Conditions 25 C Tj 150 C 25 C Tj 150 C; RGS = 20 k Min -55 -55 Max 25 25 20 100 63 300 62.5 +150 +150 52 156 Unit V V V A A A W C C A A
Source-drain diode
Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy EDS(AL)R repetitive drain-source avalanche energy unclamped inductive load; ID = 71 A; tp = 0.1 ms; VDD 25 V; RGS = 50 ; VGS = 10 V; starting at Tj = 25 C unclamped inductive load; ID = 7.1 A; tp = 0.01 ms; VDD 25 V; RGS = 50 ; VGS = 10 V
[1] [2]
-
250
mJ
-
2.5
mJ
[1] [2]
Duty cycle is limited by the maximum junction temperature. Repetitive avalanche failure is not determined simply by thermal effects. Repetitive avalanche transients should only be applied for short bursts, not every switching cycle.
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
2 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
120 Pder (%) 80
03aa15
120 Ider (%)
03aa23
80
40
40
0 0 50 100 150 Tmb (C) 200
0 0 50 100 150 200 Tmb (C)
P tot P der = ------------------------ x 100 % P
tot ( 25 C )
ID I der = -------------------- x 100 % I
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of mounting base temperature
Fig 2. Normalized continuous drain current as a function of mounting base temperature
103 ID (A) Limit RDSon = VDS / ID
003aaa551
102
tp = 10 s 100 s DC 1 ms 10 ms
10
100 ms 1 10-1 1 10 VDS (V) 102
Tmb = 25 C; IDM is single pulse; VGS = 10 V
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
3 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
5. Thermal characteristics
Table 4: Rth(j-mb) Thermal characteristics Conditions Min Typ Max 2 Unit K/W thermal resistance from junction to mounting base Figure 4 Symbol Parameter
10 Zth(j-mb) (K/W) 1 = 0.5 0.2 0.1 0.05 0.02 10-1 single pulse
003aaa552
P
=
tp T
tp T 10-2 10-5 10-4 10-3 10-2 10-1 tp (s)
t
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
4 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
6. Characteristics
Table 5: Characteristics Tj = 25 C unless otherwise specified. Symbol V(BR)DSS VGS(th) Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 250 A; VGS = 0 V ID = 1 mA; VDS = VGS; Figure 9 and 10 Tj = 25 C Tj = 150 C Tj = -55 C IDSS drain-source leakage current VDS = 25 V; VGS = 0 V Tj = 25 C Tj = 150 C RG IGSS RDSon gate resistance gate-source leakage current drain-source on-state resistance f = 1 MHz VGS = 16 V; VDS = 0 V VGS = 10 V; ID = 25 A; Figure 6 and 8 Tj = 25 C Tj = 150 C VGS = 4.5 V; ID = 25 A; Figure 6 and 8 Tj = 25 C Tj = 150 C Dynamic characteristics Qg(tot) Qgs Qgs1 Qgs2 Qgd Vplat Qg(tot) Ciss Coss Crss Ciss td(on) tr td(off) tf VSD trr Qr total gate charge gate-source charge pre-VGS(th) gate-source charge post-VGS(th) gate-source charge gate-drain (Miller) charge plateau voltage total gate charge input capacitance output capacitance reverse transfer capacitance input capacitance turn-on delay time rise time turn-off delay time fall time source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 15 reverse recovery time recovered charge IS = 20 A; dIS/dt = -100 A/s; VGS = 0 V; VR = 25 V VGS = 0 V; VDS = 0 V; f = 1 MHz VDS = 12 V; RL = 0.48 ; VGS = 4.5 V; RG = 4.7 ID = 0 A; VDS = 0 V; VGS = 4.5 V VGS = 0 V; VDS = 12 V; f = 1 MHz; Figure 13 and 14 ID = 25 A; VDS = 12 V; VGS = 4.5 V; Figure 11 and 12 32 9.6 6 3.6 7.3 2.2 26 nC nC nC nC nC V nC pF pF pF pF ns ns ns ns V ns nC 3 4.8 4.1 6.6 m m 2 3.2 2.8 4.3 m m 0.06 1.5 10 1 500 100 A A nA 1 0.5 1.5 2 2.2 V V V Min 25 Typ Max Unit V Static characteristics
4308 1137 439 41 52 67 30 0.85 47 22 1.2 4830 -
Source-drain diode
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
5 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
40 ID (A) 30
003aaa553
20 RDSon (m)
003aaa555
10
4.5
2.5
2.4
VGS (V) = 2.3
15 VGS (V) = 2 2.1 2.2
2.2 20 2.1 1.9 1.8 1.7 0 0 0.5 1 0 1.5 VDS (V) 2 0 10 20 30 5 4.5 10 ID (A) 40 10 2.3
10
Tj = 25 C
Tj = 25 C
Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values
Fig 6. Drain-source on-state resistance as a function of drain current; typical values
2 a 1.5
03af18
40 ID (A) 30
003aaa554
Tj = 150 C 20
25 C
1
10
0.5
0
0
1
2
VGS (V)
3
0 -60
0
60
120
Tj (C)
180
Tj = 25 C and 150 C; VDS > ID x RDSon
R DSon a = ----------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature
Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
6 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
2.5 VGS(th) (V) 2 max
03aa33
10-1 ID (A) 10-2
03aa36
1.5
typ
10-3 min typ max
1
min
10-4
0.5
10-5
0 -60
10-6 0 60 120 Tj (C) 180 0 1 2 VGS (V) 3
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = 5 V
Fig 9. Gate-source threshold voltage as a function of junction temperature
003aaa558
Fig 10. Sub-threshold drain current as a function of gate-source voltage
10 VGS (V) 8 VDS (V) = 4.5 12 19
VDS ID
6 Vplat 4 VGS(th) VGS 2 Qgs1 Qgs2 Qgs 0 0 20 40 60 QG (nC) 80 Qgd Qg(tot)
003aaa508
ID = 25 A; VDS = 4.5 V, 12 V and 19 V
Fig 11. Gate-source voltage as a function of gate charge; typical values
Fig 12. Gate charge waveform definitions
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
7 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
104 C (pF)
003aaa556
8000 C (pF) 6000
003aaa632
Ciss
Ciss
103 Coss
4000 Crss
Crss
2000
102
10-1
1
10 VDS (V)
102
0
0
2
4
6
8 VGS (V)
10
VGS = 0 V; f = 1 MHz
VDS = 0 V; f = 1 MHz
Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values
Fig 14. Input and reverse transfer capacitances as a function of gate-source voltage; typical values
40 IS (A) 30 Tj = 150 C
003aaa557
25 C
20
10
0 0.2
0.4
0.6
0.8
VSD (V)
1
Tj = 25 C and 150 C; VGS = 0 V
Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
8 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
7. Package outline
Plastic single-ended surface mounted package (LFPAK); 4 leads SOT669
E b2 L1
A c2
A2
C E1 b3
mounting base D1 H D
b4
L2
1
e
2
3
b
1/2 e
4
wM A c X
A A1 C
(A 3)
detail X L yC 0 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 b3 2.2 2.0 b4 0.9 0.7 c c2 D (1) D1(1) E(1) E1(1) max 5.0 4.8 3.3 3.1 e 1.27 H 6.2 5.8 L 0.85 0.40 L1 1.3 0.8 L2 1.3 0.8 w 0.25 y 0.1 8 0
1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62
0.25 0.30 4.10 4.20 0.19 0.24 3.80
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC MO-235 JEITA EUROPEAN PROJECTION ISSUE DATE 03-09-15 04-10-13
Fig 16. Package outline SOT669 (LFPAK)
9397 750 14324 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
9 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
8. Soldering
5.70 4.70 4.60 3.70 2.50 2.00 0.90 (3x) 0.25 (2x) solder paste occupied area 0.075 solder lands solder resist
3.45 3.50 0.25 (2x) 0.60 (3x) 0.85 1.10 2.15 3.30 2.00 2.05 2.50
3.68
3.48
MSD864
1.27 3.81 0.70 (4x) 0.05 around (4x)
All dimensions in mm
Fig 17. Optimized soldering footprint SOT669 (LFPAK)
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
10 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
9. Revision history
Table 6: Revision history Release date 20050224 Data sheet status Change notice Preliminary data sheet Doc. number 9397 750 14324 Supersedes PH2625L-01 Document ID PH2625L_2 Modifications:
* *
The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. RDSon data revised in Section 1.4 "Quick reference data" and Section 6 "Characteristics" Preliminary data sheet 9397 750 12306 -
PH2625L-01
20040428
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
11 of 13
Philips Semiconductors
PH2625L
N-channel TrenchMOSTM logic level FET
10. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
11. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
13. Trademarks
TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V.
12. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
14. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14324
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 -- 24 February 2005
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