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| LTC3713 Low Input Voltage, High Power, No RSENSETM Synchronous Buck DC/DC Controller FEATURES s s s DESCRIPTIO s s s s s s s s s s s s Very Low VIN(MIN): 1.5V True Current Mode Control 5V Drive for N-Channel MOSFETs Eliminates Auxillary 5V Supply No Sense Resistor Required Uses Standard 5V Logic-Level N-Channel MOSFETs Adjustable Current Limit Adjustable Frequency Switch tON(MIN) < 100ns 2% to 90% Duty Cycle at 200kHz 0.8V 1% Reference Power Good Output Voltage Monitor Programmable Soft-Start Output Overvoltage Protection Optional Short-Circuit Shutdown Timer Small 24-Lead SSOP Package The LTC(R)3713 is a high current, high efficiency synchronous buck switching regulator controller optimized for use with very low input supply voltages. It operates from inputs as low as 1.5V and provides a regulated output voltage from 0.8V up to (0.9)VIN. The controller uses a valley current control architecture to enable high operating frequencies without requiring a sense resistor. Operating frequency is selected by an external resistor and is compensated for variations in VIN and VOUT. The LTC3713 uses a pair of standard 5V logic-level N-channel external MOSFETs, eliminating the need for expensive P-channel or low threshold devices. Discontinuous mode operation provides high efficiency operation at light loads. A forced continuous control pin reduces noise and RF interference, and can assist secondary winding regulation by disabling discontinuous operation when the main output is lightly loaded. Fault protection is provided by internal foldback current limiting, an output overvoltage comparator and an optional short-circuit shutdown timer. , LTC and LT are registered trademarks of Linear Technology Corporation. No RSENSE is a trademark of Linear Technology Corporation. APPLICATIO S s s s s Telecom Card 3.3V, 2.5V, 1.8V Step-Down Bus Termination (DDR memory, SSTL) Synchronous Buck with General Purpose Boost Low VIN Synchronous Boost TYPICAL APPLICATIO SHDN 330k 5.6k ION TG LTC3713 SW1 VFB1 SENSE+ 680pF 20k ITH BG PGND BOOST CMDSH-3 VIN 1.8V TO 3.3V 22F x2 100 0.33F M1 L1 1.8H VOUT 1.25V 10A EFFICIENCY (%) + M2 B340A 10k COUT 270F x2 SENSE - RUN/SS INTVCC 0.1F PGOOD SGND VIN1 VIN2 4.7F 10F 3713 F01a MBR0520 4.7H 12.1k VFB2 SW2 37.4k COUT: PANASONIC EEFUEOD271R L1: (A) PANASONIC ETQP6FIR8BFA (B) TOKO D104C-1.8H M1, M2: (A) IRF7822, (B) IRF7811A Figure 1. High Efficiency Step-Down Converter from 1.8V to 3.3V Input 3713fa U Efficiency vs Load Current 90 80 70 60 50 40 30 20 10 0 0.01 0.04 0.10 0.40 1 7 3 LOAD CURRENT (A) 12 15 VIN = 2.5V A B 3713 F01b U U 1 LTC3713 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW RUN/SS VON PGOOD VRNG FCB ITH SGND1 ION VFB1 1 2 3 4 5 6 7 8 9 24 BOOST 23 TG 22 SW1 21 SENSE + 20 SENSE - 19 PGND1 18 BG 17 INTVCC 16 VIN1 15 VIN2 14 PGND2 13 SW2 Input Supply Voltage (VIN2) .......................10V to - 0.3V Boosted Topside Driver Supply Voltage (BOOST) ............................................... 42V to - 0.3V VIN1, ION, SW1, SENSE+ Voltages ............. 36V to - 0.3V RUN/SS, PGOOD Voltages ......................... 7V to - 0.3V FCB, VON, VRNG Voltages .......... INTVCC + 0.3V to - 0.3V ITH, VFB1, SENSE- Voltages ..................... 2.7V to - 0.3V SW2 Voltage ............................................. 36V to - 0.4V VFB2 Voltage ................................................. VIN2 + 0.3V SHDN Voltage ......................................................... 10V TG, BG, INTVCC Peak Currents .................................. 2A TG, BG, INTVCC RMS Currents ............................ 50mA Operating Ambient Temperature Range (Note 4) ................................... - 40C to 85C Junction Temperature (Note 2) ............................ 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C ORDER PART NUMBER LTC3713EG SHDN 10 SGND2 11 VFB2 12 G PACKAGE 24-LEAD PLASTIC SSOP TJMAX = 125C, JA = 130C/ W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER Buck Regulator IQ(VIN1) Input DC Supply Current (VIN1) Normal Shutdown Supply Current VFB1 Feedback Reference Voltage IFB1 Feedback Current VFB1(LINEREG) Feedback Voltage Line Regulation VFB1(LOADREG) Feedback Voltage Load Regulation gm(EA) Error Amplifier Transconductance VFCB Forced Continuous Threshold IFCB Forced Continuous Pin Current tON On-Time tON(MIN) tOFF(MIN) VSENSE(MAX) VSENSE(MIN) VFB1(OV) VFB1(UV) VRUN/SS(ON) VRUN/SS(LE) VRUN/SS(LT) Minimum On-Time Minimum Off-Time Maximum Current Sense Threshold VPGND - VSW Minimum Current Sense Threshold VPGND - VSW Output Overvoltage Fault Threshold Output Undervoltage Fault Threshold RUN Pin Start Threshold RUN Pin Latchoff Enable Threshold RUN Pin Latchoff Threshold The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN1 = 15V, VIN2 = 1.5V unless otherwise noted. CONDITIONS MIN TYP MAX UNITS ITH = 1.2V (Note 3) (Note 3) VIN1 = 4V to 30V, ITH = 1.2V (Note 3) ITH = 0.5V to 1.9V (Note 3) ITH = 1.2V (Note 3) VFCB = 0.8V ION = 60A, VON = 1.5V ION = 30A, VON = 1.5V ION = 180A VRNG = 1V, VFB1 = 0.76V VRNG = 0V, VFB1 = 0.76V VRNG = INTVCC, VFB1 = 0.76V VRNG = 1V, VFB1 = 0.84V VRNG = 0V, VFB1 = 0.84V VRNG = INTVCC, VFB1 = 0.84V q 0.792 q q q 1.4 0.76 200 400 q q q 113 79 158 q 5.5 520 0.8 RUN/SS Pin Rising RUN/SS Pin Falling 900 15 0.800 -5 0.002 - 0.05 1.7 0.8 -1 250 500 50 250 133 93 186 - 67 - 47 - 93 7.5 600 1.5 4 3.5 2000 30 0.808 50 - 0.3 2 0.84 -2 300 600 100 400 153 107 214 9.5 680 2 4.5 4.2 2 U A A V nA %/V % mS V A ns ns ns ns mV mV mV mV mV mV % mV V V V 3713fa W U U WW W LTC3713 ELECTRICAL CHARACTERISTICS SYMBOL IRUN/SS(C) IRUN/SS(D) UVLO UVLOR TG RUP TG RDOWN BG RUP BG RDOWN TG t r TG t f BG tr BG tf VINTVCC VLDO(LOADREG) PGOOD Output VFB1H VFB1L VFB(HYS) VPGL Boost Regulator VIN2(MIN) VIN2(MAX) IQ(VIN2) Minimum Operating Voltage Maximum Operating Voltage Input DC Supply Current (VIN2) Normal Shutdown VFB2 Feedback Voltage VFB2 Pin Bias Current BOOST Reference Line Regulation BOOST Switching Frequency BOOST Maximum Duty Cycle BOOST Switch Current Limit BOOST Switch VCESAT BOOST Switch Leakage Current SHDN Input Voltage High SHDN Input Voltage Low SHDN Pin Bias Current PGOOD Upper Threshold PGOOD Lower Threshold PGOOD Hysteresis PGOOD Low Voltage PARAMETER Soft-Start Charge Current Soft-Start Discharge Current VIN1 Undervoltage Lockout VIN1 Undervoltage Lockout Release TG Driver Pull-Up On Resistance TG Driver Pull-Down On Resistance BG Driver Pull-Up On Resistance BG Driver Pull-Down On Resistance TG Rise Time TG Fall Time BG Rise Time BG Fall Time Internal VCC Voltage Internal VCC Load Regulation The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN1 = 15V, VIN2 = 1.5V unless otherwise noted. CONDITIONS VRUN/SS = 0V VRUN/SS = 4.5V, VFB = 0V VIN1 Falling VIN1 Rising TG High TG Low BG High BG Low CLOAD = 3300pF CLOAD = 3300pF CLOAD = 3300pF CLOAD = 3300pF 6V < VIN < 30V ICC = 0mA to 20mA VFB1 Rising VFB1 Falling VFB1 Returning IPGOOD = 5mA 5.5 - 5.5 q q q MIN - 0.5 0.8 TYP - 1.2 1.8 3.4 3.5 2 2 3 1 20 20 20 20 MAX -3 3 3.9 4 3 3 4 2 UNITS A A V V ns ns ns ns Internal VCC Regulator 4.7 5 -0.1 7.5 - 7.5 1 0.15 0.9 5.3 2 9.5 - 9.5 2 0.4 1.5 10 3 0.01 0C to 70C -40C to 85C 1.5V VIN 10V 0C to 70C -40C to 85C (Note 5) ISW = 300mA VSW = 5V 1 0.3 VSHDN = 3V VSHDN = 0V 25 0.01 50 0.1 q q q V % % % % V V V mA A V V nA %/V MHz MHz % mA 4.5 1 1.255 1.260 80 0.2 1.8 1.9 VFB2 IVFB2 VFB2(LINEREG) fBOOST DCBOOST(MAX) ILIM(BOOST) VCESAT(BOOST) ISWLKG(BOOST) VSHDN(HIGH) VSHDN(LOW) ISHDN 1.205 1.200 1.23 27 0.02 1.0 0.9 82 500 1.4 86 800 300 0.01 350 1 mV A V V A A Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD as follows: LTC3713EG: TJ = TA + (PD * 130C/W) Note 3: The LTC3713 is tested in a feedback loop that adjusts VFB to achieve a specified error amplifier output voltage (ITH). Note 4: The LTC3713E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 5: Current limit guaranteed by design and/or correlation to static test. 3713fa 3 LTC3713 TYPICAL PERFOR A CE CHARACTERISTICS Transient Response Transient Response (Discontinuous Mode) Start-Up from Shutdown VOUT 100mV/DIV IL 5A/DIV 50s/DIV LOAD STEP 0A TO 6A VIN = 3.3V VOUT = 1.25V FCB = 0V FIGURE 1 CIRCUIT Boost Converter Oscillator Frequency vs Temperature 2.00 1.75 VIN = 5V SHDN PIN BIAS CURRENT (A) 40 50 SWITCHING FREQUENCY (MHz) CURRENT LIMIT (mA) 1.50 1.25 1.00 0.75 0.50 0.25 0 -50 VIN = 1.5V -25 0 25 50 TEMPERATURE (C) VFB2, Feedback Pin Voltage 1.25 100 90 FEEDBACK PIN VOLTAGE (V) 1.24 VOLTAGE EFFICIENCY (%) 1.23 80 70 60 50 VIN = 3.3V EFFICIENCY (%) 1.22 1.21 40 FIGURE 1 CIRCUIT (B) 1.20 -50 -25 0 25 50 TEMPERATURE (C) 4 UW 75 75 VOUT 100mV/DIV VOUT 500mV/DIV IL 5A/DIV IL 5A/DIV 3713 G01 50s/DIV LOAD STEP 600mA TO 6A VIN = 3.3V VOUT = 1.25V FCB = INTVCC FIGURE 1 CIRCUIT 3713 G02 500s/DIV VIN = 3.3V VOUT = 1.25V L = 1.8H COUT = 540F LOAD = 0.2 3713 G03 SHDN Pin Current vs VSHDN 1000 TA = 25C 900 800 Boost Converter Current Limit vs Duty Cycle 70C 700 600 500 400 300 -40C 25C 30 20 10 0 100 3713 G04 200 0 1 2 3 4 SHDN PIN VOLTAGE (V) 5 3713 G05 10 20 30 40 50 60 DUTY CYCLE (%) 70 80 3713 G06 Efficiency vs Load Current (Discontinuous Mode) 100 90 VIN = 2.5V 80 70 60 50 40 30 20 10 Efficiency vs Load Current (Force Continuous) VIN = 2.5V VIN = 3.3V FIGURE 1 CIRCUIT (B) 10 0 0.01 0.05 0.8 0.09 0.4 3 LOAD CURRENT (A) 7 3713 G10 100 3713 G07 30 0.01 0.04 0.07 0.1 0.4 0.7 1 4 LOAD CURRENT (A) 7 1713 G09 3713fa LTC3713 TYPICAL PERFOR A CE CHARACTERISTICS Load Regulation 0 -0.1 350 300 LOAD = 6A FREQUENCY (kHz) -0.2 -0.3 -0.4 -0.5 -0.6 FIGURE 1 CIRCUIT -0.7 0 1 2 3456 7 LOAD CURRENT (A) 8 9 10 200 150 100 50 FIGURE 1 CIRCUIT 0 1.5 ON-TIME (ns) VOUT (%) On-Time vs VON Voltage 1000 IION = 30A 300 250 200 150 100 200 50 MAXIMUM CURRENT SENSE THRESHOLD (mV) 800 ON-TIME (ns) 600 ON-TIME (ns) 400 0 0 2 1 VON VOLTAGE (V) Maximum Current Sense Threshold vs VRNG Voltage MAXIMUM CURRENT SENSE THRESHOLD (mV) MAXIMUM CURRENT SENSE THRESHOLD (mV) VRNG = 1V MAXIMUM CURRENT SENSE THRESHOLD (mV) 300 250 200 150 100 50 0 0.5 0.75 1.0 1.25 1.5 VRNG VOLTAGE (V) UW 3713 G11 Frequency vs Input Voltage 10k On-Time vs ION Current VVON = 0V 250 LOAD = 0A 1k 100 10 2.0 4.0 2.5 3.0 3.5 INPUT VOLTAGE (V) 4.5 5.0 1 10 ION CURRENT (A) 100 3713 G13 3713 G12 On-Time vs Temperature IION = 30A 150 125 100 75 50 25 0 Current Limit Foldback VRNG = 1V 3 3713 G14 0 -50 -25 50 25 75 0 TEMPERATURE (C) 100 125 0 0.2 0.4 VFB (V) 0.6 0.8 3713 G16 3713 G15 Maximum Current Sense Threshold vs RUN/SS Voltage 150 125 100 75 50 25 0 1.5 2 2.5 3 RUN/SS VOLTAGE (V) 3.5 3713 G18 Maximum Current Sense Threshold vs Temperature 150 VRNG = 1V 140 130 120 110 1.75 2.0 100 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 3713 G17 3713 G19 3713fa 5 LTC3713 TYPICAL PERFOR A CE CHARACTERISTICS Feedback Reference Voltage vs Temperature 0.82 2.0 FEEDBACK REFERENCE VOLTAGE (V) 0.81 0.80 gm (mS) 1.6 INTVCC (%) 0.79 1.2 -0.4 0.78 -50 -25 75 0 25 50 TEMPERATURE (C) Current Sense Threshold vs ITH Voltage 300 VRNG = 2V 1.4V 0 -0.25 CURRENT SENSE THRESHOLD (mV) 200 FCB PIN CURRENT (A) FCB PIN CURRENT (A) 100 0 -100 -200 0 0.5 1.0 1.5 2.0 ITH VOLTAGE (V) RUN/SS Latchoff Thresholds vs Temperature UNDERVOLTAGE LOCKOUT THRESHOLD (V) 5.0 4.0 RUN/SS THRESHOLD (V) 4.5 LATCHOFF ENABLE 4.0 3.5 LATCHOFF THRESHOLD 3.0 -50 -25 6 UW 100 3713 G20 Error Amplifier gm vs Temperature 0 INTVCC Load Regulation 1.8 -0.1 -0.2 1.4 -0.3 125 1.0 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 -0.5 0 10 30 40 20 INTVCC LOAD CURRENT (mA) 50 3713 G22 3713 G21 FCB Pin Current vs Temperature 3 RUN/SS Pin Current vs Temperature 2 PULL-DOWN CURRENT 1 1V 0.7V 0.5V -0.50 -0.75 -1.00 -1.25 -1.50 -50 -25 0 PULL-UP CURRENT -1 2.5 3.0 3713 G23 50 25 75 0 TEMPERATURE (C) 100 125 -2 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 3713 G24 3713 G25 Undervoltage Lockout Threshold vs Temperature 3.5 3.0 2.5 75 0 25 50 TEMPERATURE (C) 100 125 2.0 -50 -25 75 0 25 50 TEMPERATURE (C) 100 125 3713 G26 3713 G27 3713fa LTC3713 PI FU CTIO S RUN/SS (Pin 1): Run Control and Soft-Start Input. A capacitor to ground at this pin sets the ramp time to full output current (approximately 3s/F) and the time delay for overcurrent latchoff (see Applications Information). Forcing this pin below 0.8V shuts down the device. VON (Pin 2): On-Time Voltage Input. Voltage trip point for the on-time comparator. Tying this pin to the output voltage makes the on-time proportional to VOUT. The comparator input defaults to 0.7V when the pin is grounded, 2.4V when the pin is tied to INTVCC. PGOOD (Pin 3): Power Good Output. Open-drain logic output that is pulled to ground when the output voltage is not within 7.5% of the regulation point. VRNG (Pin 4): Sense Voltage Range Input. The voltage at this pin is ten times the nominal sense voltage at maximum output current and can be set from 0.5V to 2V by a resistive divider from INTVCC. The nominal sense voltage defaults to 70mV when this pin is tied to ground, 140mV when tied to INTVCC. FCB (Pin 5): Forced Continuous Input. Tie this pin to ground to force continuous synchronous operation at low load, to INTVCC to enable discontinuous mode operation at low load or to a resistive divider from a secondary output when using a secondary winding. ITH (Pin 6): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V with 0.8V corresponding to zero sense voltage (zero current). SGND (Pins 7, 11): Signal Ground. All small-signal components and compensation components should connect to this ground, which in turn connects to PGND at one point. ION (Pin 8): On-Time Current Input. Tie a resistor from VIN to this pin to set the one-shot timer current and thereby set the switching frequency. VFB1 (Pin 9): Error Amplifier Feedback Input. This pin connects the error amplifier input to an external resistive divider from VOUT. SHDN (Pin 10): Shutdown, Active Low. Tie to 1V or more to enable boost converter portion of the LTC3713. Ground to shut down. VFB2 (Pin 12): Boost Converter Feedback. The VFB2 pin is connected to INTVCC through a resistor divider to set the voltage on INTVCC. Set INTVCC voltage according to: VINTVCC = 1.23V(1 + RF4/RF3) SW2 (Pin 13): Boost Converter Switch Pin. Connect inductor/diode for boost converter portion here. Minimize trace area at this pin to keep EMI down. PGND (Pins 14, 19): Power Ground. Connect these pins closely to the source of the bottom N-channel MOSFET, the (-) terminal of CVCC and the (-) terminal of CIN. VIN2 (Pin 15): Input Supply Pin for Boost Converter Portion of LTC3713. Must be locally bypassed. VIN1 (Pin 16): Main Input Supply. Decouple this pin to PGND with an RC filter (1, 0.1F). INTVCC (Pin 17): Internal Regulator Output. The driver and control circuits are powered from this voltage. Decouple this pin to power ground with a minimum of 4.7F low ESR tantalum or ceramic capacitor. BG (Pin 18): Bottom Gate Drive. Drives the gate of the bottom N-channel MOSFET between ground and INTVCC. SENSE - (Pin 20): Negative Current Sense Comparator Input. The (-) input to the current comparator is normally connected to power ground unless using a resistive divider from INTVCC (see Applications Information). SENSE + (Pin 21): Positive Current Sense Comparator Input. The (+) input to the current comparator is normally connected to the SW1 node unless using a sense resistor (see Applications Information). SW1 (Pin 22): Switch Node. The (-) terminal of the bootstrap capacitor CB connects here. This pin swings from a diode voltage drop below ground up to VIN. TG (Pin 23): Top Gate Drive. Drives the top N-channel MOSFET with a voltage swing equal to INTVCC superimposed on the switch node voltage SW1. BOOST (Pin 24): Boosted Floating Driver Supply. The (+) terminal of the bootstrap capacitor CB connects here. This pin swings from a diode voltage drop below INTVCC up to VIN + INTVCC. 3713fa U U U 7 LTC3713 FU CTIO AL DIAGRA S RON VON 2 8 ION 5 FCB 4.7V 0.7V 2.4V 1A 16 VIN1 VIN tON = VVON (10pF) IION + ICMP 20k - 1.4V VRNG 4 x 0.7V 3.3A 1 240k Q2 Q4 ITHB Q6 Q3 Q1 Q5 OV + - x4 0.8V SS EA RUN SHDN 0.6V 0.8V 6 ITH CC1 RC VIN2 15 R5 40k VOUT2 R7 (EXTERNAL) VFB2 FB2 12 R8 (EXTERNAL) Q1 Q2 x10 R3 30k R4 140k 11 SGND2 1.4MHz OSCILLATOR SHDN 10 SHUTDOWN 14 PGND2 3713 FD02 R6 40k + - - A1 gm RC CC RAMP GENERATOR 8 + + - W R S - + U U + CIN + - 0.8V REF 0.8V 5V REG - F + BOOST 24 TG CB M1 Q FCNT ON 23 SW1 22 SENSE+ 21 INTVCC DB + IREV SWITCH LOGIC L1 VOUT - SHDN OV 17 BG 18 PGND1 19 SENSE - 20 PGOOD 3 CVCC M2 + COUT R2 1V UV + - 0.74V VFB1 9 + - 1.2A 0.86V R1 SGND1 7 + - 6V 1 RUN/SS CSS 3713 FD01 0.6V 13 SW2 COMPARATOR FF S DRIVER Q Q3 A2 R + 0.15 - 3713fa LTC3713 OPERATIO Main Control Loop The LTC3713 is a current mode controller for DC/DC step-down converters designed to operate from low input voltages. It incorporates a boost converter with a buck regulator. Buck Regulator Operation In normal operation, the top MOSFET is turned on for a fixed interval determined by a one-shot timer OST. When the top MOSFET is turned off, the bottom MOSFET is turned on until the current comparator ICMP trips, restarting the one-shot timer and initiating the next cycle. Inductor current is determined by sensing the voltage between the SENSE+ and SENSE- pins using the bottom MOSFET on-resistance . The voltage on the ITH pin sets the comparator threshold corresponding to inductor valley current. The error amplifier EA adjusts this voltage by comparing the feedback signal VFB1 from the output voltage with an internal 0.8V reference. If the load current increases, it causes a drop in the feedback voltage relative to the reference. The ITH voltage then rises until the average inductor current again matches the load current. At low load currents, the inductor current can drop to zero and become negative. This is detected by current reversal comparator IREV which then shuts off M2, resulting in discontinuous operation. Both switches will remain off with the output capacitor supplying the load current until the ITH voltage rises above the zero current level (0.8V) to initiate another cycle. Discontinuous mode operation is disabled by comparator F when the FCB pin is brought below 0.8V, forcing continuous synchronous operation. The operating frequency is determined implicitly by the top MOSFET on-time and the duty cycle required to maintain regulation. The one-shot timer generates an ontime that is proportional to the ideal duty cycle, thus holding frequency approximately constant with changes in VIN. The nominal frequency can be adjusted with an external resistor RON. Overvoltage and undervoltage comparators OV and UV pull the PGOOD output low if the output feedback voltage exits a 7.5% window around the regulation point. Furthermore, in an overvoltage condition, M1 is turned off U and M2 is turned on and held on until the overvoltage condition clears. Foldback current limiting is provided if the output is shorted to ground. As VFB1 drops, the buffered current threshold voltage ITHB is pulled down by clamp Q3 to a 1V level set by Q4 and Q6. This reduces the inductor valley current level to one sixth of its maximum value as VFB1 approaches 0V. Pulling the RUN/SS pin low forces the controller into its shutdown state, turning off both M1 and M2. Releasing the pin allows an internal 1.2A current source to charge up an external soft-start capacitor CSS. When this voltage reaches 1.5V, the controller turns on and begins switching, but with the ITH voltage clamped at approximately 0.6V below the RUN/SS voltage. As CSS continues to charge, the soft-start current limit is removed. INTVCC Power Power for the top and bottom MOSFET drivers and most of the internal controller circuitry is derived from the INTVCC pin. The top MOSFET driver is powered from a floating bootstrap capacitor CB. This capacitor is recharged from INTVCC through an external Schottky diode DB when the top MOSFET is turned off. Boost Regulator Operation The 5V power source for INTVCC can be provided by a current mode, internally compensated fixed frequency step-up switching regulator that has been incorporated into the LTC3713. Operation can be best understood by referring to the Functional Diagrams. Q1 and Q2 form a bandgap reference core whose loop is closed around the output of the regulator. The voltage drop across R5 and R6 is low enough such that Q1 and Q2 do not saturate, even when VIN2 is 1V. When there is no load, VFB2 rises slightly above 1.23V, causing VC (the error amplifier's output) to decrease. Comparator A2's output stays high, keeping switch Q3 in the off state. As increased output loading causes the VFB2 voltage to decrease, A1's output increases. Switch current is regulated directly on a cycle-by-cycle basis by the VC node. The flip-flop is set at the beginning of each 3713fa 9 LTC3713 OPERATIO switch cycle, turning on the switch. When the summation of a signal representing switch current and a ramp generator (introduced to avoid subharmonic oscillations at duty factors greater than 50%) exceeds the VC signal, comparator A2 changes state, resetting the flip-flop and turning off the switch. More power is delivered to the output as switch current is increased. The output voltage, attenuated by external resistor divider R7 and R8, appears at the VFB2 pin, closing the overall loop. Frequency compensation is provided internally by RC and CC. Transient APPLICATIO S I FOR ATIO A typical LTC3713 application circuit is shown in Figure 1. External component selection is primarily determined by the maximum load current and begins with the selection of the sense resistance and power MOSFET switches. The LTC3713 uses the on-resistance of the synchronous power MOSFET for determining the inductor current. The desired amount of ripple current and operating frequency largely determines the inductor value. Finally, CIN is selected for its ability to handle the large RMS current into the converter and COUT is chosen with low enough ESR to meet the output voltage ripple and transient specification. Maximum Sense Voltage and VRNG Pin Inductor current is determined by measuring the voltage across a sense resistance that appears between the SENSE + and SENSE - pins. The maximum sense voltage is set by the voltage applied to the VRNG pin and is equal to approximately (0.133)VRNG. The current mode control loop will not allow the inductor current valleys to exceed (0.133)VRNG/RSENSE. In practice, one should allow some margin for variations in the LTC3713 and external component values and a good guide for selecting the sense resistance is: RSENSE = VRNG 10 * IOUT (MAX) An external resistive divider from INTVCC can be used to set the voltage of the VRNG pin between 0.5V and 2V 10 U W UU U response can be optimized by the addition of a phase lead capacitor CPL in parallel with R7 in applications where large value or low ESR output capacitors are used. As the load current is decreased, the switch turns on for a shorter period each cycle. If the load current is further decreased, the boost converter will skip cycles to maintain output voltage regulation. If the VFB2 pin voltage is increased significantly above 1.23V, the boost converter will enter a low power state. resulting in nominal sense voltages of 50mV to 200mV. Additionally, the VRNG pin can be tied to SGND or INTVCC in which case the nominal sense voltage defaults to 70mV or 140mV, respectively. The maximum allowed sense voltage is about 1.33 times this nominal value. Connecting the SENSE + and SENSE - Pins The LTC3713 can be used with or without a sense resistor. When using a sense resistor, it is placed between the source of the bottom MOSFET M2 and ground. Connect the SENSE + and SENSE - pins as a Kelvin connection to the sense resistor with SENSE + at the source of the bottom MOSFET and the SENSE - pin to PGND1. Using a sense resistor provides a well defined current limit, but adds cost and reduces efficiency. Alternatively, one can eliminate the sense resistor and use the bottom MOSFET as the current sense element by simply connecting the SENSE + pin to the drain and the SENSE - pin to the source of the bottom MOSFET. This improves efficiency, but one must carefully choose the MOSFET on-resistance as discussed in a later section. Applications Requiring Symmetric Current Limit The ITH voltage has a range of 0V to 2.4V with 0.8V corresponding to 0A. In applications in which the output will only be sourcing current, this allows the output to sink one third of the maximum source current. For applications in which the output will be sourcing and sinking current, it might be desirable to have a symmetrical output current 3713fa LTC3713 APPLICATIO S I FOR ATIO SENSE+ WITHOUT RSENSE SENSE+ SENSE - VOUT + ROS2 VOS ROS1 - RSENSE 3713 F02 Figure 2. Sense Voltage Offset range with respect to zero current. This can be accomplished by introducing an offset into the sense voltage as shown in Figure 2. The first step in calculating the amount of required offset voltage is to determine the maximum sense voltage. VSENSE = IOUT(MAX) * RSENSE A good rule of thumb is to set the maximum sense voltage for a current limit that is 30% greater than the maximum source current. The voltage on pin VRNG should be set based on the value of VSENSE. VRNG = VSENSE/0.133 VOS can be calculated using the following formula: VOS = 0.6VSENSE The offset voltage is added as shown in Figure 2 and can be set by choosing the values of ROS1 and ROS2: VOS V *R = OUT OS1 ROS1 + ROS2 T NORMALIZED ON-RESISTANCE The offset voltage must be scaled to VOUT to avoid interfering with the internal current limit foldback. Power MOSFET Selection The LTC3713 requires two external N-channel power MOSFETs, one for the top (main) switch and one for the bottom (synchronous) switch. Important parameters for the power MOSFETs are the breakdown voltage V(BR)DSS, threshold voltage V(GS)TH, on-resistance RDS(ON), reverse transfer capacitance CRSS and maximum current IDS(MAX). U The gate drive voltage is set by the 5V INTVCC supply. Consequently, logic-level threshold MOSFETs must be used in LTC3713 applications. When the bottom MOSFET is used as the current sense element, particular attention must be paid to its on-resistance. MOSFET on-resistance is typically specified with a maximum value RDS(ON)(MAX) at 25C. In this case, additional margin is required to accommodate the rise in MOSFET on-resistance with temperature: RDS(ON)(MAX) = RSENSE T W UU The T term is a normalization factor (unity at 25C) accounting for the significant variation in on-resistance with temperature, typically about 0.4%/C as shown in Figure 3. For a maximum junction temperature of 100C, using a value T = 1.3 is reasonable. 2.0 1.5 1.0 0.5 0 - 50 50 100 0 JUNCTION TEMPERATURE (C) 150 3713 F03 Figure 3. RDS(ON) vs Temperature The power dissipated by the top and bottom MOSFETs strongly depends upon their respective duty cycles and the load current. When the LTC3713 is operating in continuous mode, the duty cycles for the MOSFETs are: D TOP = DBOT VOUT VIN V -V = IN OUT VIN 3713fa 11 LTC3713 APPLICATIO S I FOR ATIO The resulting power dissipation in the MOSFETs at maximum output current are: PTOP = DTOP IOUT(MAX)2 T(TOP) RDS(ON)(MAX) + k VIN2 IOUT(MAX) CRSS f PBOT = DBOT IOUT(MAX)2 T(BOT) RDS(ON)(MAX) Both MOSFETs have I2R losses and the top MOSFET includes an additional term for transition losses, which are largest at high input voltages. The constant k = 1.7A-1 can be used to estimate the amount of transition loss. The bottom MOSFET losses are greatest when the bottom duty cycle is near 100%, during a short-circuit or at high input voltage. Operating Frequency The choice of operating frequency is a tradeoff between efficiency and component size. Low frequency operation improves efficiency by reducing MOSFET switching losses but requires larger inductance and/or capacitance in order to maintain low output ripple voltage. The operating frequency of LTC3713 applications is determined implicitly by the one-shot timer that controls the on-time tON of the top MOSFET switch. The on-time is set by the current into the ION pin and the voltage at the VON pin according to: tON = VVON (10pF ) IION Tying a resistor RON from VIN to the ION pin yields an ontime inversely proportional to VIN. For a step-down converter, this results in approximately constant frequency operation as the input supply varies: RVON1 30k VOUT RVON2 100k RC ITH CC CVON 0.01F VON LTC3713 (4a) Figure 4. Adjusting Frequency Shift with Load Current Changes 3713fa 12 U f= VOUT Hz VVONRON (10pF ) W UU [] To hold frequency constant during output voltage changes, tie the VON pin to VOUT. The VON pin has internal clamps that limit its input to the one-shot timer. If the pin is tied below 0.7V, the input to the one-shot is clamped at 0.7V. Similarly, if the pin is tied above 2.4V, the input is clamped at 2.4V. Because the voltage at the ION pin is about 0.7V, the current into this pin is not exactly inversely proportional to VIN, especially in applications with lower input voltages. To account for the 0.7V drop on the ION pin, the following equation can be used to calculate the frequency: f= (VIN - 0.7V)VOUT VVON * VIN * RON (10pF ) To correct for this error, an additional resistor RON2 connected from the ION pin to the 5V INTVCC supply will further stabilize the frequency. RON2 = 5V RON 0.7V Changes in the load current magnitude will also cause frequency shift. Parasitic resistance in the MOSFET switches and inductor reduce the effective voltage across the inductance, resulting in increased duty cycle as the load current increases. By lengthening the on-time slightly as current increases, constant frequency operation can be maintained. This is accomplished with a resistive divider from the ITH pin to the VON pin and VOUT. The values required will depend on the parasitic resistances in the RVON1 3k VOUT 10k INTVCC Q1 2N5087 RVON2 10k CVON 0.01F RC ITH CC 3713 F04 VON LTC3713 (4b) LTC3713 APPLICATIO S I FOR ATIO specific application. A good starting point is to feed about 25% of the voltage change at the ITH pin to the VON pin as shown in Figure 4a. Place capacitance on the VON pin to filter out the ITH variations at the switching frequency. The resistor load on ITH reduces the DC gain of the error amp and degrades load regulation, which can be avoided by using the PNP emitter follower of Figure 4b. Inductor L1 Selection Given the desired input and output voltages, the inductor value and operating frequency determine the ripple current: V V IL = OUT 1 - OUT VIN fL Lower ripple current reduces cores losses in the inductor, ESR losses in the output capacitors and output voltage ripple. Highest efficiency operation is obtained at low frequency with small ripple current. However, achieving this requires a large inductor. There is a tradeoff between component size, efficiency and operating frequency. A reasonable starting point is to choose a ripple current that is about 40% of IOUT(MAX). The largest ripple current occurs at the highest VIN. To guarantee that ripple current does not exceed a specified maximum, the inductance should be chosen according to: VOUT VOUT L= 1- f IL(MAX) VIN(MAX) Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or Kool M(R) cores. A variety of inductors designed for high current, low voltage applications are available from manufacturers such as Sumida, Panasonic, Coiltronics, Coilcraft and Toko. Schottky Diode D1 Selection The Schottky diode D1 shown in Figure 1 conducts during the dead time between the conduction of the power MOSFET switches. It is intended to prevent the body diode U of the bottom MOSFET from turning on and storing charge during the dead time, which can cause a modest (about 1%) efficiency loss. The diode can be rated for about one half to one fifth of the full load current since it is on for only a fraction of the duty cycle. In order for the diode to be effective, the inductance between it and the bottom MOSFET must be as small as possible, mandating that these components be placed adjacently. The diode can be omitted if the efficiency loss is tolerable. CIN and COUT Selection The input capacitance CIN is required to filter the square wave current at the drain of the top MOSFET. Use a low ESR capacitor sized to handle the maximum RMS current. IRMS IOUT (MAX) VOUT VIN VIN -1 VOUT This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT(MAX) / 2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. The selection of COUT is primarily determined by the ESR required to minimize voltage ripple and load step transients. The output ripple VOUT is approximately bounded by: 1 VOUT IL ESR + 8fC OUT W UU Since IL increases with input voltage, the output ripple is highest at maximum input voltage. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering and has the necessary RMS current rating. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Kool M is a registered trademark of Magnetics, Inc. 3713fa 13 LTC3713 APPLICATIO S I FOR ATIO Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications providing that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. When used as input capacitors, care must be taken to ensure that ringing from inrush currents and switching does not pose an overvoltage hazard to the power switches and controller. To dampen input voltage transients, add a small 5F to 50F aluminum electrolytic capacitor with an ESR in the range of 0.5 to 2. High performance through-hole capacitors may also be used, but an additional ceramic capacitor in parallel is recommended to reduce the effect of their lead inductance. Top MOSFET Driver Supply (CB, DB) An external bootstrap capacitor CB connected to the BOOST pin supplies the gate drive voltage for the topside MOSFET. This capacitor is charged through diode DB from INTVCC when the switch node is low. When the top MOSFET turns on, the switch node rises to VIN and the BOOST pin rises to approximately VIN + INTVCC. The boost capacitor needs to store about 100 times the gate charge required by the top MOSFET. In most applications a 0.1F to 0.47F X5R or X7R dielectric capacitor is adequate. Discontinuous Mode Operation and FCB Pin The FCB pin determines whether the bottom MOSFET remains on when current reverses in the inductor. Tying this pin above its 0.8V threshold enables discontinuous operation where the bottom MOSFET turns off when inductor current reverses. The load current at which current reverses and discontinuous operation begins depends on the amplitude of the inductor ripple current and will vary with changes in VIN. Tying the FCB pin below the 0.8V threshold forces continuous synchronous operation, allowing current to reverse at light loads and maintaining high frequency operation. 14 U Fault Conditions: Current Limit and Foldback The maximum inductor current is inherently limited in a current mode controller by the maximum sense voltage. In the LTC3713, the maximum sense voltage is controlled by the voltage on the VRNG pin. With valley current control, the maximum sense voltage and the sense resistance determine the maximum allowed inductor valley current. The corresponding output current limit is: ILIMIT = 1 + IL RDS(ON)T 2 VSNS(MAX) W UU The current limit value should be checked to ensure that ILIMIT(MIN) > IOUT(MAX). The minimum value of current limit generally occurs with the largest VIN at the highest ambient temperature, conditions that cause the largest power loss in the converter. Note that it is important to check for self-consistency between the assumed MOSFET junction temperature and the resulting value of ILIMIT which heats the MOSFET switches. Caution should be used when setting the current limit based upon the RDS(ON) of the MOSFETs. The maximum current limit is determined by the minimum MOSFET onresistance. Data sheets typically specify nominal and maximum values for RDS(ON), but not a minimum. A reasonable assumption is that the minimum RDS(ON) lies the same amount below the typical value as the maximum lies above it. Consult the MOSFET manufacturer for further guidelines. To further limit current in the event of a short circuit to ground, the LTC3713 includes foldback current limiting. If the output falls by more than 25%, then the maximum sense voltage is progressively lowered to about one sixth of its full value. Minimum Off-time and Dropout Operation The minimum off-time tOFF(MIN) is the smallest amount of time that the LTC3713 is capable of turning on the bottom MOSFET, tripping the current comparator and turning the MOSFET back off. This time is generally about 250ns. The minimum off-time limit imposes a maximum duty cycle of tON/(tON + tOFF(MIN)). If the maximum duty cycle is reached, 3713fa LTC3713 APPLICATIO S I FOR ATIO due to a dropping input voltage for example, then the output will drop out of regulation. The minimum input voltage to avoid dropout is: VIN(MIN) = VOUT tON + tOFF(MIN) tON Output Voltage Programming A resistor divider connected between VFB1 and VOUT sets the output voltage according to the following equation: R VOUT = 0.8V 1 + F2 RF1 External Gate Drive Buffers The LTC3713 drivers are adequate for driving up to about 30nC into MOSFET switches with RMS currents of 50mA. Applications with larger MOSFET switches or operating at frequencies requiring greater RMS currents will benefit from using external gate drive buffers such as the LTC1693. Alternately, the external buffer circuit shown in Figure 5 can be used. Note that the bipolar devices reduce the signal swing at the MOSFET gate. BOOST Q1 FMMT619 10 TG Q2 FMMT720 SW GATE OF M1 10 BG Q4 FMMT720 PGND 3713 F05 INTVCC Q3 FMMT619 GATE OF M2 Figure 5. Optional External Gate Driver VIN Soft-Start and Latchoff with the RUN/SS Pin The RUN/SS pin provides a means to shut down the LTC3713 as well as a timer for soft-start and overcurrent latchoff. Pulling the RUN/SS pin below 0.8V puts the LTC3713 into a low quiescent current shutdown (IQ < 30A). Releasing the pin allows an internal 1.2A current source to charge up the external timing capacitor CSS. If RUN/SS has been pulled all the way to ground, there is a delay before starting of about: U tDELAY = 1.5V C SS = 1.3s/F C SS 1.2A W UU ( ) When the voltage on RUN/SS reaches 1.5V, the LTC3713 begins operating with a clamp on ITH of approximately 0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH is raised until its full 2.4V range is available. This takes an additional 1.3s/F, during which the maximum load current is reduced. During start-up the maximum load current is reduced until either the RUN/SS pin rises to 3V or the output reaches 75% of its final value. The pin can be driven from logic as shown in Figure 6. Diode D1 reduces the start delay while allowing CSS to charge up slowly for the softstart function. After the controller has been started and given adequate time to charge up the output capacitor, CSS is used as a short-circuit timer. After the RUN/SS pin charges above 4V, if the output voltage falls below 75% of its regulated value, then a short-circuit fault is assumed. A 1.8A current then begins discharging CSS. If the fault condition persists until the RUN/SS pin drops to 3.5V, then the controller turns off both power MOSFETs, shutting down the converter permanently. The RUN/SS pin must be actively pulled down to ground in order to restart operation. The overcurrent protection timer requires that the softstart timing capacitor CSS be made large enough to guarantee that the output is in regulation by the time CSS has reached the 4V threshold. In general, this will depend upon the size of the output capacitance, output voltage and load current characteristic. A minimum soft-start capacitor can INTVCC RSS* RUN/SS RSS* D2* RUN/SS 3.3V OR 5V D1 CSS CSS 3713 F06 *OPTIONAL TO OVERRIDE OVERCURRENT LATCHOFF (6a) (6b) Figure 6. RUN/SS Pin Interfacing with Latchoff Defeated 3713fa 15 LTC3713 APPLICATIO S I FOR ATIO be estimated from: CSS > COUT * VOUT * RSENSE (10 - 4 [F/V s]) Generally 0.1F is more than sufficient. Overcurrent latchoff operation is not always needed or desired. Load current is already limited during a shortcircuit by the current foldback circuitry and latchoff operation can prove annoying during troubleshooting. The feature can be overridden by adding a pull-up current greater than 5A to the RUN/SS pin. The additional current prevents the discharge of CSS during a fault and also shortens the soft-start period. Using a resistor to V IN as shown in Figure 6a is simple, but slightly increases shutdown current. Connecting a resistor to INTV CC as shown in Figure 6b eliminates the additional shutdown current, but requires a diode to isolate CSS. Any pull-up network must be able to pull RUN/SS above the 4.2V maximum threshold of the latchoff circuit and overcome the 4A maximum discharge current. INTVCC Supply The 5V supply that powers the drivers and internal circuitry within the LTC3713 can be supplied by either an internal P-channel low dropout regulator if VIN is greater than 5V or the internal boost regulator if VIN is less than 5V. The INTVCC pin can supply up to 50mA RMS and must be bypassed to ground with a minimum of 4.7F tantalum or other low ESR capacitor. Good bypassing is necessary to supply the high transient currents required by the MOSFET gate drivers. Applications using large MOSFETs with a high input voltage and high frequency of operation may cause the LTC3713 to exceed its maximum junction temperature rating or RMS current rating. In continuous mode operation, this current is IGATECHG = f(Qg(TOP) + Qg(BOT)). The junction temperature can be estimated from the equations given in Note 2 of the Electrical Characteristics. Inductor Selection for Boost Converter For the boost converter, the inductance should be 4.7H for input voltages less then 3.3V and 10H for inputs above 3.3V. The inductor should have a saturation current rating of approximately 0.5A or greater. A guide for selecting an inductor for the boost converter is to choose a ripple current that is 40% of the current supplied by the boost 16 U converter. To ensure that the ripple current doesn't exceed a specified amount, the inductance can be chosen according to the following equation: VIN2(MAX) VIN2(MIN) 1 - VOUT (BOOST) L= I * f W UU Diode D3 Selection A Schottky diode is recommended for use in the boost converter section. The Motorola MBR0520 is a very good choice. Boost Converter Output Capacitor Because the LTC3713's boost converter is internally compensated, loop stability must be carefully considered when choosing its output capacitor. Small, low cost tantalum capacitors have some ESR, which aids stability. However, ceramic capacitors are becoming more popular, having attractive characteristics such as near-zero ESR, small size and reasonable cost. Simply replacing a tantalum output capacitor with a ceramic unit will decrease the phase margin, in some cases to unacceptable levels. With the addition of a phase-lead capacitor and isolating resistor, the boost converter portion of the LTC3713 can be used successfully with ceramic output capacitors. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in the circuit produce losses, four main sources account for most of the losses in LTC3713 circuits: 1. DC I2R losses. These arise from the resistances of the MOSFETs, inductor and PC board traces and cause the efficiency to drop at high output currents. In continuous mode the average output current flows through L, but is chopped between the top and bottom MOSFETs. If the two MOSFETs have approximately the same RDS(ON), then the resistance of one MOSFET can simply be summed with the resistances of L and the board traces to obtain the DC I2R 3713fa LTC3713 APPLICATIO S I FOR ATIO loss. For example, if RDS(ON) = 0.01 and RL = 0.005, the loss will range from 1% up to 10% as the output current varies from 1A to 10A for a 1.5V output. 2. Transition loss. This loss arises from the brief amount of time the top MOSFET spends in the saturated region during switch node transitions. It depends upon the input voltage, load current, driver strength and MOSFET capacitance, among other factors. The loss is significant at input voltages above 20V and can be estimated from: Transition Loss (1.7A-1) VIN2 IOUT CRSS f 3. INTVCC current. This is the sum of the MOSFET driver and control currents. 4. CIN loss. The input capacitor has the difficult job of filtering the large RMS input current to the regulator. It must have a very low ESR to minimize the AC I2R loss and sufficient capacitance to prevent the RMS current from causing additional upstream losses in fuses or batteries. Other losses, including COUT ESR loss, Schottky diode D1 conduction loss during dead time and inductor core loss generally account for less than 2% additional loss. When making adjustments to improve efficiency, the input current is the best indicator of changes in efficiency. If you make a change and the input current decreases, then the efficiency has increased. If there is no change in input current, then there is no change in efficiency. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ILOAD (ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The ITH pin external components shown in Figure 1 will provide adequate compensation for most applications. For a detailed explanation of switching control loop theory see Application Note 76. U Design Example As a design example, take a supply with the following specifications: VIN = 1.8V to 3.3V, VOUT = 1.25V 100mV, IOUT(MAX) = 6A, f = 300kHz. First, calculate the timing resistor with VON = VOUT: RON = (2.5V - 0.7V) = 240k (2.5V)(300kHz)(10pF ) W UU Next, use a standard value of 237k and choose the inductor for about 40% ripple current at the maximum VIN: L= 1.25V 1.25V 1- = 1.08H (300kHz)(0.4)(6A) 3.3V Selecting a standard value of 1H results in a maximum ripple current of: IL = 1.25V 1.25V 1- = 2.6A (300kHz)(1H) 3.3V Next, choose the synchronous MOSFET switch. Choosing an IRF7811A (RDS(ON) = 0.013, CRSS = 60pF, JA = 50C/W) yields a nominal sense voltage of: VSNS(NOM) = (6A)(1.3)(0.013) = 101.4mV Tying VRNG to 1V will set the current sense voltage range for a nominal value of 100mV with current limit occurring at 133mV. To check if the current limit is acceptable, assume a junction temperature of about 10C above a 50C ambient with 60C = 1.15: ILIMIT 133mV 1 + (2.6A) = 10.2A (1.15)(0.013) 2 and double check the assumed TJ in the MOSFET: PBOT 3.3V - 1.25V 10.2A = (1.15)(0.013) 3.3V 2 = 0.24 W 2 TJ = 50C + (0.24W)(50C/W) = 62C Now check the power dissipation of the top MOSFET at current limit with 80C = 1.3: 3713fa 17 LTC3713 APPLICATIO S I FOR ATIO PTOP 1.25V 10.2A = 3.3V = 0.68W ) (1.3)(0.013) 2 + (1.7)(3.3V )(10.2A ) (60pF )(300kHz ) 2 ( TJ = 50C + (0.68W)(50C/W) = 84C CIN is chosen for an RMS current rating of about 6A at temperature. The output capacitors are chosen for a low ESR of 0.005 to minimize output voltage changes due to inductor ripple current and load steps. The ripple voltage will be only: VOUT(RIPPLE) = IL(MAX) (ESR) = (2.6A) (0.005) = 13mV RPG 100k CSS 0.1F 1 2 3 RR1 10k RR2 39.2k 4 5 RC 20k 6 C2 100pF 7 RON 237k 8 9 RUN/SS VON PGOOD VRNG FCB ITH BOOST TG SW1 SENSE + SENSE - 24 23 22 21 20 19 18 17 16 15 14 13 CIN2 4.7F D3 MBR0520 PGOOD C1 680pF PGND1 LTC3713 BG SGND1 ION VFB1 SHDN SGND2 VFB2 RF4 37.4k CF4 1000pF INTVCC VIN1 VIN2 PGND2 SW2 RF2 5.6k RF1 10k 10 11 12 RF3 12.1k RF5 10k Figure 7. Design Example: 1.25V/6A at 300kHz from 1.8V to 3.3V 3713fa 18 U However, a 0A to 6A load step will cause an output change of up to: VOUT(STEP) = ILOAD (ESR) = (6A) (0.005) = 30mV The inductor for the boost converter is selected by first choosing an allowable ripple current. The boost converter will be operating in discontinous mode. If we select a ripple current of 170mA for the boost converter, then: 3.3V 3.3V 1 - 5V (170mA)(1.4MHz) L= = 4.7H W UU The complete circuit is shown in Figure 7. DB CMDSH-3 CB 0.33F CIN 22F x2 VIN 1.8V TO 3.3V M1 IRF7811A L1 1H + M2 IRF7811A D2 B340A VOUT 1.25V 6A COUT 270F x2 CVCC 10F 6V X5R 3713 F07 L2 4.7H CIN: TAIYO YUDEN JMK325BJ226MM CIN2: TAIYO YUDEN JMK212BJ475M6 CVCC: TAIYO YUDEN JMK316BJ106ML COUT: PANASONIC EEFUEDD271R L1: TOKO D104C-1H L2: PANASONIC ELJPC4R7MF LTC3713 APPLICATIO S I FOR ATIO PC Board Layout Checklist When laying out a PC board follow one of the two suggested approaches. The simple PC board layout requires a dedicated ground plane layer. Also, for higher currents, it is recommended to use a multilayer board to help with heat sinking power components. * The ground plane layer should not have any traces and it should be as close as possible to the layer with power MOSFETs. * Place CIN, COUT, MOSFETs, D1 and inductor all in one compact area. It may help to have some components on the bottom side of the board. * Place LTC3713 chip with Pins 13 to 24 facing the power components. Keep the components connected to Pins 1 to 12 close to LTC3713 (noise sensitive components). * Use an immediate via to connect the components to ground plane including SGND and PGND of LTC3713. Use several bigger vias for power components. * Use a compact plane for switch node (SW) to improve cooling of the MOSFETs and to keep EMI down. * Use planes for VIN and VOUT to maintain good voltage filtering and to keep power losses low. CSS 1 2 3 4 5 C1 RC C2 RON RF2 9 RF1 10 11 12 RF5 6 7 8 RUN/SS VON PGOOD VRNG FCB ITH BOOST TG SW1 SENSE + SENSE - PGND1 LTC3713 BG SGND1 ION VFB1 SHDN SGND2 VFB2 RF4 INTVCC VIN1 VIN2 PGND2 SW2 RF3 Figure 8. LTC3713 Layout Diagram 3713fa U * Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power component. You can connect the copper areas to any DC net (VIN, VOUT, GND or to any other DC rail in your system). When laying out a printed circuit board, without a ground plane, use the following checklist to ensure proper operation of the controller. These items are also illustrated in Figure 8. * Segregate the signal and power grounds. All small signal components should return to the SGND pin at one point which is then tied to the PGND pin close to the source of M2. * Place M2 as close to the controller as possible, keeping the PGND, BG and SW traces short. * Connect the input capacitor(s) CIN close to the power MOSFETs. This capacitor carries the MOSFET AC current. * Keep the high dV/dt SW, BOOST and TG nodes away from sensitive small-signal nodes. * Connect the INTVCC decoupling capacitor CVCC closely to the INTVCC and PGND pins. * Connect the top driver boost capacitor CB closely to the BOOST and SW pins. + CB M1 DB L1 VOUT CIN VIN 24 23 22 21 20 19 18 17 16 15 3713 F08 W UU COUT M2 D2 CVCC - 14 13 CIN2 L2 D3 BOLD LINES INDICATE HIGH CURRENT PATHS 19 LTC3713 TYPICAL APPLICATIO S 1.25V/6A Bus Terminator RPG 100k CSS 0.1F 1 2 3 4 5 RUN/SS VON PGOOD VRNG FCB ITH BOOST TG SW1 SENSE + SENSE - 24 23 22 21 20 19 18 17 16 15 14 13 CIN2 4.7F XR5 6.3V D3 MBR0520 PGOOD C1 680pF RC 20k C2 100pF 7 RON 330k RF2 5.6k RF1 10k 8 9 10 11 12 RF3 12.1k RF5 10k 20 U 6 DB CMDSH-3 CB 0.33F D1 B340A M1 IRF7811A + CIN1A 22F X5R 6.3V x2 VIN 2.5V TO 3.3V CIN1B 330F L1 1.8H PGND1 LTC3713 BG SGND1 ION VFB1 SHDN SGND2 VFB2 RF4 37.4k CF4 1000pF INTVCC VIN1 VIN2 PGND2 SW2 + CVCC 10F 6.3V X5R M2 IRF7811A R8 1.15k R7 68 D2 B340A COUT 270F x2 VOUT 1.25V 6A 3713 TA01 L2 4.7H CINIA: TAIYO YUDEN JMK325BJ226MM CINIB: AVX TSPE337K010R0060 CIN2: TAIYO YUDEN JMK212BJ475MG CVCC: TAIYO YUDEN JMK316BJ106ML COUT: PANASONIC EEFUEOD271R L1: TOKO D104C-1.8H L2: PANASONIC ELJPC4R7MF 3713fa LTC3713 TYPICAL APPLICATIO S One-Half VIN/6A Bus Terminator RPG 100k PGOOD R1 10k R2 10k R3 5k + LT1738 D3 MBR0520 C2 100pF RF2 10k - C1 330pF RF1 1.62k RF3 12.1k U CSS 0.1F 1 2 3 4 5 6 7 8 RON 330k 9 10 11 12 RF5 10k RUN/SS VON PGOOD VRNG FCB ITH BOOST TG SW1 SENSE + SENSE - 24 23 22 21 20 19 18 17 16 15 14 13 DB CMDSH-3 CB 0.33F CINA 22F X5R 6.3V, x3 + VIN CINB 1.8V TO 3.3V 470F x2 M1 IRF7811A D2 B340A L1 1H VOUT 0.9V TO 1.65V 6A PGND1 LTC3713 BG SGND1 ION VFB1 SHDN SGND2 VFB2 RF4 37.4k CF4 1000pF INTVCC VIN1 VIN2 PGND2 SW2 M2 IRF7811A R8 4.7k R7 68 D1 B340A + COUT 470F x2 CIN2, 4.7F X5R, 6.3V L2 4.7H CVCC1 D3 10F X5R MBR0520 6.3V 3713 TA04 CINA: TAIYO YUDEN JMK325BJ226MM CINB: SANYO POSCAP 4TPB470M CIN2: TAIYO YUDEN JMK212BJ475MG CVCC1: TAIYO YUDEN JMK316BJ106ML COUT: SANYO POSCAP 4TPB470M L1: TOKO D104C-1H L2: PANASONIC ELJPC4R7MF 3713fa 21 LTC3713 TYPICAL APPLICATIO S Dual Output 1.25V/10A Buck Converter and 5V to 12V/130mA Boost Converter RPG 100k CSS 0.1F 1 2 3 4 RUN/SS VON PGOOD VRNG FCB ITH BOOST TG SW1 SENSE + SENSE - PGOOD C1 680pF RC 20k C2 100pF 7 RON 330k RF2 5.6k RF1 10k 8 9 10 11 12 RF3 12.3k RF5 10k CINIA, CIN2: TAIYO YUDEN JMK325BJ226MM CINIB: AVX TSPE337K010R0060 COUT1: PANASONIC EEFUEOD271R COUT2: TAIYO YUDEN EMK316BJ475ML CVCC: TAIYO YUDEN JMK212BJ475MG L1: TOKO D104C-1.8H L2: PANASONIC ELJPC4R7MF 22 U RF 1 24 23 22 21 20 19 1 18 17 16 15 14 13 CIN2 22F X5R 10V DB CMDSH-3 CB 0.33F CINIA 22F X5R 6.3V x2 VIN1 5V TO 24V M1 IRF7811A 5 6 L1 1.8H PGND1 LTC3713 BG SGND1 ION VFB1 SHDN SGND2 VFB2 RF4 107k CF4 200pF INTVCC VIN1 VIN2 PGND2 SW2 + M2 IRF7811A x2 CF 0.1F D2 B340A COUT1 270F x2 VOUT1 1.25V 10A CVCC 4.7F X5R 6.3V L2 D3 10H MBR0520 COUT2 4.7F X5R 16V VIN2 5V VOUT2 12V 130mA 3713 TA02 3713fa LTC3713 PACKAGE DESCRIPTIO 7.8 - 8.2 0.42 0.03 RECOMMENDED SOLDER PAD LAYOUT 5.00 - 5.60** (.197 - .221) 0.09 - 0.25 (.0035 - .010) 0.55 - 0.95 (.022 - .037) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U G Package 24-Lead Plastic SSOP (5.3mm) (Reference LTC DWG # 05-08-1640) 1.25 0.12 7.90 - 8.50* (.311 - .335) 24 23 22 21 20 19 18 17 16 15 14 13 5.3 - 5.7 7.40 - 8.20 (.291 - .323) 0.65 BSC 1 2 3 4 5 6 7 8 9 10 11 12 2.0 (.079) 0 - 8 0.65 (.0256) BSC 0.22 - 0.38 (.009 - .015) 0.05 (.002) G24 SSOP 0802 3713fa 23 LTC3713 TYPICAL APPLICATIO RPG 100k PGOOD RF2 52.5k + RF1 10k R2 52.5k RC3 20k LTC1789 6 7 RON 330k 8 9 R1 10k 10 11 12 RF5 RF3 10k 12.1k - CC2 150pF RC2 47.5k RELATED PARTS PART NUMBER LT 1613 LTC1649 LTC1735 LTC1772 LTC1773 LTC1778 LTC1876 LTC3711 LTC3718 LTC3778 (R) DESCRIPTION ThinSOT Step-Up DC/DC Converter High Power Synchronous Step-Down Controller High Efficiency Synchronous Switching Regulator ThinSOT Current Mode Step-Down Controller Synchronous Current Mode Step-Down Controller No RSENSE Synchronous Step-Down Controller TM 2-Phase, Dual Synchronous Step-Down Controller with Step-Up Regulator 2.6V VIN 36V, Dual Output: 0.8V VOUT (0.9)VIN 5-Bit, Adjustable, No RSENSE Synchronous Step-Down Controller Low VIN DDR Memory and SSTL Termination Power Supply No RSENSE Synchronous Step-Down Controller 0.925V VOUT 2V, 4V VIN 36V 1.5V VIN 3.3V, VOUT = 1/2 VIN, VOUT Tracks VIN 0.6V VOUT (Termination Voltage) Optional Sense Resistor, 4V VIN 36V, 0.6V VOUT VIN 3713fa LT/TP 1002 1K REV A * PRINTED IN USA ThinSOT is a trademark of Linear Technology Corporation. 24 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q U 3.3V to 5V Synchronous Boost Converter CSS 0.1F 1 2 3 4 5 RUN/SS VON PGOOD VRNG FCB ITH BOOST TG SW1 SENSE + SENSE - 24 23 22 21 20 19 18 17 16 15 14 13 D2 MBR0520 3713 TA03 DB CMDSH-3 CB 0.33F L1 1.8H CINIA 22F x2 M1 IRF7811A D1 B340A + VIN 3.3V CINIB 330F VOUT 5V 2A COUT1 470F + PGND1 LTC3713 BG SGND1 ION VFB1 SHDN SGND2 VFB2 RF4 37.4k CF4 1000pF INTVCC VIN1 VIN2 PGND2 SW2 CVCC 4.7F 6V X5R M2 IRF7811A x2 CIN2 4.7F L2 4.7H COUT2 10F X7R 10V CINIA: TAIYO YUDEN JMK325BJ226MM CINIB: AVX TSPE337K010R0060 CIN2, CVCC: TAIYO YUDEN JMK212BJ475MG COUT1: SANYO POSCAP 4TPB470M COUT2: TAIYO YUDEN LMK325BJ106MN L1: TOKO D104C-1.8H L2: PANASONIC ELJPC4R7MF COMMENTS 1.4MHz, 1.1V < VIN < 10V 3.3V Input, 1.265V VOUT 2.xV, IOUT Up to 20A 4V VIN 36V, 0.8V VOUT 6V, SSOP-16 Small Solution, 2.5V VIN 9.8V, 0.8V VOUT VIN 2.65V VIN 8.5V, 0.8V VOUT VIN, 550kHz Operation, > 90% Efficiency No Sense Resistor Required, 4V VIN 36V, 0.8V VOUT VIN www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2001 |
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