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A/D, D/C Converters for Image Signal Processing MN65752H Low Power 8-Bit, 2-Channel CMOS A/D Converter for Image Processing Overview The MN65752H is an 8-bit, 2-channel CMOS analogto-digital converter for image processing applications. It uses a half flash structure based on chopper comparators and achieves both high speed and low power consumption with multiplexing. It provides separate power supply pins for the circuits driving the low-voltage digital output pins. Pin Assignment Features Maximum conversion rate: 20 MSPS (min.) Linearity error: 0.9 LSB (typ.) Differential linearity error: 0.5 LSB (typ.) Power supply voltage: 3.6 V or 2.6 V Power consumption: 50 mW (typ.) (fCLK=16 MHz) Applications Digital video equipment Digital image processing equipment VRBSA VRBA DVDD DVSS NPOWDA DVSS TEST1 TEST2 DA0 DA1 DA2 DA3 Digital television receivers 1 2 3 4 5 6 7 8 9 10 11 12 VRTSB VRTB AVDD VINB AVSS AVDD AVSS AVSS VINA AVDD VRTA VRTSA 37 38 39 40 41 42 43 44 45 46 47 48 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 VRBSO VRBB DVDD DVSS NPOWDB DVSS CLK NOE DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DVDD DVDDL DVDDL DVDD DA7 DA6 DA5 DA4 (TOP VIEW) QFH048-P-0707 1 2 VINA AVDD AVSS AVSS AVSS VRTB AVDD AVDD VRTA VINB VRTSB MN65752H VRTSA 47 46 45 44 43 42 41 40 39 38 37 36 Encoder (4 bits) 35 34 DVDD 33 32 31 30 Lower comparator (4 bits) Lower comparator (4 bits) 29 Encoder (4 bits) Encoder (4 bits) 28 27 26 (Channel A) (Channel B) 25 DB5 DB4 NOE DB7(MSB) DB6 DVSS NPOWDB DVSS CLK Encoder (4 bits) VRBSB VRBB Block Diagram 48 VRBSA 1 VRBA Upper comparator (4 bits) Upper comparator (4 bits) 2 DVDD 3 DVSS 4 Clock generator Clock generator Data latch Data latch NPOWDA Reference resistor Reference resistor 5 6 DVSS TEST1 7 TEST2 8 (LSB)DA0 9 DA1 10 DA2 11 DA3 12 A/D, D/C Converters for Image Signal Processing 13 DA5 DA6 DA7(MSB) 14 15 16 17 18 19 20 21 22 DB1 23 DB2 24 DB3 DVDD DVDD DVDD DVDD DA4 DB0(LSB) A/D, D/C Converters for Image Signal Processing Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Symbol VRBSA VRBA DVDD DVSS NPOWDA DVSS TEST1 TEST2 DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7 DVDD DVDDL DVDDL DVDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 NOE CLK DVSS NPOWDB DVSS DVDD VRBB VRBSB VRTSB VRTB AVDD VINB Function Description Reference voltage power supply (BOTTOM) Reference voltage input (BOTTOM) Power supply for digital circuits Ground for digital circuits Power down mode selection Ground for digital circuits Test mode selection Test mode selection Digital code output (LSB) Digital code output Digital code output Digital code output Digital code output Digital code output Digital code output Digital code output (MSB) Power supply for digital circuits Power supply for low-voltage digital outputs Power supply for low-voltage digital outputs Power supply for digital circuits Digital code output (LSB) Digital code output Digital code output Digital code output Digital code output Digital code output Digital code output Digital code output (MSB) Digital output enable Sampling clock Ground for digital circuits Power down mode selection Ground for digital circuits Power supply for digital circuits Reference voltage input (BOTTOM) Reference voltage power supply (BOTTOM) Reference voltage power supply (TOP) Reference voltage input (TOP) Power supply for analog circuits Ground for analog circuits MN65752H 3 MN65752H Pin Descriptions (continued) Pin No. 41 42 43 44 45 46 47 48 Symbol AVSS AVDD AVSS AVSS VINA AVDD VRTA VRTSA A/D, D/C Converters for Image Signal Processing Function Description Ground for analog circuits Power supply for analog circuits Ground for analog circuits Ground for analog circuits Analog signal input Power supply for analog circuits Reference voltage input (TOP) Reference voltage power supply (TOP) Ta=25C Absolute Maximum Ratings Parameter Power supply voltage Symbol VDD DVDDL VI VO Topr Tstg Rating - 0.3 to +7.0 - 0.3 to VDD+0.3 - 0.3 to VDD+0.3 - 0.3 to VDD+0.3 -20 to +70 -55 to +125 Unit V V V V C C Power supply voltage for digital output circuits Input voltage Output voltage Operating ambient temperature Storage temperature Recommended Operating Conditions Parameter Power supply voltage Power supply voltage for digital output circuits Digital input voltage "H" level "L" level "L" level Clock "H" level pulse width "L" level pulse width Analog input voltage VDD=AVDD=DVDD=3.6V, DVDDL=2..6V, VSS=AVSS=DVSS=0V, Ta=25C Symbol VDD DVDDL VIH VIL VRT VRB tWH tWL VAIN min 3.30 2.50 VDD x 0.55 VSS typ 3.60 2.60 max 5.25 5.25 VDD VDD x 0.2 Unit V V V V V V ns ns Reference voltage "H" level 2.80 VSS 20 20 VSS 1.30 VDD VDD V Electrical Characteristics Parameter Power consumption Resolution Linearity error Differential linearity error Maximum conversion rate Clock frequency Analog input dynamic range Output current "H" level "L" level VDD=AVDD=DVDD=3.6V, DVDDL=2.6V, AVSS=DVSS=0V, Ta=25C Symbol Conditions PC fCLK= 16 MSPS (not including reference current) RES EL ED FC(max.) fCLK DR IOH IOL td CI VOH=DVDDL- 0.8V VOL=0.4V CL=20pF fCLK=20MSPS VRT=2.8V, VRB=1.3V min typ 50 8 0.9 0.5 max 90 Unit mW bit 1.8 1.0 20 VRT -VRB -1.5 LSB LSB MSPS MHz V mA mA ns pF 20 1 1.5 1.5 10 25 15 40 Output delay time Analog input capacitance 4 A/D, D/C Converters for Image Signal Processing Timing Chart MN65752H The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital output 2.5 clock cycles later at the rising edge of the clock signal. tWH Clock tWL Analog input N N+1 N-2 td(25ns) N+2 N-1 N+3 N N+4 N+1 Data output N-3 Note: The circles indicate analog signal sampling points. 5 MN65752H Package Dimensions (Unit:mm) QFH048-P-0707 A/D, D/C Converters for Image Signal Processing 9.00.2 7.00.2 36 25 (0.75) 7.00.2 37 24 48 13 1 (0.75) 0.5 12 0.20.1 (1.0) 2.9 max. 2.50.2 +0.10 -0.05 9.00.2 0.15 0.10.1 0.1 SEATING PLANE 0.50.2 0 to 10 6 |
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