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LT5519 0.7GHz to 1.4GHz High Linearity Upconverting Mixer
FEATURES
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DESCRIPTIO
Wide RF Frequency Range: 0.7GHz to 1.4GHz 17.1dBm Typical Input IP3 at 1GHz On-Chip RF Output Transformer On-Chip 50 Matched LO and RF Ports Single-Ended LO and RF Operation Integrated LO Buffer: -5dBm Drive Level Low LO to RF Leakage: - 44dBm Typical Noise Figure: 13.6dB Wide IF Frequency Range: 1MHz to 400MHz Enable Function with Low Off-State Leakage Current Single 5V Supply Small 16-Lead QFN Plastic Package
The LT(R)5519 mixer is designed to meet the high linearity requirements of wireless and cable infrastructure transmission systems. A high speed, internally 50 matched, LO amplifier drives a double-balanced mixer core, allowing the use of a low power, single-ended LO source. An RF output transformer is integrated, thus eliminating the need for external matching components at the RF output, while reducing system cost, component count, board area and system-level variations. The IF port can be easily matched to a broad range of frequencies for use in many different applications. The LT5519 mixer delivers +17.1dBm typical input 3rd order intercept point at 1GHz with IF input signal levels of -10dBm. The input 1dB compression point is typically +5.5dBm. The IC requires only a single 5V supply.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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Wireless Infrastructure Cable Downlink Infrastructure Point-to-Point and Point-to-Multipoint Data Communications High Linearity Frequency Conversion
TYPICAL APPLICATIO
5VDC 1F 1000pF
39nH
10
EN BPF 4:1 IF 33pF IF - 220pF 100
+
VCC1
VCC2
VCC3
POUT, IM3, IM2 (dBm/TONE)
220pF
100
BIAS LT5519
10pF RF + RF -
BPF PA
GND 5pF (OPTIONAL) LO INPUT -5dBm LO+ 85 5pF LO -
5519 F01a
Figure 1. Frequency Conversion in Wireless Infrastructure Transmitter
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RF Output Power, IM3 and IM2 vs IF Input Power (Two Input Tones)
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -16 -12 -4 0 -8 IF INPUT POWER (dBm/TONE) 4
5519 F01b
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POUT
fRF = 1000MHz PLO = -5dBm fLO = 1140MHz fIF1 = 140MHz fIF2 = 141MHz TA = 25C
IM3
IM2
1
LT5519
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW 16 15 14 13 GND 1 IF + 2 IF - 3 GND 4 5 6 7 8 17 12 GND 11 RF + 10 RF - 9 GND
Supply Voltage ....................................................... 5.5V Enable Voltage ............................. -0.3V to (VCC + 0.3V) LO Input Power (Differential) ............................ +10dBm LO+ to LO- Differential DC Voltage .......................... 1V LO+ and LO- DC Common Mode Voltage ...... -1V to VCC IF Input Power (Differential) ............................. +10dBm IF+ and IF - DC Currents ........................................ 25mA RF+ to RF - Differential DC Voltage ...................... 0.13V RF+ and RF - DC Common Mode Voltage ...... -1V to VCC Operating Temperature Range .................-40C to 85C Storage Temperature Range ................. - 65C to 125C Junction Temperature (TJ).................................... 125C
ORDER PART NUMBER LT5519EUF
GND
GND
LO-
LO+
VCC1
VCC2
UF PACKAGE 16-LEAD (4mm x 4mm) PLASTIC QFN TJMAX = 125C, JA = 37C/W EXPOSED PAD (PIN 17) IS GND MUST BE SOLDERED TO PCB
VCC3
UF PART MARKING 5519
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PARAMETER IF Input Frequency Range LO Input Frequency Range RF Output Frequency Range CONDITIONS MIN TYP 1 to 400 300 to 1800 700 to 1400 MAX UNITS MHz MHz MHz
1GHz Application: VCC = 5VDC, EN = High, TA = 25C, IF input = 140MHz at -10dBm, LO input = 1.14GHz at -5dBm, RF output measured at 1GHz, unless otherwise noted. (Test circuit shown in Figure 2) (Notes 2, 3)
PARAMETER IF Input Return Loss LO Input Return Loss RF Output Return Loss LO Input Power Conversion Gain Input 3rd Order Intercept Input 2nd Order Intercept LO to RF Leakage LO to IF Leakage Input 1dB Compression IF Common Mode Voltage Noise Figure Internally Biased Single-Side Band -10dBm/Tone, f = 1MHz -10dBm, Single Tone CONDITIONS ZO = 50, with External Matching ZO = 50 ZO = 50 MIN TYP 20 17 20 -10 to 0 -0.6 17.1 48 -44 -40 5.5 1.77 13.6 MAX UNITS dB dB dB dBm dB dBm dBm dBm dBm dBm VDC dB
EN
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LT5519
DC ELECTRICAL CHARACTERISTICS
(Test Circuit Shown in Figure 2) VCC = 5VDC, EN = High, TA = 25C, unless otherwise noted. (Note 3)
PARAMETER Enable (EN) Low = OFF, High = ON Turn-On Time (Note 4) Turn-Off Time (Note 4) Input Current Enable = High (ON) Enable = Low (OFF) Power Supply Requirements (VCC) Supply Voltage Supply Current Shutdown Current VCC = 5VDC EN = Low 4.5 to 5.25 60 1 70 100 VDC mA A VENABLE = 5VDC 3 0.5 2 6 1 10 s s A VDC VDC CONDITIONS MIN TYP MAX UNITS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: External components on the final test circuit are optimized for operation at fRF = 1GHz, fLO = 1.14GHz and fIF = 140MHz.
Note 3: Specifications over the -40C to 85C temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: Turn-On and Turn-Off times are based on the rise and fall times of the RF output envelope from -40dBm to full power with an IF input power of -10dBm.
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
66 64 TA = 85C TA = 25C
SUPPLY CURRENT (mA)
62 60 58 56 54 52 50 4 4.25
SHUTDOWN CURRENT (A)
UW
4.5
(Test Circuit Shown in Figure 2) Shutdown Current vs Supply Voltage
1.2 1.0 0.8 TA = 85C 0.6 0.4 0.2 0
5 5.25 4.75 SUPPLY VOLTAGE (V) 5.5
5519 G01
TA = -40C
TA = -40C TA = 25C 4 4.25 4.5 4.75 5 SUPPLY VOLTAGE (V) 5.25 5.5
5519 G02
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LT5519 TYPICAL PERFOR A CE CHARACTERISTICS
VCC = 5VDC, EN = High, TA = 25C, IF input = 140MHz at -10dBm, LO input = 1.14GHz at -5dBm, RF output measured at 1000MHz, unless otherwise noted. For 2-tone inputs: 2nd IF input = 141MHz at -10dBm. (Test Circuit Shown in Figure 2.) Conversion Gain and SSB Noise Figure vs RF Output Frequency
18 16 14 12 GAIN, NF (dB) 10 8 6 4 2 0 -2 -4 -6 500 GAIN LOW SIDE AND HIGH SIDE LO 700 1100 1300 900 RF OUTPUT FREQUENCY (MHz) 1500
5519 G03
HIGH SIDE LO LOW SIDE LO NF
21
40
LO LEAKAGE (dBm)
IIP3 (dBm)
Conversion Gain and SSB Noise Figure vs LO Input Power
16 14 12 10 TA = 85C TA = 25C NF 20 18 16 14
19 IIP3 (dBm) NF (dB) 18 IIP3 17 TA = -40C 16 TA = 85C 15 -16 TA = 25C
40 IIP2 (dBm) 30 20 10 0 -12 -8 -4 0 LO INPUT POWER (dBm) 4
5519 G07
LO LEAKAGE (dBm)
GAIN (dB)
8 6 4 2 0 -2 -4 -16 GAIN
TA = -40C
TA = 25C
TA = -40C
TA = 85C -12 -6 -4 -8 LO INPUT POWER (dBm) -2
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IIP3 and IIP2 vs LO Input Power
21 LOW SIDE LO 20 HIGH SIDE LO 19 40 IIP2 60 50 10 0 -10
POUT, IM3 (dBm/TONE)
-20 -30 -40 -50 -60 -70 -80 IM3
POUT, IM2 (dBm/TONE)
IIP3 (dBm)
18 IIP3 17 LOW SIDE LO 16 15 -16 HIGH SIDE LO
-12
-8 -4 0 LO INPUT POWER (dBm)
4
UW
12 10 8 6 4 2 0 4
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IIP3 and IIP2 vs RF Output Frequency
25 23 HIGH SIDE LO IIP2 LOW SIDE LO 60 50
-10
LO-RF Leakage vs RF Output Frequency
-20
IIP2 (dBm)
-30 HIGH SIDE LO
19 17 15 13 500 IIP3 HIGH SIDE LO
30 20 LOW SIDE LO 10 0 1500
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-40
LOW SIDE LO -50
700 900 1100 1300 RF OUTPUT FREQUENCY (MHz)
-60 500
700 1100 1300 900 RF OUTPUT FREQUENCY (MHz)
1500
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IIP3 and IIP2 vs LO Input Power
21 TA = -40C 20 TA = 85C TA = 25C IIP2 -20 -30 50 60 0 -10
LO-RF Leakage vs LO Input Power
TA = 85C -40 -50 -60 -16 TA = 25C TA = -40C
-12
-8 -4 0 LO INPUT POWER (dBm)
4
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RF Output Power and Output IM3 vs IF Input Power (Two Input Tones)
10 POUT TA = -40C TA = 85C TA = 25C TA = -40C TA = 85C TA = 25C 0 -10 -20 -30 -40 -50 -60 -70 -80 -12 -4 0 -8 IF INPUT POWER (dBm/TONE) 4
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RF Output Power and Output IM2 vs IF Input Power (Two Input Tones)
POUT TA = -40C TA = 85C TA = 25C
IIP2 (dBm)
30 20 10 0
TA = -40C IM2 TA = 85C TA = 25C
-90 -16
-90 -16
-12 -4 0 -8 IF INPUT POWER (dBm/TONE)
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LT5519 TYPICAL PERFOR A CE CHARACTERISTICS
VCC = 5VDC, EN = High, TA = 25C, IF input = 140MHz at -10dBm, LO input = 1.14GHz at -5dBm, RF output measured at 1000MHz, unless otherwise noted. For 2-tone inputs: 2nd IF input = 141MHz at -10dBm. (Test Circuit Shown in Figure 2.) Conversion Gain vs IF Input Power (One Input Tone)
4 3 2 1
GAIN (dB) -5 8 HIGH SIDE LO IIP2 40 30 HIGH SIDE LO LOW SIDE LO GAIN LOW SIDE AND HIGH SIDE LO 4.5 4.75 5 SUPPLY VOLTAGE (V) 5.25 0 5.5 IIP3 20 10
IIP3, IIP2 (dBm)
TA = -40C RETURN LOSS (dB)
-10
GAIN (dB)
0 -1 -2 -3 -4 -5 -6 -16 -12
TA = 25C TA = 85C
-4 0 -8 IF INPUT POWER (dBm)
PI FU CTIO S
GND (Pins 1, 4, 9, 12, 13, 16): Internal Grounds. These pins are used to improve isolation and are not intended as DC or RF grounds for the IC. Connect these pins to low impedance grounds on the PCB for best performance. IF+, IF - (Pins 2, 3): Differential IF Signal Inputs. A differential signal must be applied to these pins through DC blocking capacitors. The pins must be connected to ground with 100 resistors (the grounds must each be capable of sinking about 18mA). For best LO leakage performance, these pins should be DC isolated from each other. An impedance transformation is required to match the IF input to the desired source impedance (typically 50 or 75). EN (Pin 5): Enable Pin. When the applied voltage is greater than 3V, the IC is enabled. When the applied voltage is less than 0.5V, the IC is disabled and the DC current drops to about 1A. VCC1 (Pin 6): Power Supply Pin for the Bias Circuits. Typical current consumption is about 2mA. This pin should be externally connected to VCC and have appropriate RF bypass capacitors. VCC2 (Pin 7): Power Supply Pin for the LO Buffer Circuits. Typical current consumption is about 22mA. This pin should have appropriate RF bypass capacitors as shown in Figure 2. The 1000pF capacitor should be located as close to the pins as possible. VCC3 (Pin 8): Power Supply Pin for the Internal Mixer. Typical current consumption is about 36mA. This pin should be externally connected to VCC through an inductor. A 39nH inductor is shown in Figure 2, though the value is not critical. RF -, RF+ (Pins 10, 11): Differential RF Outputs. One pin may be DC connected to a low impedance ground to realize a 50 single-ended output. No external matching components are required. A DC voltage should not be applied across these pins, as they are internally connected through a transformer winding. LO+, LO - (Pins 14, 15): Differential Local Oscillator Inputs. The LT5519 works well with a single-ended source driving the LO+ pin and the LO- pin connected to a low impedance ground. No external 50 matching components are required. An internal resistor is connected across these pins; therefore, a DC voltage should not be applied across the inputs. Exposed Pad (Pin 17): DC and RF ground return for the entire IC. This must be soldered to the printed circuit board low impedance ground plane.
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IF, LO and RF Port Return Loss vs Frequency
0 10
Conversion Gain, IIP3 and IIP2 vs Supply Voltage
LOW SIDE LO 60 50
6 4 2 RF PORT 0 -2 0 500 1000 1500 FREQUENCY (MHz) 2000
5519 G13
-15 -20 -25 -30 LO PORT IF PORT
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4.25
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LT5519
BLOCK DIAGRA W
EXPOSED GND PAD 17 12 GND 13 5pF LO+ 14 85 LO - 15 5pF BIAS GND 16 7 VCC2 1 GND 2 IF + 3 IF - 4 GND 5 EN
5519 BD
RF + 11
RF - 10
GND 9
HIGH SPEED LO BUFFER DOUBLEBALANCED MIXER
8 VCC3 10pF
6 VCC1
TEST CIRCUIT
LOIN 1140MHz 16 GND GND 2 C2 4 R2 C3 3 4 IF - GND EN 5 0.018" 0.062" 0.018" DC GND ER = 4.4 RF GND EN VCC C5 C4
5519 F02
1 IFIN 140MHz 1 2 3 T1 5 C1 R1
15 LO -
14 13 LO+ GND GND RF +
12 11 RFOUT 1000MHz
IF + LT5519
RF - GND VCC1 6 VCC2 7 VCC3 8 L1
10 9 17
REF DES C1, C2 C3 C4 C5 L1 R1, R2 T1
VALUE 220pF 33pF 1000pF 1F 39nH 100, 0.1% 4:1
SIZE 0402 0402 0402 0603 0402 0603 SM-22
PART NUMBER AVX 04023C221KAT2A AVX 04023A330KAT2A AVX 04023A102KAT2A Taiyo Yuden LMK107BJ105MA Toko LL1005-FH39NJ IRC PFC-W0603R-03-10R1-B M/A-COM ETC4-1-2
Figure 2. Test Schematic for the LT5519
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LT5519
APPLICATIO S I FOR ATIO
The LT5519 consists of a double-balanced mixer, a high performance LO buffer and bias/enable circuits. The RF and LO ports may be driven differentially; however, they are intended to be used in single-ended mode by connecting one input of each pair to ground. The IF input ports must be DC-isolated from the source and driven differentially. The IF input should be impedance-matched for the desired input frequency. The LO input has an internal broadband 50 match with return loss better than 10dB at frequencies up to 1800MHz. The RF output band ranges from 700MHz to 1400MHz, with an internal RF transformer providing a 50 impedance match across the band. Low side or high side LO injection can be used. IF Input Port The IF inputs are connected to the emitters of the doublebalanced mixer transistors, as shown in Figure 3. These pins are internally biased and an external resistor must be connected from each IF pin to ground to set the current through the mixer core. The circuit has been optimized to work with 100 resistors, which will result in approximately 18mA of DC current per side. For best LO leakage performance, the resistors should be well matched; thus resistors with 0.1% tolerance are recommended. If LO leakage is not a concern, then lesser tolerance resistors can be used. The symmetry of the layout is also important for achieving optimum LO isolation. The capacitors shown in Figure 3, C1 and C2, serve two purposes. They provide DC isolation between the IF+ and IF - ports, thus preventing DC interactions that could cause unpredictable variations in LO leakage. They also
C1 IFIN 50 T1 4:1 C3 C2
100 0.1% 2
LT5519 18mA IF+ VCC IF - 18mA
5519 F03
3 100 0.1%
Figure 3. IF Input with External Matching
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improve the impedance match by canceling excess inductance in the package and transformer. The input capacitor value required to realize an impedance match at desired frequency, f, can be estimated as follows: C1 = C2 = 1 (2f)2 (LIN + LEXT ) where; f is in units of Hz, LIN and LEXT are in Henry, and C1, C2 are in Farad. LIN is the differential input inductance of the LT5519, and is approximately 1.67nH. LEXT represents the combined inductances of differential external components and transmission lines. For the evaluation board shown in Figure 10, LEXT = 4.21nH. Thus, for f = 140MHz, the above formula gives C1 = C2 = 220pF. Table 1 lists the differential IF input impedance and reflection coefficient for several frequencies. A 4:1 balun can be used to transform the impedance up to about 50.
Table 1. IF Input Differential Impedance
FREQUENCY (MHz) 10 44 70 140 170 240 360 500 DIFFERENTIAL INPUT IMPEDANCE 10.1 + j0.117 10.1 + j0.476 10.1 + j0.751 10.2 + j1.47 10.2 + j1.78 10.2 + j2.53 10.2 + j3.81 10.2 + j5.31 DIFFERENTIAL S11 MAG ANGLE 0.663 0.663 0.663 0.663 0.663 0.663 0.663 0.663 180 179 178 177 176 174 171 167
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LO Input Port The simplified circuit for the LO buffer input is shown in Figure 4. The LO buffer amplifier consists of high speed limiting differential amplifiers, optimized to drive the mixer quad for high linearity. The LO + and LO - ports can be driven differentially; however, they are intended to be driven by a single-ended source. An internal resistor connected across the LO + and LO - inputs provides a broadband 50 impedance match. Because of the resistive match, a DC voltage at the LO input is not recommended. If the LO signal source output is not AC coupled, then a DC blocking capacitor should be used at the LO input.
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LT5519
APPLICATIO S I FOR ATIO
LOIN 50 LT5519 LO+ 14 5pF
220 VCC 85 220
15
LO -
5pF
5519 F04
Figure 4. LO Input Circuit
Though the LO input is internally matched to 50, there may be some cases, particularly at higher frequencies or with different source impedances, where a further optimized match is desired. Table 2 includes the single-ended input impedance and reflection coefficient vs frequency for the LO input for use in such cases.
Table 2. Single-Ended LO Input Impedance
FREQUENCY (MHz) 200 400 600 800 1000 1200 1400 1600 1800 INPUT IMPEDANCE 72.3 - j16.1 63.3 - j11.3 61.6 - j7.5 61.9 - j6.0 62.7 - j6.1 63.2 - j7.4 63.3 - j9.5 62.8 - j12.0 61.6 - j14.2 S11 MAG 0.223 0.153 0.124 0.119 0.125 0.134 0.144 0.155 0.163 ANGLE -28.4 -34.7 - 29.2 - 23.6 -22.7 -25.5 -30.8 -37.1 -43.4
RF Output Port An internal RF transformer, shown in Figure 5, reduces the mixer-core impedance to provide an impedance of 50 across the RF + and RF - pins. The LT5519 is designed and tested with the outputs configured for single-ended operation, as shown in the Figure 5; however, the outputs can be used differentially as well. A center tap in the transformer provides the DC connection to the mixer core and the transformer provides DC isolation at the RF output. The
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LT5519 RF+ 11 VCC RF- 10pF 8 VCC3 10 RFOUT 50
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Figure 5. RF Output Circuit
RF + and RF - pins are connected together through the secondary windings of the transformer; thus a DC voltage should not be applied across these pins. The impedance data for the RF output, listed in Table 3, can be used to develop matching networks for different load impedances.
Table 3. Single-Ended RF Output Impedance
FREQUENCY (MHz) 700 800 900 1000 1100 1200 1300 1400 OUTPUT IMPEDANCE 27.6 + j32.0 39.7 + j32.1 50.9 + j23.5 53.5 + j10.3 48.3 + j1.3 42.0 - j3.1 36.6 - j3.4 33.0 - j2.0 S11 MAG 0.465 0.354 0.227 0.105 0.022 0.093 0.159 0.207 ANGLE 103 88.1 74.7 65.5 143 -157 -164 -172
Operation at Different Input Frequencies On the evaluation board shown in Figure 10, the input of the LT5519 can be easily matched for different frequencies by changing the capacitors, C1, C2 and C3. Capacitors C1 and C2 set the input matching frequency while C3 improves the LO to RF leakage performance. Decreasing the value of C3 at higher input frequencies reduces its impact on conversion gain. Table 4 lists some actual values used at selected frequencies.
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LT5519
APPLICATIO S I FOR ATIO
Table 4. Input Capacitor Values vs Frequency
FREQUENCY (MHz) 44 70 140 240 300 350 440 CAPACITANCE (C1, C2) (pF) 2200 820 220 68 39 27 18
CAPACITANCE (C3) (pF) 33 33 33 15 6.8 6.8 6.8
The performance was evaluated with the input tuned for each of these frequencies and the results are summarized in Figures 6-8. The same IF input balun transformer was used for all measurements. In each case, the LO input
6 5 4 3 SSB NF HIGH SIDE LO INPUT TUNED FOR EACH TEST FREQUENCY 20 18 16
GAIN (dB)
2 1 0 -1 -2 -3 -4 0 GAIN
LOW SIDE
12 10 8 LOW SIDE 6 4 2 0 500
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LEAKAGE (dBm)
14
VCC = 5V PLO = -5dBm TA = 25C
HIGH SIDE LO
100 300 400 200 INPUT FREQUENCY (MHz)
Figure 6. Conversion Gain and Single Sideband Noise Figure vs Tuned IF Input Frequency
27 25 23 HIGH SIDE INPUT TUNED FOR EACH TEST FREQUENCY LOW SIDE IIP2 50 70 60
IIP3 (dBm)
GAIN (dB)
21 19 17 15 13 0 IIP3 HIGH SIDE LO
40 30 20 LOW SIDE VCC = 5V, TA = 25C PLO = -5dBm 100 400 INPUT FREQUENCY (MHz) 200 300 10 0 500
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Figure 7. IIP3 and IIP2 vs Tuned IF Input Frequency
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frequency was adjusted to maintain an RF output frequency of 1000MHz. Low Frequency Matching of the RF Output Port Without any external components on the RF output, the internal transformer of the LT5519 provides a good 50 impedance match for RF frequencies above approximately 850MHz. Below this frequency, the return loss drops below 10dB and degrades the conversion gain. The addition of a single 10pF capacitor in series with the RF output improves the match at lower RF frequencies, shifting the 10dB return loss point to about 700MHz, as demonstrated in Figure 9. This change also results in an improvement of the conversion gain.
0 INPUT TUNED FOR EACH TEST FREQUENCY VCC = 5V -10 PLO = -5dBm TA = 25C -20 -30 -40 -50 -60 1 100 200 300 400 INPUT FREQUENCY (MHz) 500
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NF (dB)
HIGH SIDE LO LOW SIDE LO
Figure 8. LO to RF Leakage vs Tuned IF Input Frequency
0 -1 -2 NO COUT COUT = 10pF 0 -5 GAIN -10 -15 -20 -25 COUT = 10pF -6 NO COUT -35 -7 700 800 900 1000 1100 1200 1300 1400 RF OUTPUT FREQUENCY (MHz)
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RETURN LOSS (dB)
IIP2 (dBm)
-3 -4 -5 RETURN LOSS
-30
Figure 9. Conversion Gain and Return Loss vs Output Frequency
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LT5519
TYPICAL APPLICATIO S U
(10a) Top Layer Silkscreen
(10b) Top Layer Metal Figure 10. Evaluation Board Layout
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LT5519
PACKAGE DESCRIPTIO U
UF Package 16-Lead Plastic QFN (4mm x 4mm)
(Reference LTC DWG # 05-08-1692)
0.72 0.05 PACKAGE OUTLINE 0.30 0.05 0.65 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW--EXPOSED PAD 4.00 0.10 (4 SIDES) PIN 1 TOP MARK 1 2.15 0.10 (4-SIDES) 2 0.75 0.05 R = 0.115 TYP 0.55 0.20 15 16
(UF) QFN 0503
4.35 0.05 2.15 0.05 2.90 0.05 (4 SIDES)
0.200 REF 0.00 - 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED
0.30 0.05 0.65 BSC
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LT5519
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
LT/TP 0104 1K * PRINTED IN USA
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(c) LINEAR TECHNOLOGY CORPORATION 2004

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