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24-bit, 96kHz Stereo DAC
DESCRIPTION
The WM8714 is a high performance stereo DAC designed for audio applications such as DVD, home theatre systems, and digital TV. The WM8714 supports data input word lengths from 16 to 24-bits and sampling rates up to 96kHz. The WM8714 consists of a serial interface port, digital interpolation filters, multi-bit sigma delta modulators and stereo DAC in a 14-pin SOIC package. The WM8714 has a hardware control interface for selection of audio data interface format, mute and de-emphasis. The WM8714 supports I2S, and right Justified audio data interfaces. The WM8714 is an ideal device to interface to AC-3, DTS, and MPEG audio decoders for surround sound applications, or for use in DVD players.
WM8714
FEATURES
* * Stereo DAC Audio Performance 95dB SNR (`A' weighted @ 48kHz) DAC -90dB THD DAC Sampling Frequency: 8kHz - 96kHz Pin Selectable Audio Data Interface Format I2S, Right Justified or DSP 3 - 5V Supply Operation 14-pin SOIC Package Pin Compatible with WM8725
* * * * *
APPLICATIONS
* * * DVD Players Digital TV Digital Set Top Boxes
BLOCK DIAGRAM
FORMAT MUTE DEEMPH
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CONTROL INTERFACE
WM8714
MUTE BCKIN LRCIN DIN MUTE SERIAL INTERFACE DIGITAL FILTERS
SIGMA DELTA MODULATOR
RIGHT DAC
LOW PASS FILTER
VOUTR
SIGMA DELTA MODULATOR
LEFT DAC
LOW PASS FILTER
VOUTL
CAP
MCLK
VDD
GND
WOLFSON MICROELECTRONICS LTD w :: www.wolfsonmicro.com
Production Data, July 2002, Rev 1.3 Copyright 2002 Wolfson Microelectronics Ltd.
WM8714
Production Data
PIN CONFIGURATION
ORDERING INFORMATION
DEVICE WM8714ED TEMP. RANGE -25 to +85oC PACKAGE 14-pin SOIC
LRCIN DIN BCKIN NC CAP VOUTR GND
1 2 3 4 5 6 7
14 13 12
MCLK FORMAT DEEMPH NC MUTE VOUTL VDD
WM8714 11
10 9 8
PIN DESCRIPTION
PIN 1 2 3 4 5 6 7 8 9 10 NAME LRCIN DIN BCKIN NC CAP VOUTR GND VDD VOUTL MUTE TYPE Digital input Digital input Digital input No connect Analogue output Analogue output Supply Supply Analogue output Digital input Sample rate clock input Serial audio data input Bit clock input No internal connection Analogue internal reference Right channel DAC output Negative supply Positive supply Left channel DAC output Soft mute control, Internal pull down High = Mute ON Low = Mute OFF No internal connection De-emphasis select, Internal pull up High = de-emphasis ON Low = de-emphasis OFF Data input format select, Internal pull up Low = 16-bit right justified High = 16-24-bit I2S System clock input DESCRIPTION
11 12
NC DEEMPH
No connect Digital input
13
FORMAT
Digital input
14
MCLK
Digital input
Note: 1. Digital input pins have Schmitt trigger input buffers.
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WM8714
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ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device.
CONDITION Supply voltage Voltage range digital inputs Master Clock Frequency Operating temperature range, TA Storage temperature prior to soldering Storage temperature after soldering Package body temperature (soldering 10 seconds) Package body temperature (soldering 2 minutes)
MIN -0.3V GND -0.3V
MAX +7V VDD +0.3V 37MHz
-25C
+85C
30C max / 85% RH max -65C +150C +240C +183C
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DC ELECTRICAL CHARACTERISTICS
PARAMETER Supply range Ground Difference DGND to AGND Supply current Supply current VDD = 5V VDD = 3.3V SYMBOL VDD GND -0.3 TEST CONDITIONS MIN 2.7 0 0 15 12 +0.3 25 TYP MAX 5.5 UNIT V V V mA mA
ELECTRICAL CHARACTERISTICS
Test Conditions o VDD = 5V, GND = 0V, TA = +25 C, fs = 48kHz, MCLK = 256fs unless otherwise stated. PARAMETER Input LOW level Input HIGH level Output LOW Output HIGH Analogue Reference Levels Reference voltage (CAP) Potential divider resistance RVMID VDD to CAP and CAP to GND At DAC outputs A-weighted, @ fs = 48kHz A-weighted @ fs = 96kHz A-weighted, @ fs = 48kHz AVDD, DVDD = 3.3V A-weighted @ fs = 96kHz AVDD, DVDD = 3.3V on `A' weighted @ fs = 48kHz 1kHz, 0dBFs 1kHz, THD+N @ -60dBFs 90 VDD/2 50mV 80K VDD/2 100K VDD/2 + 50mV 120K V Ohms SYMBOL VIL VIH VOL VOH IOL = 2mA IOH = 2mA AVDD - 0.3V 2.0 AGND + 0.3V TEST CONDITIONS MIN TYP MAX 0.8 UNIT V V V V Digital Logic Levels (CMOS Levels)
DAC Output (Load = 10k ohms. 50pF) 0dBFs Full scale output voltage SNR (Note 1,2,3) SNR (Note 1,2,3) SNR (Note 1,2,3) 1.1 x VDD/5 95 93 97 Vrms dB dB dB
SNR (Note 1,2,3)
95
dB
SNR (Note 1,2,3) THD (Note 3) Dynamic Range (Note 2) DAC channel separation
92 -90 90 95 95 -74
dB dB dB dB
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WM8714
Test Conditions VDD = 5V, GND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated. PARAMETER Analogue Output Levels Output level Load = 10k ohms, 0dBFS Load = 10k ohms, 0dBFS, (VDD = 3.3V) 1.1 0.72 SYMBOL TEST CONDITIONS MIN TYP MAX
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UNIT VRMS VRMS
Gain mismatch channel-to-channel Minimum resistance load To midrail or a.c. coupled To midrail or a.c. coupled (VDD = 3.3V) 5V or 3.3V
1 1 1
%FSR kohms kohms
Maximum capacitance load Output d.c. level Power On Reset (POR) POR threshold
100 VDD/2 1.8
pF V V
Notes: 1. Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured `A' weighted over a 20Hz to 20kHz bandwidth. 2. All performance measurements done with 20kHz low pass filter, and where noted an A-weight filter. Failure to use such a filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics. The low pass filter removes out of band noise; although it is not audible it may affect dynamic specification values. 3. CAP pin decoupled with 10uF and 0.1uF capacitors (smaller values may result in reduced performance).
TERMINOLOGY
1. 2. Signal-to-noise ratio (dB) - SNR is a measure of the difference in level between the full scale output and the output with no signal applied. (No Auto-zero or Automute function is employed in achieving these results). Dynamic range (dB) - DNR is a measure of the difference between the highest and lowest portions of a signal. Normally a THD+N measurement at 60dB below full scale. The measured signal is then corrected by adding the 60dB to it. (e.g. THD+N @ -60dB= -32dB, DR= 92dB). THD+N (dB) - THD+N is a ratio, of the rms values, of (Noise + Distortion)/Signal. Stop band attenuation (dB) - Is the degree to which the frequency spectrum is attenuated (outside audio band). Channel Separation (dB) - Also known as Cross-Talk. This is a measure of the amount one channel is isolated from the other. Normally measured by sending a full scale signal down one channel and measuring the other.
3. 4. 5.
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WM8714 MASTER CLOCK TIMING
tMCLKL MCLK tMCLKH tMCLKY
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Figure 1 Master Clock Timing Requirements Test Conditions o VDD = 5V, GND = 0V, TA = +25 C, fs = 48kHz, MCLK = 256fs unless otherwise stated. PARAMETER System Clock Timing Information
MCLK Master clock pulse width high MCLK Master clock pulse width low MCLK Master clock cycle time MCLK Duty cycle
SYMBOL tMCLKH tMCLKL tMCLKY
TEST CONDITIONS
MIN 8 8 20 40:60
TYP
MAX
UNIT ns ns ns
60:40
DIGITAL AUDIO INTERFACE
tBCH BCKIN tBCY tBCL
LRCIN tDS DIN tDH tLRH tLRSU
Figure 2 Digital Audio Data Timing Test Conditions VDD = 5V, GND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated. PARAMETER BCKIN cycle time BCKIN pulse width high BCKIN pulse width low LRCIN set-up time to BCKIN rising edge LRCIN hold time from BCKIN rising edge DIN set-up time to BCKIN rising edge DIN hold time from BCKIN rising edge SYMBOL tBCY tBCH tBCL tLRSU tLRH tDS tDH TEST CONDITIONS MIN 40 16 16 8 8 8 8 TYP MAX UNIT ns ns ns ns ns ns ns
Audio Data Input Timing Information
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DEVICE DESCRIPTION
GENERAL INTRODUCTION
The WM8714 is a high performance DAC designed for digital consumer audio applications. The range of features make it ideally suited for use in DVD players, AV receivers and other consumer audio equipment. The WM8714 is a complete 2-channel stereo audio digital-to-analogue converter, including digital interpolation filter, multi-bit sigma delta with dither, and switched capacitor multi-bit stereo DAC and output smoothing filters. It is fully compatible and an ideal partner for a range of industry standard DSPs and audio controllers. A novel multi bit sigma-delta DAC design is used, utilising a 128x oversampling rate, to optimise signal to noise performance and offer increased clock jitter tolerance. (In `high-rate' operation, the oversampling ratio is 64x for system clocks of 128fs or 192fs) Control of internal functionality of the device is provided by hardware control (pin programmed). Operation using master clocks of 256fs, 384fs, 512fs or 768fs is provided, selection between clock rates being automatically controlled. Sample rates (fs) from less than 8ks/s to 96ks/s are allowed, provided the appropriate system clock is input. The audio data interface supports 16-bit right justified or 16-24-bit I2S (Philips left justified, one bit delayed) interface formats. Single 2.7-5.5V supplies may be used, the output amplitude scaling with absolute supply level. Low supply voltage operation and low current consumption combined with the low pin count small package make the WM8714 attractive for many consumer applications. The device is packaged in a small 14-pin SOIC.
DAC CIRCUIT DESCRIPTION
The WM8714 DAC is designed to allow playback of 24-bit PCM audio or similar data with high resolution and low noise and distortion. The two DACs on the WM8714 are implemented using sigma-delta oversampled conversion techniques. These require that the PCM samples are digitally filtered and interpolated to generate a set of samples at a much higher rate than the up to 96ks/s input rate. This sample stream is then digitally modulated to generate a digital pulse stream that is then converted to analogue signals in a switched capacitor DAC. The advantage of this technique is that the DAC is linearised using noise shaping techniques, allowing the 24-bit resolution to be met using non-critical analogue components. A further advantage is that the high sample rate at the DAC output means that smoothing filters on the output of the DAC need only have fairly crude characteristics in order to remove the characteristic steps, or images on the output of the DAC. To ensure that generation of tones characteristic to sigma-delta converters is not a problem, dithering is used in the digital modulator along with a higher order modulator. The multi-bit switched capacitor technique used in the DAC reduces sensitivity to clock jitter, and dramatically reduces out of band noise compared to switched current or single bit techniques used in other implementations. The voltage on the CAP pin is used as the reference for the DACs. Therefore the amplitude of the signals at the DAC outputs will scale with the amplitude of the voltage at the CAP pin. An external reference could be used to drive into the CAP pin if desired, with a value typically of about midrail ideal for optimum performance. The outputs of the 2 DACs are buffered out of the device by buffer amplifiers. These amplifiers will source load currents of several mA and sink current up to 1.5mA allowing significant loads to be driven. The output source is active and the sink is Class A, i.e. fixed value, so greater loads might be driven if an external `pull-down' resistor is connected at the output. Typically an external low pass filter circuit will be used to remove residual out of band noise characteristic of delta sigma converters. However, the advanced multi-bit DAC used in WM8714 produces far less out of band noise than single bit traditional sigma delta DACs, and so in many applications this filter may be removed, or replaced with a simple RC pole.
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WM8714 CLOCKING SCHEMES
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In a typical digital audio system there is only one central clock source producing a reference clock to which all audio data processing is synchronised. This clock is often referred to as the audio system's Master Clock. The external master clock can be applied directly through the MCLK input pin with no configuration necessary for sample rate selection. Note that on the WM8714, MCLK is used to derive clocks for the DAC path. The DAC path consists of DAC sampling clock, DAC digital filter clock and DAC digital audio interface timing. In a system where there are a number of possible sources for the reference clock it is recommended that the clock source with the lowest jitter be used to optimise the performance of the DAC.
DIGITAL AUDIO INTERFACE
Audio data is applied to the internal DAC filters via the Digital Audio Interface. Two interface formats are supported: * * Right Justified mode I2S mode
All formats send the MSB first. The data format is selected with the FORMAT pin. When FORMAT is LOW, right justified data format is selected and word lengths up to 16-bits may be used. When the FORMAT pin is HIGH, I2S format is selected and word length of any value up to 24-bits may be used. (If the word length shorter than 24-bits is used, the unused bits will be padded with zeros). `Packed' mode (i.e. only 32 or 48 clocks per LRCLK period) operation is also supported in both I2S (16-24 bits) and right justified formats, (16 wordlength). If a `packed' format of 16-bit word length is applied (16 BITCLKS per LRCLK half period), the device auto-detects this mode and switches to 16-bit data length.
I S MODE
The WM8714 supports word lengths of 16-24 bits in I2S mode. In I2S mode, the digital audio interface receives data on the DIN input. Audio Data is time multiplexed with LRCIN indicating whether the left or right channel is present. LRCIN is also used as a timing reference to indicate the beginning or end of the data words. In I2S modes, the minimum number of BCKINs per LRCIN period is 2 times the selected word length. LRCIN must be high for a minimum of word length BCKINs and low for a minimum of word length BCKINs. Any mark to space ratio on LRCIN is acceptable provided the above requirements are met. In I2S mode, the MSB is sampled on the second rising edge of BCKIN following a LRCIN transition. LRCIN is low during the left samples and high during the right samples.
2
1/fs
LEFT CHANNEL LRCIN
RIGHT CHANNEL
BCKIN
1 BCKIN 1 BCKIN 3 n-2 n-1 n 1 2 3 n-2 n-1 n
DIN
1
2
MSB
LSB
MSB
LSB
Figure 3 I2S Mode Timing Diagram
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WM8714
RIGHT JUSTIFIED MODE
The WM8714 supports word lengths of 16-bits in right justified mode.
Production Data
In right justified mode, the digital audio interface receives data on the DIN input. Audio Data is time multiplexed with LRCIN indicating whether the left or right channel is present. LRCIN is also used as a timing reference to indicate the beginning or end of the data words. In right justified mode, the minimum number of BCKINs per LRCIN period is 2 times the selected word length. LRCIN must be high for a minimum of word length BCKINs and low for a minimum of word length BCKINs. Any mark to space ratio on LRCIN is acceptable provided the above requirements are met. In right justified mode, the LSB is sampled on the rising edge of BCKIN preceding a LRCIN transition. LRCIN is high during the left samples and low during the right samples.
1/fs
LEFT CHANNEL LRCIN
RIGHT CHANNEL
BCKIN
DIN
1
2
3
14
15
16
1
2
3
14
15
16
MSB
LSB
MSB
LSB
Figure 4 Right Justified Mode Timing Diagram
AUDIO DATA SAMPLING RATES
The master clock for WM8714 supports audio sampling rates from 256fs and 384fs, where fs is the audio sampling frequency (LRCIN) typically 32kHz, 44.1kHz, 48kHz, and 96kHz. The master clock is used to operate the digital filters and the noise shaping circuits. The WM8714 has a master clock detection circuit that automatically determines the relation between the master clock frequency and the sampling rate (to within +/- 8 master clocks). If there is a greater than 8 clocks error, the interface shuts down the DAC and mutes the output. The master clock should be synchronised with LRCIN, although the WM8714 is tolerant of phase differences or jitter on this clock. SAMPLING RATE (LRCIN) 32kHz 44.1kHz 48kHz 96kHz MASTER CLOCK FREQUENCY (MHZ) (MCLK) 256fs 8.192 11.2896 12.288 24.5761 384fs 12.288 16.9340 18.432 36.8641
Table 1 Master Clock Frequencies Versus Sampling Rate Notes: 1. 96kHz sample rate at either 256fs or 384fs are only supported with 5V supplies.
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WM8714
HARDWARE CONTROL MODES
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The WM8714 is hardware programmable providing the user with options to select input audio data format, de-emphasis and mute.
MUTE OPERATION
Pin 10 (MUTE) controls selection of MUTE directly, and can be used to enable and disable the mute. MUTE PIN 0 1 Normal Operation, MUTE off Mute DAC channels DESCRIPTION
Table 2 Mute Control
1.5 1 0.5 0 -0.5 -1 -1.5 -2 -2.5 0 0.001 0.002 0.003 Time(s) 0.004 0.005 0.006
Figure 5 Application and Release of MUTE The MUTE pin is an input to select mute or not mute. MUTE is active high; taking the pin high causes the filters to soft mute, ramping down the audio signal over a few milliseconds. Taking MUTE low again allows data into the filter. Refer to figure 5.
INPUT AUDIO FORMAT SELECTION
FORMAT (pin 13) controls the data input format. FORMAT 0 1 Table 3 Input Audio Format Selection Notes: 1. In 16-24 bit I2S mode, any width of 24 bits or more is supported provided that LRCIN is high for a minimum of 24 BCKINs and low for a minimum of 24 BCKINs, unless Note 2. If exactly 16 BCKIN cycles occur in both the low and high period of LRCIN the WM8714 will assume the data is 16-bit and accept the data accordingly. INPUT DATA MODE 16 right justified 16 - 24-bit I S
2
2.
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WM8714
DE-EMPHASIS CONTROL
DEM (pin 12) is an input control for selection of de-emphasis filtering to be applied. DEEMPH 0 1 Table 4 De-emphasis Control DE-EMPHASIS Off On
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DIGITAL FILTER CHARACTERISTICS
PARAMETER Passband Edge Passband Ripple Stopband Attenuation Table 5 Digital Filter Characteristics SYMBOL TEST CONDITIONS -3dB f < 0.444fs f > 0.555fs -40 MIN TYP 0.487fs 0.25 dB dB MAX UNIT
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WM8714 RECOMMENDED EXTERNAL COMPONENTS
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VDD 8 + C1 C2 7 GND VDD
AGND
13
FORMAT DEEMPH MUTE VOUTR 6 C3
Hardware Control
12 10
WM8714
VOUTL 9
C4 +
AC-Coupled VOUTR/L to External LPF
+
1 14
LRCIN MCLK BCKIN DIN
Audio Serial Data I/F
3 2
CAP
5 + C5 C6
AGND
Notes:
1. GND should be connected as close to the WM8714 as possible. 2. C2, C5 should be positioned as close to the WM8714 as possible. 3. Capacitor types should be carefully chosen. Capacitors with very low ESR are recommended for optimum performance.
Figure 65 External Component Diagram
RECOMMENDED EXTERNAL COMPONENTS VALUES
COMPONENT REFERENCE C1 C2 C3 and C4 C5 C6 SUGGESTED VALUE 10F 0.1F 10F 0.1F 10F De-coupling for VDD De-coupling for VDD Output AC coupling caps to remove midrail DC level from outputs Reference de-coupling capacitors for CAP pin DESCRIPTION
Table 6 External Components Description
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RECOMMENDED ANALOGUE LOW PASS FILTER (OPTIONAL)
4.7k 4.7k
+VS
_
51 10uF 1.8k 7.5K
+
+
1.0nF 47k 680pF -VS
Figure 7 Recommended 2
nd
Order Low Pass Filter (Optional)
An external low pass filter is recommended (see Figure 7) if the device is driving a wideband amplifier. In some applications, a passive RC filter may be adequate.
PCB LAYOUT
1. Place all supply decoupling capacitors as close as possible to their respective supply pins and provide a low impedance path from the capacitors to the appropriate ground. Separate analogue and digital ground planes should be situated under respective analogue and digital device pins. Digital input signals should be screened from each other and from other sources of noise to avoid cross-talk and interference. They should also run over the digital ground plane to avoid introducing unwanted noise into the analogue ground plane. Analogue output signal tracks should be kept as short as possible and over the analogue ground plane reducing the possibility of losing signal quality.
2.
3.
4.
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WM8714
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PACKAGE DRAWING
D: 14 PIN SOIC 3.9mm Wide Body DM001.C
e
B
14
8
H E
1
7
D
L h x 45o
A1 -CA
SEATING PLANE
C
0.10 (0.004)
Symbols A A1 B C D E e H h L REF:
Dimensions (MM) MIN MAX 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 8.55 8.75 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.27 o o 0 8 JEDEC.95, MS-012
Dimensions (Inches) MIN MAX 0.0532 0.0688 0.0040 0.0098 0.0130 0.0200 0.0075 0.0098 0.3367 0.3444 0.1497 0.1574 0.05 BSC 0.2284 0.2440 0.0099 0.0196 0.0160 0.0500 o o 0 8
NOTES: A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS (INCHES). B. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.25MM (0.010IN). D. MEETS JEDEC.95 MS-012, VARIATION = AB. REFER TO THIS SPECIFICATION FOR FURTHER DETAILS.
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IMPORTANT NOTICE
Wolfson Microelectronics Ltd (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current. All products are sold subject to the WM terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
WM warrants performance of its products to the specifications applicable at the time of sale in accordance with WM's standard warranty. Testing and other quality control techniques are utilised to the extent WM deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
In order to minimise risks associated with customer applications, adequate design and operating safeguards must be used by the customer to minimise inherent or procedural hazards.
WM assumes no liability for applications assistance or customer product design. WM does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of WM covering or relating to any combination, machine, or process in which such products or services might be or are used. WM's publication of information regarding any third party's products or services does not constitute WM's approval, license, warranty or endorsement thereof.
Reproduction of information from the WM web site or datasheets is permissable only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this information with alteration voids all warranties provided for an associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use.
Resale of WM's products or services with statements different from or beyond the parameters stated by WM for that product or service voids all express and any implied warranties for the associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use.
ADDRESS:
Wolfson Microelectronics Ltd 20 Bernard Terrace Edinburgh EH8 9NX United Kingdom
Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com
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