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FEATURES +3 V, +5 V, 5 V Power Supplies VSS to VDD Analog Signal Range Low On Resistance (30 max) Fast Switching Times t ON 75 ns max t OFF 45 ns max Low Power Dissipation (1.5 W max) Break-Before-Make Construction ESD > 5000 V as per Military Standard 3015.7 TTL and CMOS Compatible Inputs APPLICATIONS Automatic Test Equipment Data Acquisition Systems Communication Systems Avionics and Military Systems Microprocessor Controlled Analog Systems Medical Instrumentation Battery Powered Instruments Remote Powered Equipment Compatible with 5 V DACs and ADCs such as AD7840/8, AD7870/1/2/4/5/6/8 GENERAL DESCRIPTION
3 V/5 V, 4/8 Channel High Performance Analog Multiplexers ADG608/ADG609
FUNCTIONAL BLOCK DIAGRAMS
ADG608
S1 S1A DA S4A D S1B DB S8
1 OF 8 DECODER
ADG609
S4B
1 OF 4 DECODER
A0 A1 A2 EN
A0 A1 EN
The ability to operate from single +3 V, +5 V or 5 V bipolar supplies makes the ADG608 and ADG609 perfect for use in battery operated instruments and with the new generation of DACs and ADCs from Analog Devices. The use of 5 V supplies and reduced operating currents gives much lower power dissipation than devices operating from 15 V supplies.
PRODUCT HIGHLIGHTS
The ADG608 and ADG609 are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels respectively, fully specified for 5 V, +5 V and +3 V power supplies. The ADG608 switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0, A1 and A2. The ADG609 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched OFF. All the address and enable inputs are TTL compatible over the full specified operating temperature range, making the parts suitable for bus-controlled systems such as data acquisition systems, process controls, avionics and ATEs since the TTL compatible address inputs simplify the digital interface design and reduce the board space requirements. The ADG608/ADG609 are designed on an enhanced LC2MOS process that provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when ON and has an input signal range which extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break-before-make switching action preventing momentary shorting when switching channels. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
1. Extended Signal Range The ADG608/ADG609 are fabricated on an enhanced LC2MOS process giving an increased signal range which extends to the supplies. 2. Low Power Dissipation 3. Low RON 4. Fast Switching Times 5. Break-Before-Make Switching Switches are guaranteed break-before-make so that input signals are protected against momentary shorting. 6. Single/Dual Supply Operation
ORDERING GUIDE
Model ADG608BN ADG608BR ADG608BRU ADG608TRU ADG609BN ADG609BR ADG609BRU
Temperature Range -40C to +85C -40C to +85C -40C to +85C -55C to +125C -40C to +85C -40C to +85C -40C to +85C
Package Option* N-16 R-16A RU-16 RU-16 N-16 R-16A RU-16
*N = Plastic DIP; RU = Thin Shrink Small Outline Package (TSSOP); R = 0.15" Small Outline IC (SOIC). (c) Analog Devices, Inc., 1995 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
ADG608/ADG609-SPECIFICATIONS
DUAL SUPPLY1 (V
Parameter
DD
= +5 V
10%, VSS = -5 V
10%, GND = 0 V, unless otherwise noted)
T Version +25 C -55 C to +125 C VSS to VDD 22 30 5 2 40 6 3 Test Conditions/ Comments
B Version +25 C -40C to +85 C VSS to VDD 22 30 5 2 35 6 3
Units V typ max max max
ANALOG SWITCH Analog Signal Range RON RON RON Match LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG608 ADG609 Channel ON Leakage ID, IS (ON) ADG608 ADG609 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANSITION
-3.5 V < VS < +3.5 V, IS = -1 mA; VDD = +4.5 V, VSS = -4.5 V; Test Circuit 1 -3 V < VS < +3 V, IDS = -1 mA; VDD = +5 V, VSS = -5 V VS = 0 V, IDS = -1 mA; VDD = +5 V, VSS = -5 V VDD = +5.5 V, VSS = -5.5 V VD = 4.5 V, VS = 4.5 V; Test Circuit 2 VD = 4.5 V, VS = 4.5 V; Test Circuit 3 VS = VD = 4.5 V; Test Circuit 4
0.05 0.5 0.05 0.5 0.5 0.05 0.5 0.5
2 2 1 3 1.5 2.4 0.8 1
0.05 0.5 0.05 0.5 0.5 0.05 0.5 0.5
10 10 5 20 10 2.4 0.8 1
nA typ nA max nA typ nA max nA max nA typ nA max nA max V min V max A max pF typ ns typ ns max ns min ns typ ns max ns typ ns max pC typ dB typ dB typ pF typ pF typ pF typ pF typ pF typ
VIN = 0 or VDD
5 50 75 10 50 75 30 45 6 85 85 9 40 20 54 34 0.05 0.2 0.01 0.1 0.2 2 0.1 1
5 50 75 10 50 75 30 45 6 85 85 9 40 20 54 34 0.05 0.2 0.01 0.1 0.2 2 0.1 1
90
100
tOPEN tON (EN) tOFF (EN) Charge Injection OFF Isolation Channel-to-Channel Crosstalk CS (OFF) CD (OFF) ADG608 ADG609 CD (ON) ADG608 ADG609 POWER REQUIREMENTS IDD ISS
90 60
100 75
RL = 300 , CL = 35 pF; VS1 = 3.5 V, VS8 = 3.5 V; Test Circuit 5 RL = 300 , CL = 35 pF; VS = +3.5 V; Test Circuit 6 RL = 300 , CL = 35 pF; VS = +3.5 V; Test Circuit 7 RL = 300 , CL = 35 pF; VS = +3.5 V; Test Circuit 7 VS = 0 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 1 k, CL = 15 pF, f = 100 kHz; VS = 3 V rms; Test Circuit 9 RL = 1 k, CL = 15 pF, f = 100 kHz; Test Circuit 10
A typ A max A typ A max
VIN = 0 V or VDD
NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C; T Version: -55C to +125C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
-2-
REV. A
ADG608/ADG609 SINGLE SUPPLY1
Parameter
(VDD = +5 V
10%, VSS = 0 V, GND = 0 V, unless otherwise noted)
T Version +25 C -55 C to +125 C 0 to VDD 40 50 5 2 70 6 3 Test Conditions/ Comments
B Version +25 C -40 C to +85 C 0 to VDD 40 50 5 2 60 6 3
Units V typ max max max
ANALOG SWITCH Analog Signal Range RON RON RON Match LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG608 ADG609 Channel ON Leakage ID, IS (ON) ADG608 ADG609 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANSITION
VS = +3.5 V, IS = -1 mA; VDD = +4.5 V; Test Circuit 1 +1 V < VS < +3 V, IDS = -1 mA; VDD = +5 V VS = 0 V, IDS = -1 mA; VDD = +5 V VDD = +5.5 V VD = 4.5 V/0.1 V, VS = 0.1 V/4.5 V; Test Circuit 2 VD = 4.5 V/0.1 V, VS = 0.1 V/4.5 V; Test Circuit 3 VS = VD = 4.5 V/0.1 V; Test Circuit 4
0.05 0.5 0.05 0.5 0.5 0.05 0.5 0.5
2 2 1 3 1.5 2.4 0.8 1
0.05 0.5 0.05 0.5 0.5 0.05 0.5 0.5
10 10 5 20 10 2.4 0.8 1
nA typ nA max nA typ nA max nA max nA typ nA max nA max V min V max A max pF typ ns typ ns max ns min ns typ ns max ns typ ns max pC typ pC max dB typ dB typ pF typ pF typ pF typ pF typ pF typ
VIN = 0 or VDD
5 80 100 10 80 100 40 50 0.5 3 85 85 9 40 20 54 34 0.05 0.2 0.2 2
5 80 100 10 80 100 40 50 0.5 3 85 85 9 40 20 54 34 0.05 0.2 0.2 2
130
150
tOPEN tON (EN) tOFF (EN) Charge Injection OFF Isolation Channel-to-Channel Crosstalk CS (OFF) CD (OFF) ADG608 ADG609 CD (ON) ADG608 ADG609 POWER REQUIREMENTS IDD
130 60
150 75
RL = 300 , CL = 35 pF; VS1 = 3.5 V/0 V, VS8 = 0 V/3.5 V; Test Circuit 5 RL = 300 , CL = 35 pF; VS = +3.5 V; Test Circuit 6 RL = 300 , CL = 35 pF; VS = +3.5 V; Test Circuit 7 RL = 300 , CL = 35 pF; VS = +3.5 V; Test Circuit 7 VS = 0 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 1 k, CL = 15 pF, f = 100 kHz; VS = 1.5 V rms; Test Circuit 9 RL = 1 k, CL = 15 pF, f = 100 kHz; Test Circuit 10
A typ A max
VIN = 0 V or VDD
NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C; T Version: -55C to +125C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
REV. A
-3-
ADG608/ADG609-SPECIFICATIONS
SINGLE SUPPLY1
Parameter
(VDD = +3.3 V
10%, VSS = 0 V, GND = 0 V, unless otherwise noted)
T Version +25 C -55 C to +125 C 0 to VDD 60 90 3 0.05 0.5 0.05 0.5 0.5 0.05 0.5 0.5 120 3 Test Conditions/ Comments
B Version +25 C -40 C to +85 C 0 to VDD 60 90 3 0.05 0.5 0.05 0.5 0.5 0.05 0.5 0.5 100 3
Units V typ max max nA typ nA max nA typ nA max nA max nA typ nA max nA max V min V max A max pF typ ns typ ns max ns min ns typ ns max ns typ ns max pC typ pC max dB typ dB typ pF typ pF typ pF typ pF typ pF typ
ANALOG SWITCH Analog Signal Range RON RON Match LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG608 ADG609 Channel ON Leakage ID, IS (ON) ADG608 ADG609 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANSITION
VS = +1.5 V, IS = -1 mA; VDD = +3 V; Test Circuit 1 VS = 0 V, IDS = -1 mA, VDD = +3.3 V VDD = +3.6 V VD = 2.6 V/0.1 V, VS = 0.1 V/2.6 V; Test Circuit 2 VD = 2.6 V/0.1 V, VS = 0.1 V/2.6 V; Test Circuit 3 VS = VD = 2.6 V/0.1 V; Test Circuit 4
2 2 1 3 1.5 2.4 0.8 1
10 10 5 20 10 2.4 0.8 1
VIN = 0 or VDD
5 120 170 10 120 170 40 60 0.5 3 85 85 9 40 20 54 34 0.05 0.2 0.2 2
5 120 170 10 120 170 40 60 0.5 3 85 85 9 40 20 54 34 0.05 0.2 0.2 2
225
250
tOPEN tON (EN) tOFF (EN) Charge Injection OFF Isolation Channel-to-Channel Crosstalk CS (OFF) CD (OFF) ADG608 ADG609 CD (ON) ADG608 ADG609 POWER REQUIREMENTS IDD
225 75
250 90
RL = 300 , CL = 35 pF; VS1 = 1.5 V/0 V, VS8 = 0 V/1.5 V; Test Circuit 5 RL = 300 , CL = 35 pF; VS = +1.5 V; Test Circuit 6 RL = 300 , CL = 35 pF; VS = +1.5 V; Test Circuit 7 RL = 300 , CL = 35 pF; VS = +1.5 V; Test Circuit 7 VS = 0 V, RS = 0 , CL = 1 nF; Test Circuit 8 RL = 1 k, CL = 15 pF, f = 100 kHz; VS = 1 V rms; Test Circuit 9 RL = 1 k, CL = 15 pF, f = 100 kHz; Test Circuit 10
A typ A max
VIN = 0 V or VDD
NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C; T Version: -55C to +125C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
-4-
REV. A
ADG608/ADG609
ABSOLUTE MAXIMUM RATINGS 1
(TA = +25C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +13 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6.5 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to -6.5 V Analog, Digital Inputs2 . . . . . . . . . . . . . . -0.3 V to VDD + 2 V or 20 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 20 mA Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . 40 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . -40C to +85C Extended (T Version) . . . . . . . . . . . . . . . - 55C to +125C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150C Plastic DIP Package JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117C/W Lead Temperature, Soldering (10 sec) . . . . . . . . . . +260C
SOIC Package JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 77C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220C TSSOP Package JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 158C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >5000 V
NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at A, S, D or EN will be clamped by internal diodes. Current should be limited to the maximum ratings given.
Table I. ADG608 Truth Table A2 A1 A0 EN ON SWITCH
Table II. ADG609 Truth Table
A1 X 0 0 1 1
A0 X 0 1 0 1
EN 0 1 1 1 1
ON SWITCH PAIR NONE 1 2 3 4
X 0 0 0 0 1 1 1 1
X 0 0 1 1 0 0 1 1
X 0 1 0 1 0 1 0 1
0 1 1 1 1 1 1 1 1
NONE 1 2 3 4 5 6 7 8
X = Don't Care
X = Don't Care
PIN CONFIGURATIONS DIP/SOIC/TSSOP
A0 EN VSS S1 S2 S3 S4 D 1 2 3 4 5 6 7 8 16 A1 15 A2 14 GND 13 VDD TOP VIEW (Not to Scale) 12 S5 11 S6 10 S7 9 S8
DIP/SOIC/TSSOP
A0 EN VSS S1A S2A S3A S4A DA 1 2 3 4 5 6 7 8 16 A1 15 GND 14 VDD
ADG608
ADG609 13 S1B TOP VIEW (Not to Scale) 12 S2B
11 S3B 10 S4B 9 DB
REV. A
-5-
ADG608/ADG609-Typical Performance Characteristics
50 45 40 TA = +25oC
100 90 80
ON RESISTANCE -
TA = +25oC
ON RESISTANCE -
35 30 25 20 15 10 5 0 -5.0 VDD = +5V VSS = -5V VDD = +3V VSS = -3V
70 60 50 40 30 20 10 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 VD (VS) - Volts
VDD = +3V VSS = 0V
VDD = +5V VSS = 0V
-4.0
-3.0
-2.0
-1.0 0.0 1.0 VD (VS) - Volts
2.0
3.0
4.0
5.0
3.5
4.0
4.5
5.0
Figure 1. RON as a Function of VD (VS): Dual Supply Voltage
Figure 4. RON as a Function of VD (VS): Single Supply Voltage
50 45 40
ON RESISTANCE -
100 VDD = +5V VSS = -5V
ON RESISTANCE -
90 80 70 60 50 40 30 20 10 0 0.0
VDD = +5V VSS = 0V
35 30 25 20 15 10 5 0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 VD (VS) - Volts 2.0 3.0 4.0 5.0 +125oC
+125oC +85oC +25oC
+85oC +25oC
0.5
1.0
1.5
2.5 2.0 3.0 VD (VS) - Volts
3.5
4.0
4.5
5.0
Figure 2. RON as a Function of VD (VS) for Different Temperatures
Figure 5. RON as a Function of VD (VS) for Different Temperatures
100 90 80 VDD = +3V VSS = 0V
+125oC +85oC LEAKAGE CURRENTS - nA +25oC
0.03 VDD = +5V 0.02 VSS = -5V TA = +25oC ID(OFF)
ON RESISTANCE -
70 60 50 40 30 20
0.01 IS(OFF) 0.00 ID(ON)
-0.01
-0.02
10 0 0.0 0.5 1.0 1.5 2.0 VD (VS) - Volts 2.5 3.0
-0.03 -5
-4
-3
-2
-1 0 1 VS, VD - Volts
2
3
4
5
Figure 3. RON as a Function of VD (VS) for Different Temperatures
Figure 6. Leakage Currents as a Function of VD (VS)
-6-
REV. A
ADG608/ADG609
0.02 VDD = +5V VSS = 0V TA = LEAKAGE CURRENTS - nA 0.01 ID(ON) IS(OFF) 0.00 +25oC ID(OFF) LEAKAGE CURRENTS - nA 0.01 ID(ON) 0.02 VDD = +3V VSS = 0V TA = +25oC ID(OFF)
IS(OFF) 0.00
-0.01
0
1
2 3 VS,VD - Volts
4
5
-0.01
0
0.5
1.0
1.5 2.0 VS, VD - Volts
2.5
3.0
Figure 7. Leakage Currents as a Function of VD (VS)
Figure 10. Leakage Currents as a Function of VD (VS)
104
104
VDD = +5V VSS = -5V
103
VDD = +5V VSS = -5V
103
102
IDD - A
ISS - A
102 EN = 2.4V 101
EN = 2.4V 101 EN = 0V 100
EN = 0V 100
10-1
10-1
10
100
1k
10k 100k FREQUENCY - Hz
1M
10M
10-2 10
100
1k
10k 100k FREQUENCY - Hz
1M
10M
Figure 8. Positive Supply Current vs. Switching Frequency
Figure 11. Negative Supply Current vs. Switching Frequency
30 CL = 1nF 20
120 110 100 VDD = +5V VSS = -5V
CHARGE INJECTION - pC
90 10 VDD = +5V VSS = -5V 0 VDD = +3V VSS = 0V -10 -5 60 VDD = +5V VSS = 0V
dB
80 70 50 100
-4
-3
-2
-1 0 1 2 SOURCE VOLTAGE - V
3
4
5
1k
10k FREQUENCY - Hz
100k
1M
Figure 9. Charge Injection vs. Analog Voltage VS
Figure 12. Crosstalk and Off Isolation vs. Frequency
REV. A
-7-
ADG608/ADG609 Test Circuits
IDS
VDD
V1
VSS
VDD S1
S VS D
VSS ID (OFF) D +0.8V GND EN A VD
S2 S8 VS
RON = V1/IDS
Test Circuit 1. On Resistance
Test Circuit 3. ID (OFF)
VDD
VSS
VDD
VSS
IS (OFF) A VS S1 S2 S8 VD
VDD
VSS
VDD S1
D +0.8V
VSS ID (ON) D A +2.4V VD
S8 EN
GND
EN
VS
GND
Test Circuit 2. IS (OFF)
Test Circuit 4. ID (ON)
VDD
VSS 3V
VDD A2 VIN 50 A1 A0
VSS S1 S2 THRU S7 VS1
ADDRESS DRIVE (VIN)
0V
50%
50%
ADG608* S8
+2.4V EN GND D
VS8 VOUT RL 300 CL 35pF 90%
VOUT
90%
* SIMILAR CONNECTION FOR ADG609
tTRANSITION
tTRANSITION
Test Circuit 5. Switching Time of Multiplexer, tTRANSITION
-8-
REV. A
ADG608/ADG609
VDD VSS 3V VDD A2 VIN 50 A1 A0 VSS S1 S2 THRU S7 VS
ADDRESS DRIVE (VIN)
0V
ADG608*
S8 D GND RL 300 CL 35pF VOUT
+2.4V
EN
VOUT
80%
80%
tOPEN
* SIMILAR CONNECTION FOR ADG609
Test Circuit 6. Break-Before-Make Delay, tOPEN
VDD
VSS 3V
VDD A2 A1 A0
VSS S1 S2 THRU S8 VS
ENABLE DRIVE (VIN)
0V
50%
50%
ADG608*
V0 EN VIN 50 GND D RL 300 CL 35pF VOUT 0.9V0
tOFF (EN)
0.9V0
OUTPUT
0V
tON (EN)
* SIMILAR CONNECTION FOR ADG609
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
VDD
VSS 3V
VDD A2 A1 A0 RS VS VIN S EN GND
VSS
LOGIC INPUT (VIN)
0V D CL 1nF VOUT
ADG608*
VOUT
QINJ = CL x VOUT
VOUT
* SIMILAR CONNECTION FOR ADG609
Test Circuit 8. Charge Injection
REV. A
-9-
ADG608/ADG609
VDD
VDD
VDD A2 A1 A0
S1 S8 VS
A2 A1 A0 1k S1 S2 S8 VS
VDD EN 2.4V
ADG608
D RL VOUT 1k GND VSS
ADG608
EN GND VSS D RL 1k VOUT
VSS
VSS
Test Circuit 9. OFF Isolation
Test Circuit 10. Channel-to-Channel Crosstalk
TERMINOLOGY
tOFF (EN) Most positive power supply potential. Most negative power supply potential in dual supplies. In single supply applications, it may be connected to ground. Ground (0 V) reference. Ohmic resistance between D and S. RON variation due to a change in the analog input voltage with a constant load current. Difference between the RON of any two channels. Source leakage current when the switch is off. Drain leakage current when the switch is off. Channel leakage current when the switch is on. Analog voltage on terminals D, S. Channel input capacitance for "OFF" condition. Channel output capacitance for "OFF" condition. "ON" switch capacitance. Digital input capacitance. Delay time between the 50% and 90% points of the digital input and switch "ON" condition. tOPEN tTRANSITION
VDD VSS
Delay time between the 50% and 90% points of the digital input and switch "OFF" condition. Delay time between the 50% and 90% points of the digital inputs and the switch "ON" condition when switching from one address state to another. "OFF" time measured between the 80% points of both switches when switching from one address state to another. Maximum input voltage for logic "0." Minimum input voltage for logic "1." Input current of the digital input. A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an "OFF" channel.
GND RON RON RON Match IS (OFF) ID (OFF) ID, IS (ON) VD, VS CS (OFF) CD (OFF) CD, CS (ON) CIN tON (EN)
VINL VINH IINL (IINH) Crosstalk
Off Isolation
Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. IDD ISS Positive supply current. Negative supply current.
-10-
REV. A
ADG608/ADG609
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Pin Plastic (N-16)
16 PIN 1 1 0.840 (21.33) 0.745 (18.93) 0.210 (5.33) 0.200 (5.05) 0.125 (3.18) 0.060 (1.52) 0.015 (0.38) 8 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 9 0.280 (7.11) 0.240 (6.10)
0.150 (3.81)
0.015 (0.381) 0.008 (0.204)
0.022 (0.558) 0.014 (0.356)
0.100 (2.54) BSC
0.070 (1.77) 0.045 (1.15)
SEATING PLANE
16-Pin SOIC (R-16A)
0.3937 (10.00) 0.3859 (9.80)
16 1 9 8
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) 0.0099 (0.25)
x 45
SEATING PLANE
0.0500 (1.27) BSC
0.0192 (0.49) 0.0138 (0.35)
8 0.0099 (0.25) 0 0.0500 (1.27) 0.0075 (0.19) 0.0160 (0.41)
16-Pin TSSOP (RU-16)
0.201 (5.10) 0.193 (4.90)
16
9
0.177 (4.50) 0.169 (4.30)
1
8
PIN 1 0.006 (0.15) 0.002 (0.05) 0.0433 (1.10) MAX 0.0256 (0.65) BSC 0.0118 (0.30) 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090)
0.256 (6.50) 0.246 (6.25)
SEATING PLANE
8 0
0.028 (0.70) 0.020 (0.50)
REV. A
-11-
-12-
C2021a-18-4/96
PRINTED IN U.S.A.

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