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| System-on-a-Chip (SoC) Device Supports 48x Speed CD-ROM Drives Digital Signal-processing IC for CD-ROM Systems CXD3030R A CD-ROM playback speed of 48x has finally been achieved. We can say that the CD-ROM has reached the transfer rates of hard disks only a few years ago. The CD-ROM is now indispensable in personal computers for installing application software. The CXD3030R system-on-a-Chip (SoC) product represents an optimal selection for compact basic design, energy-saving design, and increased speed. s s s Implements all the digital signal processing required for playback in a single chip. Integrates digital servo control, digital signal processing, a CDROM decoder, ATAPI interface, and DRAM on a single chip. Playback speeds: Up to 48x Provides even higher mounting densities by including on-chip RAM. s The CXD3030R is a system-on-a-Chip (SoC) product that integrates digital servo control, digital signal processing, a CD-ROM decoder, ATAPI interface, and DRAM on a single chip. It supports playback speeds up to 48x. Digital Servo Control While the CD-ROM optical system includes several adjustment points, the CXD3030R can automatically set all of these to optimal values. It includes a 6-stage cascaded digital filter as the tracking filter, and can flexibly support different pickups and playback speeds. The inclusion of an on-chip wide capture PLL circuit allows the CXD3030R to be freely set up to get the maximum performance from the drive mechanism, providing support for both CAV techniques using an FG signal, and partial CAV techniques that take into account the limitations on the speeds the motor can provide. A drive with a short access time can be designed by using the mode in which the VCO is controlled by a microcomputer and the pull-in time after access is minimized. Digital Signal Processing The CXD3030R supports playback speeds up to 48x. Since this speed is 48 times the speed at which audio CDs are played back, the CD-ROM certainly has progressed to surprising speeds. The built-in buffered audio play function allows this device to play back CD-DA audio while actually reading the disc in high-speed CAV mode. An extensive set of power saving functions are also provided since an increasingly high percentage of notebook personal computers include a CD-ROM drive. In addition to providing functions that lower power consumption in the standby state, this device also achieves reduced power consumption during playback. V O I C E ATAPI Sony has led the industry by integrating on a single chip an interface and a decoder that support ATAPI ULTRA DMA (33). It goes without saying that the CXD3030R implements all related operations even while reaching a speed of 48x. When I joined Sony, 2x speed drives had just been released. It's impressive how far we've come since then. Although the economy has its ups and downs, technology is always progressing. While I know that my fantasies of my salary increasing as fast as technology are unreasonable, I am aware that technology has advanced this far through the efforts of many people in many areas. I recommend that you experience this speed directly. CXD3030R Disc RF amp. CXA2581 Digital signal transaction block ROM decoder block DRAM 1-bit D/A converter Audio out Spindle motor pickup Digital servo block Driver Control block ATAPI interface block ATAPI bus Sub CPU System control microcomputer (SPC970) s Figure 1 System Block Diagram for 48x Speed CD-ROM System-on-a-Chip LSI System XTLO 138 VDD VSS PCO FILI FILO CLTV 44 43 42 45 XTLI 139 Data block 32K RAM 1-Mbit DRAM Digital PLL EFM Data processor Clock gen. Address gen. DMA sequencer DMA FIFO DRVDD DRVSS RFAC 47 ASYI ASYO WFCK SCOR 49 50 27 60 110 to 113, 115 to 118, 120 to 123, HDB0 to F 125 to 128 ASY Sync. protector Timing generator Subcode Q processor CLV processor Auto sequencer Error correction block Subcode P to W processor CPU Interface (Serial I/F) Digital out CDDSP I/F Priority resolver ATAPI registers Subcode deinterleave & ECC SQCK 62 SQSO 61 12-byte packet FIFO 95, 96 HCS0, 1 97 to 99 HA0 to 2 104 105 102 106 101 100 103 94 93 107 XHRD XHWR XHAC HDRQ HINT XS16 REDY DASP XPDI XHRS MDP 12 PWMI 13 Main data error correction Descrambler Sync. control Host I/F Servo block ADIO 33 RFDC CE TE SE FE VC 34 35 36 37 38 39 FOK MIRR DFCT 8-bit A/D OP amp. analog SW D/A converter block 8 Fs 1-bit DAC DAC I/F Clock gen. Sub CPU I/F Servo DSP DAC OP amp. 5 BSSD 4 FAO 3 TAO 2 SAO 58 14 57 56 COUT MIRR DFCT FOK 63 10 DOUT SENS 142 143 135 134 PWM1N PWM2N PWM1P PWM2P 130 XTL2 131 XTL1 69 70 74 75 76 XINT XWR XWAT XRD XCS 77 to 83 84 to 91 A0 to 6 D0 to 7 s Figure 2 CXD3030R Block Diagram |
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