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INTEGRATED CIRCUITS DATA SHEET TDA8763 10-bit high-speed low-power ADC with internal reference regulator Product specification Supersedes data of 1997 Feb 10 File under Integrated Circuits, IC02 1999 Jan 06 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator FEATURES * 10-bit resolution * Sampling rate up to 50 MHz * DC sampling allowed * One clock cycle conversion only * High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz) * No missing codes guaranteed * In-Range (IR) CMOS output * Levels TTL and CMOS compatible digital inputs * 3 to 5 V CMOS digital outputs * Low-level AC clock input signal allowed * Internal reference voltage regulator * Power dissipation only 235 mW (typical) * Low analog input capacitance, no buffer amplifier required * No sample-and-hold circuit required. APPLICATIONS TDA8763 High-speed analog-to-digital conversion for: * Video data digitizing * Radar pulse analysis * Transient signal analysis * High energy physics research * modulators * Medical imaging. GENERAL DESCRIPTION The TDA8763 is a 10-bit high-speed low-power Analog-to-Digital Converter (ADC) for professional video and other applications. It converts the analog input signal into 10-bit binary-coded digital words at a maximum sampling rate of 50 MHz. All digital inputs and outputs are TTL and CMOS compatible, although a low-level sine wave clock input signal is allowed. The device includes an internal voltage reference regulator. If the application requires that the reference is driven via external sources the recommendation is to use the TDA8763A. ORDERING INFORMATION TYPE NUMBER TDA8763M/3 TDA8763M/4 TDA8763M/5 PACKAGE NAME SSOP28 SSOP28 SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm DESCRIPTION VERSION SOT341-1 SOT341-1 SOT341-1 SAMPLING FREQUENCY (MHz) 30 40 50 1999 Jan 06 2 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO INL DNL fclk(max) PARAMETER analog supply voltage digital supply voltage output stages supply voltage analog supply current digital supply current output stages supply current integral non-linearity differential non-linearity maximum clock frequency TDA8763M/3 TDA8763M/4 TDA8763M/5 Ptot total power dissipation fclk = 40 MHz; ramp input 30 40 50 - - - - 235 - - - fclk = 40 MHz; ramp input fclk = 40 MHz; ramp input fclk = 40 MHz; ramp input CONDITIONS MIN. 4.75 4.75 3.0 - - - - - TYP. 5.0 5.0 3.3 30 16 1 0.8 0.5 TDA8763 MAX. 5.25 5.25 5.25 35 21 2 2.0 0.9 UNIT V V V mA mA mA LSB LSB MHz MHz MHz mW 305 1999 Jan 06 3 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator BLOCK DIAGRAM TDA8763 V CCA handbook, full pagewidth DEC 5 CLK 1 VCCD2 11 OE 10 3 REFERENCE VOLTAGE REGULATOR VRT 9 CLOCK DRIVER 2 TC TDA8763 25 D9 24 D8 23 D7 MSB RLAD analog voltage input VI 8 ANALOG -TO - DIGITAL CONVERTER LATCHES CMOS OUTPUTS 22 D6 21 D5 20 D4 19 D3 data outputs VRM 7 18 D2 17 D1 16 D0 LSB VRB 6 13 VCCO IN-RANGE LATCH CMOS OUTPUT 26 IR output 28 4 AGND analog ground 12 DGND2 digital ground 14 OGND output ground 27 DGND1 MBE553 VCCD1 digital ground Fig.1 Block diagram. 1999 Jan 06 4 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator PINNING SYMBOL CLK TC VCCA AGND DEC VRB VRM VI VRT OE VCCD2 DGND2 VCCO OGND n.c. D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 IR DGND1 VCCD1 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 clock input two's complement input (active LOW) analog supply voltage (+5 V) analog ground decoupling input reference voltage BOTTOM input reference voltage MIDDLE input analog input voltage reference voltage TOP input output enable input (CMOS level input, active LOW) digital supply voltage 2 (+5 V) digital ground 2 supply voltage for output stages (3 to 5 V) output ground not connected data output; bit 0 (LSB) data output; bit 1 data output; bit 2 data output; bit 3 data output; bit 4 data output; bit 5 data output; bit 6 data output; bit 7 data output; bit 8 data output; bit 9 (MSB) in range data output digital ground 1 digital supply voltage 1 (+5 V) Fig.2 Pin configuration. handbook, halfpage TDA8763 DESCRIPTION CLK TC VCCA AGND DEC VRB VRM VI VRT 1 2 3 4 5 6 7 28 VCCD1 27 DGND1 26 IR 25 D9 24 D8 23 D7 22 D6 TDA8763 8 9 21 D5 20 D4 19 D3 18 D2 17 D1 16 D0 15 n.c. MBE552 OE 10 V CCD2 11 DGND2 12 V CCO 13 OGND 14 1999 Jan 06 5 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCCA VCCD VCCO VCC PARAMETER analog supply voltage digital supply voltage output stages supply voltage supply voltage difference VCCA - VCCD VCCA - VCCO VCCD - VCCO VI Vi(sw)(p-p) IO Tstg Tamb Tj Note input voltage output current storage temperature operating ambient temperature junction temperature referenced to AGND AC input voltage for switching (peak-to-peak value) referenced to DGND -1.0 -1.0 -1.0 -0.3 - - -55 -40 - CONDITIONS note 1 note 1 note 1 MIN. -0.3 -0.3 -0.3 TDA8763 MAX. +7.0 +7.0 +7.0 +1.0 +4.0 +4.0 +7.0 VCCD 10 +150 +85 150 V V V V V V V V UNIT mA C C C 1. The supply voltages VCCA, VCCD and VCCO may have any value between -0.3 V and +7.0 V provided that the supply voltage differences VCC are respected. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 110 UNIT K/W 1999 Jan 06 6 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator TDA8763 CHARACTERISTICS VCCA = V3 to V4 = 4.75 to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 to 5.25 V; VCCO = V13 to V14 = 3.0 to 5.25 V; AGND and DGND shorted together; Tamb = 0 to +70 C; typical values measured at VCCA = VCCD = 5 V and VCCO = 3.3 V; CL = 15 pF and Tamb = 25 C; unless otherwise specified. SYMBOL Supplies VCCA VCCD1 VCCD2 VCCO VCC analog supply voltage digital supply voltage 1 digital supply voltage 2 output stages supply voltage supply voltage difference VCCA - VCCD VCCA - VCCO VCCD - VCCO ICCA ICCD ICCO Inputs CLOCK INPUT CLK (REFERENCED TO DGND); note 1 VIL VIH IIL IIH Zi Ci VIL VIH IIL IIH IIL IIH Zi Ci LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current input impedance input capacitance Vclk = 0.8 V Vclk = 2 V fclk = 40 MHz 0 2 -1 - - - 0 2 VIL = 0.8 V VIH = 2 V VI = VRB = 1.3 V VI = VRT = 3.67 V fi = 4.43 MHz -1 - - - - - - - 0 2 2 2 - - - - 0 35 8 5 0.8 VCCD +1 10 - - 0.8 VCCD - 1 - - - - V V A A k pF analog supply current digital supply current output stages supply current fclk = 40 MHz; ramp input -0.20 -0.20 -0.20 - - - - - - 30 16 1 +0.20 +2.25 +2.25 35 21 2 V V V mA mA mA 4.75 4.75 4.75 3.0 5.0 5.0 5.0 3.3 5.25 5.25 5.25 5.25 V V V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT INPUTS OE AND TC (REFERENCED TO DGND); see Table 2 LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current V V A A A A k pF VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND) LOW-level input current HIGH-level input current input impedance input capacitance 1999 Jan 06 7 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator SYMBOL PARAMETER CONDITIONS MIN. TYP. TDA8763 MAX. UNIT Reference voltages for the resistor ladder using the internal voltage regulator; see Table 1 VRB VRT Vdiff Iref Rlad TCRlad Voffset(B) Voffset(T) Vi(p-p) Outputs DIGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND) VOL VOH IOZ LOW-level output voltage HIGH-level output voltage output current in 3-state mode IOL = 1 mA IOH = -1 mA 0.5 V < Vo < VCCO 0 -20 - - 0.5 VCCO +20 V V A VCCO - 0.5 - reference voltage BOTTOM reference voltage TOP differential reference voltage VRT - VRB reference current resistor ladder temperature coefficient of the resistor ladder offset voltage BOTTOM offset voltage TOP analog input voltage (peak-to-peak value) note 2 note 2 note 3 1.1 3.4 2.25 - - - - - - 1.90 1.3 3.6 2.3 9.39 245 1860 456 175 175 1.95 1.5 3.8 2.35 - - - - - - 2.00 V V V mA ppm m/K mV mV V Switching characteristics CLOCK INPUT CLK; see Fig.4; note 1 fclk(max) maximum clock frequency TDA8763M/3 TDA8763M/4 TDA8763M/5 tCPH tCPL clock pulse width HIGH clock pulse width LOW full effective bandwidth full effective bandwidth 30 40 50 8.5 5.5 - - - - - - - - - - MHz MHz MHz ns ns Analog signal processing LINEARITY INL DNL Eoffset EG integral non-linearity differential non-linearity offset error fclk = 40 MHz; ramp input fclk = 40 MHz; ramp input middle code - - - - 0.8 0.5 1 3 2.0 0.9 - - LSB LSB LSB % gain error (from device to device) note 4 using internal reference voltage 1999 Jan 06 8 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator SYMBOL PARAMETER CONDITIONS - - - MIN. TYP. - - - TDA8763 MAX. UNIT BANDWIDTH (fclk = 40 MHz) B analog bandwidth full-scale sine wave; note 5 75% full-scale sine wave; note 5 small signal at mid-scale; VI = 10 LSB at code 512; note 5 tstLH tstHL analog input settling time LOW-to-HIGH analog input settling time HIGH-to-LOW full-scale square wave; see Fig.6; note 6 full-scale square wave; see Fig.6; note 6 15 20 350 MHz MHz MHz - - 1.5 1.5 3.0 3.0 ns ns HARMONICS (fclk = 40 MHZ); see Figs 7 and 8 Hfund(FS) Hall(FS) fundamental harmonics (full-scale) harmonics (full-scale); all components second harmonics third harmonics THD total harmonic distortion fi = 4.43 MHz without harmonics; fclk = 40 MHz; fi = 4.43 MHz TDA8763M/3; fclk = 30 MHz fi = 4.43 MHz fi = 7.5 MHz TDA8763M/4; fclk = 40 MHz fi = 4.43 MHz fi = 7.5 MHz fi = 10 MHz fi = 15 MHz TDA8763M/5; fclk = 50 MHz fi = 4.43 MHz fi = 7.5 MHz fi = 10 MHz fi = 15 MHz - - - - 9.3 8.9 8.8 8.0 - - - - bits bits bits bits - - - - 9.3 9.0 8.9 8.1 - - - - bits bits bits bits - - 9.4 9.1 - - bits bits SIGNAL-TO-NOISE RATIO; see Figs 7 and 8; note 7 SNRFS signal-to-noise ratio (full-scale) 55 58 - dB fi = 4.43 MHz fi = 4.43 MHz - - - -70 -72 -61 -63 -63 - dB dB dB - - 0 dB EFFECTIVE BITS; see Figs 7 and 8; note 7 EB effective bits 1999 Jan 06 9 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator SYMBOL TWO-TONE; note 8 TTIR two-tone intermodulation rejection fclk = 40 MHz - -69 - PARAMETER CONDITIONS MIN. TYP. TDA8763 MAX. UNIT dB BIT ERROR RATE BER bit error rate fclk = 50 MHz; fi = 4.43 MHz; VI = 16 LSB at code 512 fclk = 40 MHz; PAL modulated ramp - 10-13 - times/ sample DIFFERENTIAL GAIN; note 9 Gdiff differential gain - 0.8 - % DIFFERENTIAL PHASE; note 9 diff differential phase fclk = 40 MHz; PAL modulated ramp - 0.4 - deg Timing (fclk = 40 MHz; CL = 15 pF); see Fig.4; note 10 tds th td CL tdZH tdZL tdHZ tdLZ Notes 1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock must not be less than 0.5 ns. 2. Analog input voltages producing code 0 up to and including code 1023: a) Voffset(B) (voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 C. b) Voffset(T) (voltage offset TOP) is the difference between reference voltage TOP (VRT) and the analog input which produces data outputs equal to code 1023 at Tamb = 25 C. sampling delay time output hold time output delay time digital output load capacitance VCCO = 4.75 V VCCO = 3.15 V 3-state output delay times; see Fig.5 enable HIGH enable LOW disable HIGH disable LOW - - - - 5.5 12 19 12 8.5 15 24 15 ns ns ns ns - 4 - - - 3 - 10 12 - - - 13 15 15 ns ns ns ns pF 1999 Jan 06 10 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator TDA8763 3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.3. V RT - V RB a) The current flowing into the resistor ladder is I L = ----------------------------------------- and the full-scale input range at the converter, R OB + R L + R OT RL to cover code 0 to code 1023, is V I = R L x I L = ----------------------------------------- x ( V RT - V RB ) = 0. 848 x ( V RT - V RB ) R OB + R L + R OT b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio RL ----------------------------------------- will be kept reasonably constant from device to device. Consequently variation of the output R OB + R L + R OT codes at a given input voltage depends mainly on the difference VRT - VRB and its variation with temperature and supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching between each of them is then optimized. 4. ( V 1023 - V 0 ) - V i ( p - p ) E G = ----------------------------------------------------------- x 100 Vi ( p - p) 5. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal. 6. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square wave signal) in order to sample the signal and obtain correct output data. 7. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: SINAD = EB x 6.02 + 1.76 dB. 8. Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter. 9. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a digital-to-analog converter. 10. Output data acquisition: the output data is available after the maximum delay time of td(max). For 50 MHz version it is recommended to have the lowest possible output load. handbook, halfpage VRT ROT RL VRM RLAD IL code 0 ROB VRB MGD281 code 1023 Fig.3 Explanation of note 3. 1999 Jan 06 11 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator Table 1 STEP U/F 0 1 . . 1022 1023 O/F Table 2 TC X 0 1 Output coding and input voltage (typical values; referenced to AGND) BINARY OUTPUT BITS Vi(p-p) <1.455 1.455 . . . . 3.405 >3.405 IR TDA8763 TWOS COMPLEMENT OUTPUT BITS D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 . . 1 1 0 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 1 . . 0 1 1 1 1 1 . . 0 0 0 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 1 . . 0 1 1 Mode selection OE 1 0 0 high impedance active; two's complement active; binary D9 to D0 high impedance active active IR handbook, full pagewidth t CPL t CPH VCCO CLK 50% 0V sample N sample N + 1 sample N + 2 Vl t ds DATA D0 to D9 DATA N-2 DATA N-1 td th VCCO DATA N DATA N+1 MBG916 50% 0V Fig.4 Timing diagram. 1999 Jan 06 12 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator TDA8763 handbook, full pagewidth V CCD OE 50% t dHZ HIGH 90% output data t dLZ HIGH output data LOW 10% 50% t dZL LOW t dZH 50% TEST V CCD 3.3 k TDA8763 15 pF OE S1 t dLZ t dZL t dHZ t dZH S1 VCCD VCCD DGND DGND MBE555 - 1 fOE = 100 kHz. Fig.5 Timing diagram and test conditions of 3-state output delay time. t STLH code 1023 VI code 0 2 ns 50% t STHL 50% 2 ns CLK 50% 50% MBE566 0.5 ns 0.5 ns Fig.6 Analog input settling-time diagram. 1999 Jan 06 13 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator TDA8763 handbook, full pagewidth 0 MGD862 amplitude (dB) -20 -40 -60 -80 -100 -120 -140 0 2.50 5.00 7.50 10.0 12.5 15.0 17.5 f (MHz) 20.0 Effective bits: 9.42; THD = -71.8 dB. Harmonic levels (dB): 2nd = -83.19; 3rd = -78.09; 4th = -78.72; 5th = -78.33; 6th = -77.55. Fig.7 Typical Fast Fourier Transform (fclk = 40 MHz; fi = 4.43 MHz). handbook, full pagewidth 0 MGD863 amplitude (dB) -20 -40 -60 -80 -100 -120 -140 0 2.50 5.00 7.50 10.0 12.5 15.0 17.5 20.0 22.5 25.0 f (MHz) Effective bits: 8.91; THD = -62.96 dB. Harmonic levels (dB): 2nd = -71.38; 3rd = -71.54; 4th = -74.14; 5th = -65.15; 6th = -77.16. Fig.8 Typical Fast Fourier Transform (fclk = 50 MHz; fi = 10 MHz). 1999 Jan 06 14 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator INTERNAL PIN CONFIGURATIONS TDA8763 handbook, halfpage VCCO handbook, halfpage V CCA D9 to D0 IR VI OGND MBG915 AGND MGC040 - 1 Fig.9 CMOS data and in range outputs. Fig.10 Analog inputs. DEC handbook, halfpage handbook, halfpage V CCO VCCA VRT OE TC VRM VRB RLAD REGULATOR OGND MBE557 AGND MBE558 - 1 Fig.11 OE and TC input. Fig.12 VRB, VRM and VRT. 1999 Jan 06 15 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator TDA8763 handbook, halfpage VCCD CLK 1.5 V DGND MBE559 - 1 Fig.13 CLK input. 1999 Jan 06 16 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator APPLICATION INFORMATION TDA8763 handbook, full pagewidth CLK TC VCCA 100 nF (3) 1 2 3 4 5 6 7 28 27 26 25 24 23 22 VCCD1 DGND1 IR D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 n.c.(2) (3) 100 nF AGND DEC 4.7 nF AGND 1 nF AGND 1 nF AGND 100 nF VRB(1) VRM(1) VI VRT(1) OE TDA8763 8 9 10 11 12 13 14 21 20 19 18 17 16 15 FCE167 AGND V CCD2 100 nF (3) DGND2 VCCO 100 nF (3) OGND The analog and digital supplies should be separated and well decoupled. An application note is available and describes the design and the realization of a demonstration board that uses the version TDA8763M with an application environment. (1) VRB, VRM and VRT are decoupled to AGND. (2) Pin 15 may be connected to DGND in order to prevent noise influence. (3) Decoupling capacitor for supplies: must be placed close to the device. Fig.14 Application diagram. 1999 Jan 06 17 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator PACKAGE OUTLINE SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm TDA8763 SOT341-1 D E A X c y HE vMA Z 28 15 Q A2 pin 1 index A1 (A 3) Lp L 1 e bp 14 wM detail X A 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 REFERENCES IEC JEDEC MO-150AH EIAJ EUROPEAN PROJECTION A max. 2.0 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 10.4 10.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.1 0.7 8 0o o ISSUE DATE 93-09-08 95-02-04 1999 Jan 06 18 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: TDA8763 * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. 1999 Jan 06 19 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP PLCC(3), SO, SOJ not suitable suitable(2) suitable not recommended(3)(4) not recommended(5) suitable suitable suitable suitable suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes TDA8763 REFLOW(1) 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. 1999 Jan 06 20 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator NOTES TDA8763 1999 Jan 06 21 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator NOTES TDA8763 1999 Jan 06 22 Philips Semiconductors Product specification 10-bit high-speed low-power ADC with internal reference regulator NOTES TDA8763 1999 Jan 06 23 Philips Semiconductors - a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 489 4339/4239, Fax. +30 1 481 4240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777 Internet: http://www.semiconductors.philips.com For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999 SCA61 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545004/750/04/pp24 Date of release: 1999 Jan 06 Document order number: 9397 750 04692 |
Price & Availability of TDA8763
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