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PD- 91898
SMPS MOSFET
IRFPC50A
HEXFET(R) Power MOSFET
Applications Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching
l
VDSS
600V
Rds(on) max
0.58
ID
11A
Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified ( See AN 1001)
l
TO-247AC G D S
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw
Max.
11 7.0 44 180 1.4 30 4.9 -55 to + 150 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V V/ns C
Typical SMPS Topology:
l
PFC Boost
Notes
through are on page 8
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1
6/23/99
IRFPC50A
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 600 --- --- 2.0 --- --- --- --- Typ. --- 0.65 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.58 VGS = 10V, ID = 6.0A 4.0 V VDS = VGS, ID = 250A 25 VDS = 600V, VGS = 0V A 250 VDS = 480V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 7.7 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 15 40 33 29 2100 270 9.7 2830 74 81 Max. Units Conditions --- S VDS = 50V, ID = 6.0A 70 ID = 11A 19 nC VDS = 480V 28 VGS = 10V, See Fig. 6 and 13 --- VDD = 300V --- ID = 11A ns --- RG = 6.2 --- R D = 30,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 480V, = 1.0MHz --- VGS = 0V, VDS = 0V to 480V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
920 11 18
Units
mJ A mJ
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Typ.
--- 0.24 ---
Max.
0.65 --- 40
Units
C/W
Diode Characteristics
Min. Typ. Max. Units IS
ISM
VSD trr Qrr ton
Conditions D MOSFET symbol 11 --- --- showing the A G integral reverse --- --- 44 S p-n junction diode. --- --- 1.4 V TJ = 25C, IS = 11A, VGS = 0V --- 500 740 ns TJ = 25C, IF = 11A --- 4.0 6.0 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFPC50A
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
I D , Drain-to-Source Current (A)
10
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
4.5V
1
4.5V
0.1 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
1 1 10
20s PULSE WIDTH TJ = 150 C
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
11A ID = 13A
RDS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
2.5
TJ = 150 C
10
2.0
1.5
TJ = 25 C
1.0
0.5
1 4.0
V DS = 100V 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFPC50A
100000
VGS , Gate-to-Source Voltage (V)
10000
V GS = C is s = C rs s = C oss =
0V, f = 1MHz Cg s + C g d , Cd s SHORTE D C gd C ds + C gd
20
11A ID = 13A
16
C, Capacitance (pF)
VDS = 480V VDS = 300V VDS = 120V
C i ss
1000
12
C o ss
100
8
10
C rss
4
1 1 10 100 1000
A
0 0 20 40
FOR TEST CIRCUIT SEE FIGURE 13
60 80
V D S , D ra in-to-S ource V oltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
OPERATION IN THIS AREA LIMITED BY RDS(on)
ISD , Reverse Drain Current (A)
10
I D , Drain Current (A)
100 10us 10 100us 1ms 1 10ms
TJ = 150 C
TJ = 25 C
1
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4 1.6
0.1
TC = 25 C TJ = 150 C Single Pulse
10 100 1000 10000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFPC50A
12
VDS VGS RG
RD
10
D.U.T.
+
I D , Drain Current (A)
8
-VDD
10V
6
Pulse Width 1 s Duty Factor 0.1 %
4
Fig 10a. Switching Time Test Circuit
VDS 90%
2
0 25 50 75 100 125 150
TC , Case Temperature
( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01
SINGLE PULSE (THERMAL RESPONSE)
P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC
0.01
0.001 0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFPC50A
2000
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
TOP BOTTOM
VDS
L
D R IV E R
1600
ID 4.9A 7.0A 11A
RG
20V tp
D .U .T
IA S
+ V - DD
1200
A
0 .0 1
800
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS tp
400
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
IAS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
V D S a v , A valanche V oltage (V )
730 720 710 700 690 680 670 660
D.U.T. + V - DS
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
650 0 1 2 3 4 5 6 7 8 9 10 11 12 13
A
VGS
3mA
I av , A v alanche C urrent (A)
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current
6
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IRFPC50A
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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7
IRFPC50A
Package Outline
TO-247AC Outline Dimensions are shown in millimeters (inches)
1 5.9 0 (.6 2 6) 1 5.3 0 (.6 0 2) -B3.6 5 (.1 43 ) 3.5 5 (.1 40 ) 0 .25 (.0 1 0 ) M -A5 .50 (.21 7 ) 2 0 .3 0 (.8 0 0) 1 9 .7 0 (.7 7 5) 1 2 3 -C1 4 .8 0 (.5 8 3 ) 1 4 .2 0 (.5 5 9 ) 4 .3 0 (.1 70 ) 3 .7 0 (.1 45 )
LE A D A S S IG N M E N TS 1 2 3 4 G A TE DR A IN SOURC E DR A IN
-DDBM
5 .3 0 ( .2 0 9 ) 4 .7 0 ( .1 8 5 ) 2 .5 0 (.0 8 9) 1 .5 0 (.0 5 9) 4
2X
5 .50 (.2 1 7 ) 4 .50 (.1 7 7 )
NOTES: 1 D IM E N S IO N ING & TO LE R A N C IN G P E R A N S I Y 14 .5M , 198 2. 2 C O N T R O L LIN G D IM E N S IO N : IN C H . 3 C O N F O R M S TO JE D E C O U TL IN E T O -24 7-A C .
2 .4 0 ( .0 9 4 ) 2 .0 0 ( .0 7 9 ) 2X 5 .4 5 ( .2 1 5 ) 2X
1 .4 0 (.0 56 ) 3 X 1 .0 0 (.0 39 ) 0 .2 5 (.0 10 ) M 3 .4 0 (.1 33 ) 3 .0 0 (.1 18 ) C AS
0 .8 0 (.0 3 1) 3 X 0 .4 0 (.0 1 6) 2 .6 0 (.1 0 2 ) 2 .2 0 (.0 8 7 )
Part Marking Information
TO-247AC
E X A M P L E : T H IS IS A N IR F P E 30 W IT H A S S E M B L Y LOT COD E 3A1Q
A
I N T E R N A T IO N A L R E C T IF IE R LOGO
P AR T N UM B E R IR F P E 3 0 3A1Q 9302 DATE CO DE (Y Y W W ) YY = YE A R W W W EEK
ASSEMBLY LOT COD E
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Starting TJ = 25C, L = 15mH
RG = 25, I AS = 11A. (See Figure 12)
ISD 11A, di/dt 126A/s, VDD V(BR)DSS,
TJ 150C
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8
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