? 2000 fairchild semiconductor corporation ds010249 www.fairchildsemi.com september 1989 revised august 2000 100313 low power quad driver 100313 low power quad driver general description the 100313 is a monolithic quad driver with two or and two nor outputs and common enable. the common input is buffered to minimize input loading. if the d inputs are not used the enable can be used to drive sixteen 50 ? lines. all inputs have 50 k ? pull-down resistors and all outputs are buffered. features 50% power reduction of the 100113 2000v esd protection pin/function compatible with 100113 and 100112 voltage compensated operating range = ? 4.2v to ? 5.7v available to industrial grade temperature range (plcc package only) ordering code: devices also available in tape and reel. specify by appending the suffix letter ?x? to the ordering code. logic symbol pin descriptions connection diagrams 24-pin dip/soic 28-pin plcc order number package number package description 100313sc m24b 24-lead small outline integrated circuit (soic), jedec ms-013, 0.300 wide 100313pc n24e 24-lead plastic dual-in-line package (pdip), jedec ms-010, 0.400 wide 100313QC v28a 28-lead plastic lead chip carrier (plcc), jedec mo-047, 0.450 square 100313qi v28a 28-lead plastic lead chip carrier (plcc), jedec mo-047, 0.450 square industrial temperature range ( ? 40 c to + 85 c) pin names description d a ? d d data inputs e enable input o na ? o nd data outputs o na ? o nd complementary data outputs
www.fairchildsemi.com 2 100313 truth table h = high voltage level l = low voltage level x = don ? t care inputs outputs e d a d b d c d d o 1a , 0 2a o 1a , o 2a o 1b , 0 2b o 1b , 0 2b o 1c , 0 2c o 1c , 0 2c o 1d , 0 2d o 1d , 0 2d hxxxxh l h lhlhl lllll l h l h l h l h llllh l h l h l h h l lllhl l h l h h l l h lllhhl h l hhlhl llhll l h h l l h l h llhlh l h h l l h h l llhhl l h h l h l l h llhhhl h h lhlhl lhlllh l l hlhlh lhl lh h l l h l h h l lhlhl h l l h h l l h lhlhh h l l h h l h l lhhll h l h l l h l h lhhlh h l h l l h h l lhhhl h l h l h l l h lhhhhh l h lhlhl
3 www.fairchildsemi.com 100313 absolute maximum ratings (note 1) recommended operating conditions note 1: the ? absolute maximum ratings ? are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum ratings. the ? recommended operating conditions ? table will define the conditions for actual device operation. note 2: esd testing conforms to mil-std-883, method 3015. commercial version dc electrical characteristics (note 3) v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd, t c = 0 c to + 85 c note 3: the specified limits represent the ? worst case ? value for the parameter. since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. conditions for testing sho wn in the tables are cho- sen to guarantee operation under ? worst case ? conditions. dip ac electrical characteristics v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd note 4: the propagation delay specified is for single output switching. delays may vary up to 150 ps with multiple outputs switching. storage temperature (t stg ) ? 65 c to + 150 c maximum junction temperature (t j ) + 150 c v ee pin potential to ground pin ? 7.0v to + 0.5v input voltage (dc) v ee to + 0.5v output current (dc output high) ? 50 ma esd (note 2) 2000v case temperature (t c ) commercial 0 c to + 85 c industrial ? 40 c to + 85 c supply voltage (v ee ) ? 5.7v to ? 4.2v symbol parameter min typ max units conditions v oh output high voltage ? 1025 ? 955 ? 870 mv v in = v ih (max) loading with v ol output low voltage ? 1830 ? 1705 ? 1620 or v il (min) 50 ? to ? 2.0v v ohc output high voltage ? 1035 mv v in = v ih (min) loading with v olc output low voltage ? 1610 or v il (max) 50 ? to ? 2.0v v ih input high voltage ? 1165 ? 870 mv guaranteed high signal for all inputs v il input low voltage ? 1830 ? 1475 mv guaranteed low signal for all inputs i il input low current 0.50 av in = v il (min) i ih input high current data 350 av in = v ih (max) enable 240 i ee power supply current ? 59 ? 29 ma inputs open symbol parameter t c = 0 ct c = + 25 ct c = + 85 c units conditions min max min max min max t plh propagation delay 0.55 1.30 0.55 1.30 0.55 1.40 ns t phl data to output figures 1, 2 t plh propagation delay 0.80 1.80 0.80 1.80 0.80 1.90 ns (note 4) t phl enable to output t tlh transition time 0.45 1.30 0.45 1.30 0.45 1.30 ns figures 1, 2 t thl 20% to 80%, 80% to 20%
www.fairchildsemi.com 4 100313 commercial version (continued) soic and plcc ac electrical characteristics v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd note 5: the propagation delay specified is for single output switching. delays may vary up to 150 ps with multiple outputs switching. note 6: output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for any outputs w ithin the same pack- aged device. the specifications apply to any outputs switching in the same direction either high-to-low (t oshl ), or low-to-high (t oslh ), or in opposite directions both hl and lh (t ost ). parameters t ost and t ps guaranteed by design. symbol parameter t c = 0 ct c = + 25 ct c = + 85 c units conditions min max min max min max t plh propagation delay 0.55 1.20 0.55 1.20 0.55 1.30 ns t phl data to output figures 1, 2 t plh propagation delay 0.80 1.70 0.80 1.70 0.80 1.80 ns (note 5) t phl enable to output t tlh transition time 0.45 1.30 0.45 1.30 0.45 1.30 ns figures 1, 2 t thl 20% to 80%, 80% to 20% t oshl maximum skew common edge ps plcc only output-to-output variation 280 280 280 (note 6) data to output path t oshl maximum skew common edge ps plcc only output-to-output variation 290 290 290 (note 6) enable to output path t oslh maximum skew common edge ps plcc only output-to-output variation 330 330 330 (note 6) data to output path t oslh maximum skew common edge ps plcc only output-to-output variation 360 360 360 (note 6) enable to output path t ost maximum skew opposite edge ps plcc only output-to-output variation 330 330 330 (note 6) data to output path t ost maximum skew opposite edge ps plcc only output-to-output variation 360 360 360 (note 6) enable to output path t ps maximum skew ps plcc only pin (signal) transition variation 200 200 200 (note 6) data to output path t ps maximum skew ps plcc only pin (signal) transition variation 200 200 200 (note 6) enable to output path
5 www.fairchildsemi.com 100313 industrial version plcc dc electrical characteristics (note 7) v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd, t c = ? 40 c to + 85 c note 7: the specified limits represent the ? worst case ? value for the parameter. since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. conditions for testing sho wn in the tables are cho- sen to guarantee operation under ? worst case ? conditions. plcc ac electrical characteristics v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd note 8: the propagation delay specified is for single output switching. delays may vary up to 150 ps with multiple outputs switching. symbol parameter t c = ? 40 ct c = 0 c to + 85 c units conditions min max min max v oh output high voltage ? 1085 ? 870 ? 1025 ? 870 mv v in = v ih(max) loading with v ol output low voltage ? 1830 ? 1575 ? 1830 ? 1620 or v il(min) 50 ? to ? 2.0v v ohc output high voltage ? 1095 ? 1035 mv v in = v ih(min) loading with v olc output low voltage ? 1565 ? 1610 or v il(max) 50 ? to ? 2.0v v ih input high voltage ? 1170 ? 870 ? 1165 ? 870 mv guaranteed high signal for all inputs v il input low voltage ? 1830 ? 1480 ? 1830 ? 1475 mv guaranteed low signal for all inputs i il input low current 0.50 0.50 av in = v il(min) i ih input high current data 350 350 av in = v ih(max) enable 240 240 i ee power supply current ? 59 ? 29 ? 59 ? 29 ma inputs open symbol parameter t c = ? 40 ct c = + 25 ct c = + 85 c units conditions min max min max min max t plh propagation delay 0.55 1.20 0.55 1.20 0.55 1.30 ns t phl data to output figures 1, 2 t plh propagation delay 0.80 1.70 0.80 1.70 0.80 1.80 ns (note 8) t phl enable to output t tlh transition time 0.45 1.30 0.45 1.30 0.45 1.30 ns figures 1, 2 t thl 20% to 80%, 80% to 20%
www.fairchildsemi.com 6 100313 test circuitry notes: v cc , v cca = + 2v, v ee = ? 2.5v. l1 and l2 = equal length 50 ? impedance lines. r t = 50 ? terminator internal to scope. decoupling 0.1 f from gnd to v cc and v ee . all unused outputs are loaded with 50 ? to gnd. c l = fixture and stray capacitance 3 pf. figure 1. ac test circuit switching waveforms figure 2. propagation delay and transition times
7 www.fairchildsemi.com 100313 physical dimensions inches (millimeters) unless otherwise noted 24-lead small outline integrated circuit (soic), jedec ms-013, 0.300 wide package number m24b 24-lead plastic dual-in-line package (pdip), jedec ms-010, 0.400 wide package number n24e
www.fairchildsemi.com 8 100313 low power quad driver physical dimensions inches (millimeters) unless otherwise noted (continued) 28-lead plastic lead chip carrier (plcc), jedec mo-047, 0.450 square package number v28a fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
|
