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MC33349 Lithium Battery Protection Circuit for One Cell Battery Packs
The MC33349 is a monolithic lithium battery protection circuit that is designed to enhance the useful operating life of a one cell rechargeable battery pack. Cell protection features consist of internally trimmed charge and discharge voltage limits, discharge current limit detection, and a low current standby mode when the cell is discharged. This protection circuit requires a minimum number of external components and is targeted for inclusion within the battery pack. * Internally Trimmed Charge and Discharge Voltage Limits * Discharge Current Limit Detection * Low Current Standby Mode when Cells are Discharged * Dedicated for One Cell Applications * Minimum Components for Inclusion within the Battery Pack * Available in a Low Profile Surface Mount Package
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6 1
PLASTIC PACKAGE N SUFFIX CASE 1262 (SOT-23)
MARKING DIAGRAMS
1
Typical One Cell Smart Battery Pack
v = Version code number xx = Date code
5
PIN CONNECTIONS
DO MC33349 P- CO
6 4 1 3 2
1 2 3 (Top View)
6 Gnd 5 Vcell 4 Ct
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2000
1
May, 2000 - Rev. 1
Publication Order Number: MC33349/D
MC33349
MAXIMUM RATINGS
Characteristics Supply Voltage (Pin 5 to Pin 6) Symbol VDD VP- VCt Value -0.3 to 12 Unit V V V V V
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Input Voltage P- Pin Voltage (Pin 5 to Pin 2) Ct Pin (Pin 4 to Pin 6) VDD - 28 to VDD + 0.3 Gnd - 0.3 to VDD + 0.3 VDD - 28 to VDD + 0.3 Gnd - 0.3 to VDD + 0.3 150 Output Voltage CO Pin Voltage (Pin 3 to Pin 2) DO Pin Voltage (Pin 1 to Pin 6) Power Dissipation VCO VDO PD TJ mW C C Operating Junction Temperature Storage Temperature -40 to 85 Tstg -55 to 125
ELECTRICAL CHARACTERISTICS (Ct = 0.01 F, TA = 25C, for min/max values TA is the operating junction temperature range
that applies, unless otherwise noted.) Characteristic VOLTAGE SENSING Cell Charging Cutoff (Pin 5 to Pin 6) Overvoltage Threshold, VDD Increasing -3, -4 Suffix -7 Suffix Overvoltage Hysteresis VDD Decreasing VDET1 Symbol Min Typ Max Unit
Note1
B
VHYS1
4.2 4.3 150
4.25 4.35 200 2.5 80 10
4.3 4.4 250
V V mV V
B
Cell Discharging Cutoff (Pin 5 to Pin 6) Undervoltage Threshold, VDD Decreasing
C B
Overvoltage Delay Time (Ct = 0.01 F, VDD = 3.6V to 4.5V) Undervoltage Delay Time (VDD = 3.6V to 2.4V)
VDET2 t(DET1) t(DET2)
2.437 55
2.563 105 13
ms ms
7.0
C
CURRENT SENSING -3, -7 Suffix -4 Suffix
Excess Current Threshold (Detect rising edge of P- pin voltage)
VDET3
D
170 45
200 75
230 105
mV mV V
Short Protection Voltage (VDD = 3.0V)
VSHORT
VDD - 1.1 9.0 - 50
VDD - 0.8 13 5.0
VDD - 0.5 17 50
D D D D
Current Limit Delay Time (VDD = 3.0V)
Reset Resistance for Short Protection
t(DET3) t(SHORT) RSHORT
ms s kW
100
150
OUTPUTS
CO Nch On Voltage (IO = 50 A, VDD = 4.4V) DO Nch On Voltage (IO = 50 A, VDD = 2.4V)
Vol1
-
0.2 3.8 0.2 3.7
0.5 -
V V V V
E F
CO Pch On Voltage (IO = -50 A, VDD = 3.9V) DO Pch On Voltage (IO = -50 A, VDD = 3.9V)
Voh1 Vol2
3.4 -
0.5 -
G H
Voh2
3.4
TOTAL DEVICE
Operating Input Voltage
VDD Icell
1.5 - - -
-
10
V
A I I
Supply Current Operating (VDD = 3.9 V, VP- = 0V) Standby (VDD = 2.0 V)
3.0 0.3 -
6.0 0.6 1.2
A A V
Minimum Operating Cell Voltage for Zero Volt Charging (Pin 5 to Pin 2)
VST
A
1. Indicates test circuits shown on next page.
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MC33349 A
5 V V 2 1 6 OSCILLOSCOPE 6 3 2 V
F
5 3 A
B
5 4 V 2 3 6
G
5
2
1
A V
6
C
5
H
5 1 A
V
2
1
2
V
6
6
D
5
I
5 A 2 V A 6 6 1 2
E
5
2
3
A V
6
Figure 1. Test Circuit Schematics
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MC33349
Vcell 5 4
Ct
Level Shift VD1
10 kOhm Delay VD2 Short Circuit Detector
VD3
Rshort
6 Gnd
1 Do
3 Co
2 P-
Figure 2. Detailed Block Diagram
PIN FUNCTION DESCRIPTION
Pin 1 2 Symbol DO P- Description This output connects to the gate of the discharge MOSFET allowing it to enable or disable battery pack discharging.
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This pin monitors cell discharge current. The excess current detector sets when the combined voltage drop of the charge MOSFET and the discharge MOSFET exceeds the discharge current limit threshold voltage, V(DET3). The short circuit detector activates when V(P-) is pulled within 0.8V of the cell voltage by a short circuit. This output connects to the gate of the charge MOSFET allowing it to enable or disable battery pack charging. This pin connects to the external capacitor for setting the output delay of the overvoltage detector (VD1). 3 4 5 6 CO Ct Vcell Gnd This input connects to the positive terminal of the cell for voltage monitoring and provides operating bias for the integrated circuit. This is the ground pin of the IC.
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MC33349
TYPICAL CHARACTERISTICS
UNDERVOLTAGE THRESHOLD V DET2(V) - 40 - 20 0 20 40 60 80 100 4.27 4.26 4.25 4.24 4.23 4.22 4.21 4.20 -60 2.54 2.53 2.52 2.51 2.50 2.49 2.48 2.47 -60 - 40 - 20 0 20 40 60 80 100
OVERVOLTAGE THRESHOLD VDET1 (V)
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 3. Overvoltage Threshold vs Temperature MC33349N-3X
EXCESS CURRENT THRESHOLD V DET3 (V) SHORT PROTECTION VOLTAGE V short (V) 0.210 2.40
Figure 4. Undervoltage Threshold vs Temperature MC33349N-3X / MC33349N-7X
VDD = 3.0 V 2.35 2.30 2.25 2.20 2.15 2.10 -60
0.205
0.200
0.195
0.190 -60
- 40
- 20
0
20
40
60
80
100
- 40
- 20
0
20
40
60
80
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 5. Excess Current Threshold vs Temperature MC33349N-3X / MC33349N-7X
100 OUTPUT DELAY OF OVERVOLTAGE t VDET1(ms) 90 80 70 60 50 40 30 20 -60 - 40 - 20 0 20 40 C3 = 0.01F VDD = 3.6V to 4.3V OUTPUT DELAY OF UNDERVOLTAGE t VDET2(ms) 18 16 14 12 10 8 6 4 2 -60
Figure 6. Short Protection Voltage vs Temperature MC33349N-3X
VDD = 3.6V to 2.4V
60
80
100
- 40
- 20
0
20
40
60
80
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 7. Output Delay of Overvoltage vs Temperature MC33349N-3X
Figure 8. Output Delay of Undervoltage vs Temperature MC33349N-3X / MC33349N-7X
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MC33349
OUTPUT DELAY OF EXCESS CURRENT t VDET3(ms) 20 18 16 14 12 10 8 6 4 2 0 -60 - 40 - 20 0 20 40 60 80 100 OUTPUT DELAY OF SHORT CIRCUIT DETECTOR tshort ( s) VDD = 3.0 V 10 VDD = 3.0 V 8 6 4 2 0 -60
- 40
- 20
0
20
40
60
80
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 9. Output Delay of Excess Current vs Temperature MC33349N-3X
OVER-CHARGE THRESHOLD HYSTERESIS V HYS1(mV) 0.210 OPERATING CURRENT Icell ( A) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60
Figure 10. Output Delay of Short Circuit Detector vs Temperature MC33349N-3X
0.205
0.200
0.195
VDD = 3.9 V VP- = 0 V
0.190 -60
- 40
- 20
0
20
40
60
80
100
- 40
- 20
0
20
40
60
80
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 11. Overvoltage Threshold Hysteresis vs Temperature MC33349N-3X / MC33349N-7X
Figure 12. Operating Current vs Temperature MC33349N-3X
STANDBY CURRENT Icell ( A)
0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 -60 - 40 - 20 0 20 40 60
VDD = 2.0 V
Cout Nch DRIVER ON VOLTAGE V OL1 (V)
0.40
0.30 0.25 0.20 0.15 0.10 0.05 0.00 -60 IOL = 50A VDD = 4.4V - 40 - 20 0 20 40 60 80 100
80
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 13. Standby Current vs Temperature MC33349N-3X
Figure 14. Cout Nch Driver On Voltage (Vol1) vs Temperature MC33349N-3X
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MC33349
Cout Pch DRIVER ON VOLTAGE VOH1 (V) Dout Nch DRIVER ON VOLTAGE VOL2 (V) 3.90 3.85 3.80 3.75 3.70 3.65 3.60 -60 IOH = -50A VDD = 3.9V - 40 - 20 0 20 40 60 80 100 0.30 0.25 0.20 0.15 0.10 0.05 0.00 -60 IOL = 50A VDD = 2.4V - 40 - 20 0 20 40 60 80 100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 15. Cout Pch Driver On Voltage (Voh1) vs Temperature MC33349N-3X
Figure 16. Dout Nch Driver On Voltage (Vol2) vs Temperature MC33349N-3X
3.85 3.80 3.75 3.70 3.65 3.60 -60
IOH = -50A VDD = 3.9V
OUTPUT DELAY OF SHORT PROTECTION t short ( s)
Dout Pch DRIVER ON VOLTAGE VOH2 (V)
3.90
10000
1000
100
10
R2 = 1kW VDD = 3.0V 0.01 0.1 1
- 40
- 20
0
20
40
60
80
100
0 0.001
TA, AMBIENT TEMPERATURE (C)
EXTERNAL CAPACITANCE C2 (F)
Figure 17. Dout Pch Driver On Voltage (Voh2) vs Temperature MC33349N-3X
Figure 18. Short Protection Delay Time vs Capacitance C2 MC33349N-3X
OUTPUT DELAY OF EXCESS CURRENT t VDET3(ms)
25.00
20.00 15.00 10.00 5.00 0.00 2.5
3.0
3.5 SUPPLY VOLTAGE VDD (V)
4.0
4.5
Figure 19. Excess Current Delay Time vs VDD MC33349N-3X
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MC33349
EXCESS CURRENT THRESHOLD V DET3 (V) OVERVOLTAGE THRESHOLD V DET1(V) 0.210 0.209 0.208 0.207 0.206 0.205 0.204 0.203 0.202 0 0.5 1 1.5 2 2.5 3 EXTERNAL RESISTANCE R2(kW) VDD = 3.0V 4.258 C1 = 0 to 0.68F 4.256 C3 = 0.1F 4.254 4.252 4.250 4.248 4.246 0 200 400 600 800 1000 EXTERNAL RESISTANCE R1(W) C3 = 0.22F
C3 = 0.01F
Figure 20. Excess Current Threshold vs External Resistance R2 MC33349N-3X / MC33349N-7X
Figure 21. Overvoltage Threshold vs External Resistance R1 MC33349N-3X
OPERATING DESCRIPTION
VD1 / Over-Charge Detector
VD1 monitors the voltage at the VCELL pin (VDD). When it exceeds the over-charge detector threshold, VDET1. VD1 senses an over-charging condition, the CO pin goes to a "Low" level, and the external charge control, Nch-MOSFET turns off. Resetting VD1 allows resumption of the charging process. VD1 resets under two conditions, thus, making the CO pin level "High." The first case occurs when the cell voltagedropsbelow"VDET1-VHYS1."(VHYS1istypically 200 mV). In the second case, disconnecting the charger from the battery pack can reset VD1 after VDD drops between "VDET1" and "VDET1 - VHYS1". After detecting over-charge, connecting a load to the battery pack allows load current to flow through the parasitic diode of the external charge control FET. The CO level goes "High" when the cell voltage drops below VDET1 due to load current draw through the parasitic diode. An external capacitor connected between the Gnd pin and Ct pin sets the output delay time for over-charge detection. The external capacitor sets up a delay time from the moment of over-charge detection to the time CO outputs a signal, which enables the charge control FET to turn off. If the voltage fault occurs within the time delay window. CO will not turn off the charge control FET. The output delay time can be calculated as follows:
t [sec] VDET1
pin goes to a "Low" level, and the external discharge control Nch MOSFET turns off. The IC enters a low current standby mode after detection of an over-discharged voltage by VD2. Supply current then reduces to approximately 0.3 A. During standby mode, only the charger detector operates. VD2 can only reset after connecting the pack to a charger. While VDD remains under the over-discharge detector threshold, VDET2, discharge current can flow through the parasitic diode of the external discharge control FET. The DO level goes "High" when the cell voltage rises above VDET2 due to the charging current through the parasitic diode. Connecting a charger to the battery pack will instantly set DO "High" if this causes VDD to rise above VDET2. When cell voltage equals zero, one can charge the battery pack if the voltage is greater than the minimum charge voltage, VST. Output delay time for the over-discharge detection (tVDET2) is fixed internally. If the voltage fault occurs within the time delay window, DO will not turn off the discharge control FET. A CMOS buffer sets the output of the DO pin to a "High" level of VDD and a "Low" level of Gnd.
VD3 / Excess Current Detector, Short Circuit Detector
+ (Ct[F]
(VDD[V]
* 0.7) (0.48
10 *6)
A level shifter incorporated in a buffer driver for the CO pin drives the "Low" level of CO pin to the P- pin voltage. A CMOS buffer sets the "High" level of CO pin to VDD.
VD2 / Over-Discharge Detector
VD2 monitors the voltage at the VCELL pin (VDD). When it drops below the over-discharge detector threshold, VDET2, VD2 senses an over-discharge condition, the DO
Both the excess current detector and the short circuit detector can work when the two control FET's are on. When the voltage at the P- pin rises to a value between the short circuit protection voltage, VSHORT, and the excess current threshold, VDET3, the excess current detector operates. Increasing V(P-) higher than VSHORT enables the short circuit detector. The DO pin then goes to a "Low" level, and the external discharge control Nch MOSFET turns off. Output delay time for excess current detection (tVDET3) is fixed internally. If the excess current fault occurs within the time delay window, DO will not turn off the discharge control FET. However, when the short circuit protector is
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MC33349
enabled, DO can turn off the discharge control FET. Its delay time would be approximately 5 s. The P- pin has a built-in pull down resistor, typically 100 kW, which connects to the Gnd pin. Once an excess current or short circuit fault is removed, the internal resistor pulls V(P-) to the Gnd pin potential. Therefore, the voltage from P- to Gnd drops below the current detection thresholds and DO turns the external MOSFET back on.
-NOTE-
If VDD voltage is higher than the over-discharge voltage threshold, VDET2, when excess current is detected the IC will not enter a standby mode. However, if VDD is below VDET2 when excess current is detected, the IC will enter a standby mode. This will not occur when the short circuit detector activates.
Figure 22. Timing Diagram / Operational Description
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MC33349
+ R1 100 W
C1 0.01F
5
4 C3 0.01F 6
MC33349
2
1
3
C2 0.22F
R2 1kW -
Figure 23. Typical Application Circuit Technical Notes
R1 and C1 will stabilize a supply voltage to the MC33349. A recommended R1 value is less than 1 kW. A larger value of R1 leads to higher detection voltage because of shoot through current into the IC. R2 and C2 stabilize P- pin voltage. Larger R2 values could possibly disable reset from over-discharge by connecting a charger. Recommended values are less than 1 kW. After an over-charge detection even connecting a battery pack to a system could probably not allow a system to draw load current if one uses a larger R2C2 time constant. The recommended C2 value is less than 1F. R1 and R2 can operate as a current limiter against setting cell reverse direction or for applying excess charging voltage to the IC and battery pack. Smaller R1 and R2 values may cause excessive power consumption over the specified power dissipation rating. Therefore R1+R2 should be more than 1 kW. The time constants R1C1 and R2C2 must have a relation as follows: R1C1 R2C2 If the R1C1 time constant for the Vcell pin is larger than the R2C2 time constant for the P- pin, the IC might enter a standby mode after detecting excess current. This was noted in the operating description of the current detectors.
ORDERING INFORMATION
Device MC33349N-3R1 MC33349N-4R1 MC33349N-7R1 Overvoltage Threshold (V) 4.25 4.25 4.35 Undervoltage Threshold (V) 2.5 2.5 2.5 Current Limit Threshold (V) 0.2 0.075 0.2 Marking A1xx* A2xx* A0xx* 7" 8 mm 3000 Reel Size Tape width Quantity
* xx denotes the date code marking. Consult factory for information on other threshold values.
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MC33349
OUTLINE DIMENSIONS
N SUFFIX PLASTIC PACKAGE CASE 1262-01 (SOT-23) ISSUE O E
PIN 1 INK MARK IDENTIFIER
0.20
M
CB
M
0.05 C
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSION D DOES NOT INCLUDE FLASH OR PROTRUSIONS. FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.23 PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. DIMENSIONS D AND E1 ARE TO BE DETERMINED AT DATUM PLANE H. DIM A A1 b b1 c c1 D E E1 e e1 L MILLIMETERS MIN MAX 0.90 1.45 0.00 0.15 0.35 0.50 0.35 0.45 0.09 0.20 0.09 0.15 2.80 3.00 2.60 3.00 1.50 1.75
0.95 1.90
1
e
A
6
D
5
3
A
B
b c1 c
q
H L
CCCCC EEEEE CCCCC EEEEE
0.10
E1
A1 A
b
4
M
CA
A
S
B
2
e1
S
b1
q
0.25 0_
0.55 10 _
SECTION A-A
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MC33349
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 1:00pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 1:00pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 12:00pm to 5:00pm UK Time) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, England, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local Sales Representative.
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MC33349/D

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