View MAX2440_114004.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-1352; Rev 0; 4/98
KIT ATION EVALU ABLE AVAIL
900MHz Image-Reject Receivers
General Description Features
o Receive Mixer with 35dB Image Rejection o Adjustable-Gain LNA o Up to +2dBm Combined Receiver Input IP3 o 4dB Combined Receiver Noise Figure o Low Current Consumption: 23mA Receive 9.5mA Oscillator o 0.5A Shutdown Mode o Operates from Single +2.7V to +4.8V Supply
MAX2440/MAX2441/MAX2442
The MAX2440/MAX2441/MAX2442 highly integrated front-end receiver ICs provide the lowest cost solution for cordless phones and ISM-band radios operating in the 900MHz band. All devices incorporate receive imagereject mixers to reduce filter cost. They operate with a +2.7V to +4.8V power supply, allowing direct connection to a 3-cell battery stack. The signal path incorporates an adjustable-gain LNA and an image-reject downconverter with 35dB image suppression. These features yield excellent combined downconverter noise figure (4dB) and high linearity with an input third-order intercept point (IP3) of up to +2dBm. All devices include an on-chip local oscillator (LO), requiring only an external varactor-tuned LC tank for operation. The integrated divide-by-64/65 dual-modulus prescaler can also be set to a direct mode, in which it acts as an LO buffer amplifier. Three separate powerdown inputs can be used for system power management, including a 0.5A shutdown mode. These parts are compatible with commonly used modulation schemes such as FSK, BPSK, and QPSK, as well as frequency hopping and direct sequence spread-spectrum systems. All devices come in a 28-pin SSOP package. Evaluation kits are available for the MAX2420/ MAX2421/MAX2422. The MAX2420/MAX2421/MAX2422 are transceivers whose receive sections and pinout are identical to the MAX2440/MAX2441/MAX2442. For complete transceiver devices, refer to the MAX2420/ MAX2421/MAX2422/MAX2460/MAX2463 and MAX2424/ MAX2426 data sheets.
_______________Ordering Information
PART MAX2440EAI MAX2441EAI MAX2442EAI TEMP. RANGE -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 28 SSOP 28 SSOP 28 SSOP
Functional Diagram appears at end of data sheet.
___________________Pin Configuration
TOP VIEW
VCC 1 28 GND 27 GND 26 GND 25 TANK CAP1 2 RXOUT 3 GND 4 RXIN 5 VCC 6 GND 7
________________________Applications
Cordless Phones Wireless Telemetry Wireless Networks Spread-Spectrum Communications Two-Way Paging
MAX2440 MAX2441 MAX2442
24 TANK 23 VCC 22 VCC 21 PREOUT 20 PREGND 19 MOD 18 DIV1 17 VCOON 16 RXON 15 GND
______________________Selector Guide
PART MAX2440 MAX2441 MAX2442 IF FREQ (MHz) 10.7 46 70 INJECTION TYPE High side High side High side LO FREQ (MHz) fRF + 10.7 fRF + 46 fRF + 70
GND 8 GND 9 LNAGAIN 10 VCC 11 GND 12 GND 13 GND 14
SSOP ________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442
ABSOLUTE MAXIMUM RATINGS
VCC to GND ...........................................................-0.3V to +5.5V Voltage on LNAGAIN, RXON, VCOON, DIV1, MOD ...............................................-0.3V to (VCC + 0.3V) RXIN Input Power..............................................................10dBm TANK, TANK Input Power ...................................................2dBm Continuous Power Dissipation (TA = +70C) SSOP (derate 9.50mW/C above +70C) ......................762mW Operating Temperature Range MAX244_EAI .....................................................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +165C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +4.8V, no RF signals applied, LNAGAIN = unconnected, VVCOON = 2.4V, VRXON = VMOD = VDIV1 = 0.45V, PREGND = GND, TA = TMIN to TMAX. Typical values are at TA = +25C, VCC = +3.3V, unless otherwise noted.) PARAMETER Supply-Voltage Range Oscillator Supply Current Prescaler Supply Current (divide-by-64/65 mode) Prescaler Supply Current (buffer mode) Receive Supply Current Shutdown Supply Current Digital Input Voltage High Digital Input Voltage Low Digital Input Current PREGND = unconnected (Note 1) VDIV1 = 2.4V (Note 2) VRXON = 2.4V, PREGND = unconnected (Note 3) VCOON = RXON = MOD = DIV1 = GND RXON, DIV1, VCOON, MOD RXON, DIV1, VCOON, MOD Voltage on any one digital input = VCC or GND 1 TA = +25C TA = TMIN to TMAX 2.4 0.45 10 CONDITIONS MIN 2.7 9.5 4.2 5.4 23 0.5 10 TYP MAX 4.8 14 6 8.5 36 UNITS V mA mA mA mA A V V A
Note 1: Calculated by measuring the combined oscillator and prescaler supply current and subtracting the oscillator supply current. Note 2: Calculated by measuring the combined oscillator and LO buffer supply current and subtracting the oscillator supply current. Note 3: Calculated by measuring the combined receive and oscillator supply current and subtracting the oscillator supply current. With LNAGAIN = GND, the supply current drops by 4.5mA.
2
_______________________________________________________________________________________
900MHz Image-Reject Receivers
AC ELECTRICAL CHARACTERISTICS
(MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = VRXON = 2.4V; RXON = MOD = DIV1 = PREGND = GND; TA = +25C; unless otherwise noted.) PARAMETER RECEIVER Input Frequency Range (Notes 4, 5) MAX2440 IF Frequency Range Image Frequency Rejection LNAGAIN = VCC, TA = +25C Conversion Power Gain (Note 6) LNAGAIN = VCC, TA = TMIN to TMAX (Note 4) VLNAGAIN = 1V LNAGAIN = GND Noise Figure Input Third-Order Intercept Input 1dB Compression LO to RXIN Leakage Receiver Turn-On Time DIV1 = VCC (Notes 4, 6) (Notes 4, 7) LNAGAIN = VCC VLNAGAIN = 1V Receiver on or off (Note 8) LNAGAIN = VCC VLNAGAIN = 1V LNAGAIN = VCC VLNAGAIN = 1V -19 MAX2440/MAX2441 MAX2442 MAX2440/MAX2441 MAX2442 MAX2442 (Notes 4, 5) MAX2441 MAX2442 800 8.5 36 55 26 20 19 19.5 18 12 -16 4 12 -17 -8 -26 -18 -60 500 5 dB dBm dBm dBm ns 10.7 46 70 35 22 21 24.5 23.5 25 dB 24 1000 12.5 55 85 dB MHz MHz CONDITIONS MIN TYP MAX UNITS
MAX2440/MAX2441/MAX2442
_______________________________________________________________________________________
3
900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = VRXON = 2.4V; RXON = MOD = DIV1 = PREGND = GND; TA = +25C; unless otherwise noted.) PARAMETER OSCILLATOR AND PRESCALER Oscillator Frequency Range Oscillator Phase Noise Oscillator Pulling Prescaler Output Level Oscillator Buffer Output Level Required Modulus Setup Time Required Modulus Hold Time (Notes 4, 9) 10kHz offset (Note 10) Standby to RX Standby mode with PRXIN = -45dBm to PRXIN = 0dBm (Note 11) ZL = 100k | | 10pF DIV1 = 2.4V, ZL = 50 (Note 4) TA = +25C TA = TMIN to TMAX -11 -12 10 0 690 82 8 70 500 -8 kHz mVp-p dBm ns ns 1100 MHz dBc/Hz CONDITIONS MIN TYP MAX UNITS
Divide-by-64/65 mode (Notes 4, 12) Divide-by-64/65 mode (Notes 4, 12)
Note 4: Guaranteed by design and characterization. Note 5: Image rejection typically falls to 30dBc at the frequency extremes. Note 6: Refer to the Typical Operating Characteristics for plots showing receiver gain versus LNAGAIN voltage, input IP3 versus LNAGAIN voltage, and noise figure versus LNAGAIN voltage. Note 7: Two tones at PRXIN = -45dBm each, f1 = 915.0MHz and f2 = 915.2MHz. Note 8: Time delay from RXON = 0.45V to RXON = 2.4V transition to the time the output envelope reaches 90% of its final value. Note 9: Refers to useable operating range. Tuning range of any given tank circuit design is typically much narrower (refer to Figure 1). Note 10: Using tank components shown in Figure 1. Note 11: This approximates a typical application in which a transmitter is followed by an external PA and a T/R switch with finite isolation. Note 12: Relative to the rising edge of PREOUT.
4
_______________________________________________________________________________________
900MHz Image-Reject Receivers
Typical Operating Characteristics
(MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = 2.4V; RXON = VCC; MOD = DIV1 = PREGND = GND; TA = +25C; unless otherwise noted.)
RECEIVER SUPPLY CURRENT vs. TEMPERATURE
MAX2440/1/2-01
MAX2440/MAX2441/MAX2442
SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE
MAX2440/1/2-02
RECEIVER GAIN vs. LNAGAIN
20 15 RECEIVER GAIN (dB) 10 5 0 -5 -10 AVOID THIS REGION ADJUSTABLE GAIN MAX GAIN LNA OFF LNA PARTIALLY BIASED
MAX2440/1/2-03
42 40 38 36 ICC (mA) 34 32 30 28 26 24 -40 -20 0 20 40 60 80 PREGND = UNCONNECTED INCLUDES OSCILLATOR CURRENT VCC = 4.8V
4.5 4.0 3.5 3.0 ICC (A) 2.5 2.0 1.5 1.0 0.5 0 -40 -20 0 20 40 VCC = 2.7V 60 80 VCC = 4.8V VCC = 3.3V VCOON = GND RXON = GND
25
VCC = 3.3V VCC = 2.7V
-15 -20 100 0 0.5
100
1.0
1.5
2.0
TEMPERATURE (C)
TEMPERATURE (C)
LNAGAIN VOLTAGE (V)
RECEIVER INPUT IP3 vs. VLNAGAIN
MAX2440/1/2-04
RECEIVER NOISE FIGURE vs. LNAGAIN
MAX2440/1/2-05
MAX2440 RECEIVER GAIN vs. TEMPERATURE
LNAGAIN = VCC 26 RECEIVER GAIN (dB) VCC = 2.7V VCC = 4.8V
MAX2440/1/2-06
5 LNA OFF LNA ADJUSTABLE MAX PARTIALLY GAIN GAIN BIASED AVOID THIS REGION
40 35 30 NOISE FIGURE (dB) 25 20 15 10 AVOID THIS REGION 0 0.5 1.0 LNA OFF LNA ADJUSTABLE MAX PARTIALLY GAIN GAIN BIASED
0
24 22
IIP3 (dBm)
-5
-10
20
VCC = 3.3V
-15 5 -20 0 0.5 1.0 1.5 2.0 LNAGAIN VOLTAGE (V) 0
18 DIV1 = VCC 1.5 2.0 -40 -20 0 20 40 60 80 100
LNAGAIN VOLTAGE (V)
TEMPERATURE (C)
RECEIVER NOISE FIGURE vs. TEMPERATURE AND SUPPLY VOLTAGE
MAX2440/1/2-07
RECEIVER INPUT IP3 vs. TEMPERATURE
MAX2440/1/2-08
MAX2440 RXOUT 1dB COMPRESSION POINT vs. TEMPERATURE
MAX2440/1/2-9
5.5 LNAGAIN = VCC DIV1 = VCC 5.0 NOISE FIGURE (dB) VCC = 4.8V
-6 -8 -10 IIP3 (dBm) -12 -14 -16 -18 VLNAGAIN = 1V
-3 1dB COMPRESSION POINT (dBm) -4 VCC = 4.8V -5 -6 -7 -8 -9 VCC = 2.7V VCC = 3.3V
4.5 VCC = 3.3V 4.0 VCC = 2.7V 3.5
VLNAGAIN = 2V
3.0 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
-20 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
-40
-20
0
20
40
60
80
TEMPERATURE (C)
_______________________________________________________________________________________
5
900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442
Typical Operating Characteristics (continued)
(MAX242X/MAX246X EV kit, VCC = +3.3V; fLO = 925.7MHz (MAX2440), fLO = 961MHz (MAX2441), fLO = 985MHz (MAX2442), fRXIN = 915MHz; PRXIN = -35dBm; VLNAGAIN = 2V; VVCOON = 2.4V; RXON = VCC; MOD = DIV1 = PREGND = GND; TA = +25C; unless otherwise noted.)
RECEIVER IMAGE REJECTION vs. RF FREQUENCY
MAX2440/1/2-10
RECEIVER IMAGE REJECTION vs. IF FREQUENCY
MAX2441 35 IMAGE REJECTION (dB) 30 25 20 15 10 5 0 MAX2440 MAX2442
MAX2440/1/2-11
60 RXON = VCC 50 IMAGE REJECTION (dB) 40 30 20 10 0 -10 -20 0 400 800 1200 1600
40
2000
1
10
100
1000
RF FREQUENCY (MHz)
IF FREQUENCY (MHz)
RXIN INPUT IMPEDANCE vs. FREQUENCY
50 45 40 REAL IMPEDANCE () 35 30 25 20 15 10 5 0 600 800 1000 1200 1400 FREQUENCY (MHz) -0 -20 REAL -40 IMAGINARY -80 IMAGINARY IMPEDANCE ()
MAX2440/1/2-12
PRESCALER OUTPUT LEVEL vs. LOAD RESISTANCE
PRESCALER OUTPUT LEVEL (mVp-p) 500 450 400 350 300 250 200 150 100 50 0 1 100 LOAD IS PLOTTED RESISTANCE IN PARALLEL WITH A 10pF OSCILLOSCOPE PROBE (/ 64/65 MODE) 1k 10k 100k
MAX2440/1/2-13
-100
550
-60
LOAD RESISTANCE ()
6
_______________________________________________________________________________________
900MHz Image-Reject Receivers
Pin Description
PIN 1 2 3 4, 9, 12-15 5 6 7 8 NAME VCC CAP1 RXOUT GND RXIN VCC GND GND FUNCTION Supply-Voltage Input for Master Bias Cell. Bypass with a 47pF low-inductance capacitor and 0.1F to GND (pin 28 recommended). Receive Bias Compensation Pin. Bypass with a 47pF low-inductance capacitor and 0.01F to GND. Do not make any other connections to this pin. Single-Ended, 330 IF Output. AC couple to this pin. Ground Connection Receiver RF Input, single-ended. The input match shown in Figure 1 maintains an input VSWR of better than 2:1 from 902MHz to 928MHz. Supply Voltage Input for Receive Low-Noise Amplifier. Bypass with a 47pF low-inductance capacitor to GND (pin 7 recommended). Ground Connection for Receive Low-Noise Amplifier. Connect directly to ground plane using multiple vias. Ground Connection for Signal-Path Blocks, except LNA. Connect directly to ground plane. Low-Noise Amplifier Gain-Control Input. Drive this pin high for maximum gain. When LNAGAIN is pulled low, the LNA is capacitively bypassed and the supply current is reduced by 4.5mA. This pin can also be driven with an analog voltage to adjust the LNA gain in intermediate states. Refer to the Receiver Gain vs. LNAGAIN Voltage graph in the Typical Operating Characteristics, as well as Table 1. Supply Voltage Input for Signal-Path Blocks, except LNA. Bypass with a 47pF low-inductance capacitor and 0.01F to GND (pin 8 recommended). Driving RXON with a logic high enables the LNA, receive mixer, and IF output buffer. VCOON must also be high. Driving VCOON with a logic high turns on the VCO, phase shifters, VCO buffers, and prescaler. The prescaler can be selectively disabled by floating the PREGND pin. Driving DIV1 with a logic high disables the divide-by-64/65 prescaler and connects the PREOUT pin directly to an oscillator buffer amplifier, which outputs -8dBm into a 50 load. Tie DIV1 low for divide-by64/65 operation. Pull this pin low when in shutdown to minimize off current. Modulus Control for the Divide-by-64/65 Prescaler: high = divide-by-64, low = divide-by-65. Note that the DIV1 pin must be at logic low when using the prescaler mode. Ground connection for the Prescaler. Tie PREGND to ground for normal operation. Leave floating to disable the prescaler and the output buffer. Tie MOD and DIV1 to ground and leave PREOUT floating when disabling the prescaler. Prescaler/Oscillator Buffer Output. In divide-by-64/65 mode (DIV1 = low), the output level is 500mVp-p into a high-impedance load. In divide-by-1 mode (DIV1 = high), this output delivers -8dBm into a 50 load. AC couple to this pin. Supply-Voltage Input for Prescaler. Bypass with a 47pF low-inductance capacitor and 0.01F to GND (pin 20 recommended). Supply-Voltage Input for VCO and Phase Shifters. Bypass with a 47pF low-inductance capacitor to GND (pin 26 recommended). Differential Oscillator Tank Port. See Applications Information for information on tank circuits or on using an external oscillator. Differential Oscillator Tank Port. See Applications Information for information on tank circuits or on using an external oscillator.
MAX2440/MAX2441/MAX2442
10
LNAGAIN
11 16 17
VCC RXON VCOON
18
DIV1
19
MOD
20
PREGND
21
PREOUT
22 23 24 25
VCC VCC TANK TANK
_______________________________________________________________________________________
7
900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442
Pin Description (continued)
PIN 26 27 28 NAME GND GND GND Ground (substrate) Ground Connection for Master Bias Cell FUNCTION Ground Connection for VCO and Phase Shifters
VCC 1 0.1F 47pF 28 2 0.1F RECEIVE RF INPUT 47pF GND 8.2nH 47pF 12nH 9 6 47pF VCC 11 0.01F 47pF 8 13 14 4 10 47pF VCC GND GND GND GND LNAGAIN PREOUT MOD DIV1 VCOON RXON GND 21 19 18 17 16 15 TANK 7 GND 5 RXIN GND CAP1 PREGND VCC VCC VCC 22
VCC
VCO TANK COMPONENTS FOR 915MHz TYPICAL RF 0.01F PART MAX2440 MAX2441 MAX2442 L3 (nH) 6.8 6.8 6.8 C26 C2, C3 (pF) (pF) 2.0 1.5 1.5 2.0 2.7 2.0
47pF 20 VCC 23 47pF 26 27 3 0.01F GND GND VCC GND 25 12
SEE APPLICATIONS INFORMATION SECTION L3: COILCRAFT 0805HS-060TMBC
MAX2440 MAX2441 MAX2442
RXOUT
RECEIVE IF OUTPUT (330)
VCC VARACTOR: ALPHA SMV1299-004 OR EQUIVALENT 10 C2 47k L3 24 TANK 1000pF TO PLL MOD DIV1 VCOON RXON C3 1k 10 C26 VCO ADJUST 47pF
100nH 1k
LNAGAIN
Figure 1. Typical Operating Circuit
8 _______________________________________________________________________________________
900MHz Image-Reject Receivers
Detailed Description
The following sections describe each of the blocks shown in the Functional Diagram. resulting mixer outputs are then summed together. The final phase relationship is such that the desired signal is reinforced and the image signal is canceled. The downconverter mixer output appears on the RXOUT pin, a output. single-ended 330
MAX2440/MAX2441/MAX2442
Receiver
The MAX2440/MAX2441/MAX2442's receive path consists of a 900MHz low-noise amplifier, an image-reject mixer, and an IF buffer amplifier. The LNA's gain and biasing are adjustable via the LNAGAIN pin. Proper operation of this pin can provide optimum performance over a wide range of signal levels. The LNA can be placed in four modes by applying a DC voltage on the LNAGAIN pin. See Table 1, as well as the relevant Typical Operating Characteristics plots. At low LNAGAIN voltages, the LNA is shut off, and the input signal capacitively couples directly into the mixer to provide maximum linearity for large-signal operation (receiver close to transmitter). As the LNAGAIN voltage is raised, the LNA begins to turn on. Between 0.5V and 1V at LNAGAIN, the LNA is partially biased and behaves like a Class C amplifier. Avoid this operating mode for applications where linearity is a concern. As the LNAGAIN voltage reaches 1V, the LNA is fully biased into Class A mode, and the gain is monotonically adjustable at LNAGAIN voltages above 1V. See the Receiver Gain, Receiver IP3, and Receiver Noise Figure vs. LNAGAIN plots in the Typical Operating Characteristics for more information. The downconverter is implemented using an imagereject mixer consisting of an input buffer with two outputs, each of which is fed to a double-balanced mixer. The local-oscillator (LO) port of each mixer is driven from a quadrature LO. The LO is generated from an onchip oscillator and an external tank circuit. Its signal is buffered and split into phase shifters, which provide 90 of phase shift across their outputs. This pair of LO signals is fed to the mixers. The mixers' outputs are then passed through a second pair of phase shifters, which provide a 90 phase shift across their outputs. The
Phase Shifters
MAX2440/MAX2441/MAX2442 devices use passive networks to provide quadrature phase shifting for the receive IF and LO signals. Because these networks are frequency selective, proper part selection is important. Image rejection degrades as the IF and RF move away from the designed optimum frequencies. Refer to the Selector Guide on the front page of this data sheet.
Local Oscillator (LO)
The on-chip LO is formed by an emitter-coupled differential pair. An external LC resonant tank sets the oscillation frequency. A varactor diode is typically used to create a voltage-controlled oscillator (VCO). See the Applications Information section and Figure 2 for an example VCO tank circuit. The LO may be overdriven in applications where an external signal is available. The external LO signal should be about 0dBm from 50, and should be AC coupled into either the TANK or TANK pin. Both TANK and TANK require pull-up resistors to V CC. See the Applications Information section and Figure 3 for details. The local oscillator resists LO pulling caused by changes in load impedance that occur as the part is switched from standby mode. The amount of LO pulling will be affected if there is power at the RXIN port due to imperfect isolation in an external transmit/receive (T/R) switch.
Prescaler
The on-chip prescaler can be used in two different modes: as a dual-modulus divide-by-64/65, or as oscillator buffer amplifier. The DIV1 pin controls this function. When DIV1 is low, the prescaler is in dual-modulus divide-by-64/65 mode; when it is high, the prescaler is disabled and the oscillator buffer amplifier is enabled. The buffer typically outputs -8dBm into a 50 load. To minimize shutdown supply current, pull the DIV1 pin low when in shutdown mode. In divide-by-64/65 mode, the division ratio is controlled by the MOD pin. When MOD is high, the prescaler is in divide-by-64 mode; when it is low, it divides the LO frequency by 65. The DIV1 pin must be at a logic low in this mode.
Table 1. LNA Modes
LNAGAIN VOLTAGE (V) 0 < V 0.5 0.5 < V < 1.0 1.0 < V 1.5 1.5 < V VCC MODE LNA capacitively bypassed, minimum gain, maximum IP3 LNA partially biased. Avoid this mode-- the LNA operates in a Class C manner LNA gain is monotonically adjustable LNA at maximum gain (remains monotonic)
_______________________________________________________________________________________
9
900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442
To disable the prescaler entirely, leave PREGND and PREOUT floating. Also tie the MOD and DIV1 pins to GND. Disabling the prescaler does not affect operation of the VCO stage.
Oscillator-Tank PC Board Layout
The parasitic PC board capacitance, as well as PCB trace inductance and package inductance, can affect oscillation frequency, so be careful in laying out the PC board for the oscillator tank. Keep the tank layout as symmetrical, tightly packed, and close to the device as possible to minimize LO feedthrough. When using a PC board with a ground plane, a cut-out in the ground plane (and any other planes) below the oscillator tank will reduce parasitic capacitance.
Power Management
MAX2440/MAX2441/MAX2442 supports three different power-management features to conserve battery life. The VCO section has its own control pin (VCOON), which also serves as a master bias pin. When VCOON is high, the LO, quadrature LO phase shifters, and prescaler or LO buffer are all enabled. The VCO can be powered up prior to receiving to allow it to stabilize. With VCOON high, bringing RXON high enables the receive path, which consists of the LNA, image-reject mixers, and IF output buffer. When this pin is low, the receive path is inactive. To disable all chip functions and reduce the supply current to typically less than 0.5A, pull VCOON, DIV1, MOD, and RXON low.
Using an External Oscillator
If an external 50 LO signal source is available, it can be used as an input to the TANK or TANK pin in place of the on-chip oscillator (Figure 3). The oscillator signal is AC coupled into the TANK pin and should have a level of about 0dBm from a 50 source. For proper biasing of the oscillator input stage, TANK and TANK must be pulled up to the VCC supply via 50 resistors. If a differential LO source such as the MAX2620 is available, AC couple the inverting output into TANK.
Applications Information
Oscillator Tank
The on-chip oscillator requires a parallel-resonant tank circuit connected across TANK and TANK. Figure 2 shows an example of an oscillator tank circuit. It typically oscillates between 902MHz + IF and 928MHz + IF with a control voltage between 0 and 3.3V. Inductor L4 provides DC bias to the tank ports. L3 and the series combination of capacitors C2, C3, and both halves of the varactor diode capacitances set the resonant frequency as follows: 1 fr = 2 L3 CEFF
VCC
MAX2440 MAX2441 MAX2442
TANK R7 10
L4 100nH C2
R5 1k 1/2 D1 R8 47k
( )(
1
)
L3
C26 C3 1/2 D1
VCO_CTRL C1 47pF
CEFF =
1 1 2 C2 + C 3 + C D1
+ C26
TANK R6 10
where CD1 is the capacitance of one varactor diode. Choose the tank components according to your application needs, such as phase-noise requirements, tuning range, and VCO gain. Higher-Q inductors yield lower phase noise but are more likely to produce a second-harmonic oscillation mode. Air-core spring inductors provide high Q, but radiate more than chip inductors. It may be necessary to shield the tank circuit for optimal isolation of the LO to other circuitry. R6 and R7 are 5 to 10 resistors that reduce the Q of parasitic resonances due to package inductance.
10
R4 1k D1 = ALPHA SMV1299-004
SEE FIGURE 1 FOR C2, C3, C26, AND L3 COMPONENT VALUES.
Figure 2. Oscillator Tank Schematic, Using the On-Chip VCO
______________________________________________________________________________________
900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442
Chip Information
VCC
MAX2440/MAX2441/MAX2442
TRANSISTOR COUNT: 2802
CBLOCK 0.01F EXT LO
MAX2440 MAX2441 MAX2442 TANK
50
VCC 50 EXTERNAL LO LEVEL IS 0dBm FROM A 50 SOURCE.
TANK
Figure 3. Using an External Local Oscillator
Functional Diagram
LNAGAIN RXIN
90
0
RXOUT
CAP1 RXON BIAS
DIV1 MOD 0 90 /1/64/65 PREOUT PREGND TANK TANK VCOON
PHASE SHIFTER
MAX2440 MAX2441 MAX2442
______________________________________________________________________________________
11
900MHz Image-Reject Receivers MAX2440/MAX2441/MAX2442
Package Information
SSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1998 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

▲Up To Search▲

Price & Availability of MAX2440

	To Download MAX2440 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .